machdep.c revision 170307
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 170307 2007-06-05 00:00:57Z jeff $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_msgbuf.h" 55#include "opt_perfmon.h" 56 57#include <sys/param.h> 58#include <sys/proc.h> 59#include <sys/systm.h> 60#include <sys/bio.h> 61#include <sys/buf.h> 62#include <sys/bus.h> 63#include <sys/callout.h> 64#include <sys/clock.h> 65#include <sys/cons.h> 66#include <sys/cpu.h> 67#include <sys/eventhandler.h> 68#include <sys/exec.h> 69#include <sys/imgact.h> 70#include <sys/kdb.h> 71#include <sys/kernel.h> 72#include <sys/ktr.h> 73#include <sys/linker.h> 74#include <sys/lock.h> 75#include <sys/malloc.h> 76#include <sys/memrange.h> 77#include <sys/msgbuf.h> 78#include <sys/mutex.h> 79#include <sys/pcpu.h> 80#include <sys/ptrace.h> 81#include <sys/reboot.h> 82#include <sys/sched.h> 83#include <sys/signalvar.h> 84#include <sys/sysctl.h> 85#include <sys/sysent.h> 86#include <sys/sysproto.h> 87#include <sys/ucontext.h> 88#include <sys/vmmeter.h> 89 90#include <vm/vm.h> 91#include <vm/vm_extern.h> 92#include <vm/vm_kern.h> 93#include <vm/vm_page.h> 94#include <vm/vm_map.h> 95#include <vm/vm_object.h> 96#include <vm/vm_pager.h> 97#include <vm/vm_param.h> 98 99#ifdef DDB 100#ifndef KDB 101#error KDB must be enabled in order for DDB to work! 102#endif 103#endif 104#include <ddb/ddb.h> 105 106#include <net/netisr.h> 107 108#include <machine/clock.h> 109#include <machine/cpu.h> 110#include <machine/cputypes.h> 111#include <machine/intr_machdep.h> 112#include <machine/md_var.h> 113#include <machine/metadata.h> 114#include <machine/pc/bios.h> 115#include <machine/pcb.h> 116#include <machine/proc.h> 117#include <machine/reg.h> 118#include <machine/sigframe.h> 119#include <machine/specialreg.h> 120#ifdef PERFMON 121#include <machine/perfmon.h> 122#endif 123#include <machine/tss.h> 124#ifdef SMP 125#include <machine/smp.h> 126#endif 127 128#ifdef DEV_ATPIC 129#include <amd64/isa/icu.h> 130#else 131#include <machine/apicvar.h> 132#endif 133 134#include <isa/isareg.h> 135#include <isa/rtc.h> 136 137/* Sanity check for __curthread() */ 138CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 139 140extern u_int64_t hammer_time(u_int64_t, u_int64_t); 141extern void dblfault_handler(void); 142 143extern void printcpuinfo(void); /* XXX header file */ 144extern void identify_cpu(void); 145extern void panicifcpuunsupported(void); 146 147#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 148#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 149 150static void cpu_startup(void *); 151static void get_fpcontext(struct thread *td, mcontext_t *mcp); 152static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 153SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 154 155#ifdef DDB 156extern vm_offset_t ksym_start, ksym_end; 157#endif 158 159int _udatasel, _ucodesel, _ucode32sel; 160 161int cold = 1; 162 163long Maxmem = 0; 164long realmem = 0; 165 166/* 167 * The number of PHYSMAP entries must be one less than the number of 168 * PHYSSEG entries because the PHYSMAP entry that spans the largest 169 * physical address that is accessible by ISA DMA is split into two 170 * PHYSSEG entries. 171 */ 172#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 173 174vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 175vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 176 177/* must be 2 less so 0 0 can signal end of chunks */ 178#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 179#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 180 181struct kva_md_info kmi; 182 183static struct trapframe proc0_tf; 184struct region_descriptor r_gdt, r_idt; 185 186struct pcpu __pcpu[MAXCPU]; 187 188struct mtx icu_lock; 189 190struct mem_range_softc mem_range_softc; 191 192static void 193cpu_startup(dummy) 194 void *dummy; 195{ 196 /* 197 * Good {morning,afternoon,evening,night}. 198 */ 199 startrtclock(); 200 printcpuinfo(); 201 panicifcpuunsupported(); 202#ifdef PERFMON 203 perfmon_init(); 204#endif 205 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem), 206 ptoa((uintmax_t)physmem) / 1048576); 207 realmem = Maxmem; 208 /* 209 * Display any holes after the first chunk of extended memory. 210 */ 211 if (bootverbose) { 212 int indx; 213 214 printf("Physical memory chunk(s):\n"); 215 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 216 vm_paddr_t size; 217 218 size = phys_avail[indx + 1] - phys_avail[indx]; 219 printf( 220 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 221 (uintmax_t)phys_avail[indx], 222 (uintmax_t)phys_avail[indx + 1] - 1, 223 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 224 } 225 } 226 227 vm_ksubmap_init(&kmi); 228 229 printf("avail memory = %ju (%ju MB)\n", 230 ptoa((uintmax_t)cnt.v_free_count), 231 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 232 233 /* 234 * Set up buffers, so they can be used to read disk labels. 235 */ 236 bufinit(); 237 vm_pager_bufferinit(); 238 239 cpu_setregs(); 240} 241 242/* 243 * Send an interrupt to process. 244 * 245 * Stack is set up to allow sigcode stored 246 * at top to call routine, followed by kcall 247 * to sigreturn routine below. After sigreturn 248 * resets the signal mask, the stack, and the 249 * frame pointer, it returns to the user 250 * specified pc, psl. 251 */ 252void 253sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 254{ 255 struct sigframe sf, *sfp; 256 struct proc *p; 257 struct thread *td; 258 struct sigacts *psp; 259 char *sp; 260 struct trapframe *regs; 261 int sig; 262 int oonstack; 263 264 td = curthread; 265 p = td->td_proc; 266 PROC_LOCK_ASSERT(p, MA_OWNED); 267 sig = ksi->ksi_signo; 268 psp = p->p_sigacts; 269 mtx_assert(&psp->ps_mtx, MA_OWNED); 270 regs = td->td_frame; 271 oonstack = sigonstack(regs->tf_rsp); 272 273 /* Save user context. */ 274 bzero(&sf, sizeof(sf)); 275 sf.sf_uc.uc_sigmask = *mask; 276 sf.sf_uc.uc_stack = td->td_sigstk; 277 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 278 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 279 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 280 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 281 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 282 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 283 fpstate_drop(td); 284 285 /* Allocate space for the signal handler context. */ 286 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 287 SIGISMEMBER(psp->ps_sigonstack, sig)) { 288 sp = td->td_sigstk.ss_sp + 289 td->td_sigstk.ss_size - sizeof(struct sigframe); 290#if defined(COMPAT_43) 291 td->td_sigstk.ss_flags |= SS_ONSTACK; 292#endif 293 } else 294 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 295 /* Align to 16 bytes. */ 296 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 297 298 /* Translate the signal if appropriate. */ 299 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 300 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 301 302 /* Build the argument list for the signal handler. */ 303 regs->tf_rdi = sig; /* arg 1 in %rdi */ 304 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 305 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 306 /* Signal handler installed with SA_SIGINFO. */ 307 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 308 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 309 310 /* Fill in POSIX parts */ 311 sf.sf_si = ksi->ksi_info; 312 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 313 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 314 } else { 315 /* Old FreeBSD-style arguments. */ 316 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 317 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 318 sf.sf_ahu.sf_handler = catcher; 319 } 320 mtx_unlock(&psp->ps_mtx); 321 PROC_UNLOCK(p); 322 323 /* 324 * Copy the sigframe out to the user's stack. 325 */ 326 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 327#ifdef DEBUG 328 printf("process %ld has trashed its stack\n", (long)p->p_pid); 329#endif 330 PROC_LOCK(p); 331 sigexit(td, SIGILL); 332 } 333 334 regs->tf_rsp = (long)sfp; 335 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 336 regs->tf_rflags &= ~PSL_T; 337 regs->tf_cs = _ucodesel; 338 PROC_LOCK(p); 339 mtx_lock(&psp->ps_mtx); 340} 341 342/* 343 * System call to cleanup state after a signal 344 * has been taken. Reset signal mask and 345 * stack state from context left by sendsig (above). 346 * Return to previous pc and psl as specified by 347 * context left by sendsig. Check carefully to 348 * make sure that the user has not modified the 349 * state to gain improper privileges. 350 * 351 * MPSAFE 352 */ 353int 354sigreturn(td, uap) 355 struct thread *td; 356 struct sigreturn_args /* { 357 const struct __ucontext *sigcntxp; 358 } */ *uap; 359{ 360 ucontext_t uc; 361 struct proc *p = td->td_proc; 362 struct trapframe *regs; 363 const ucontext_t *ucp; 364 long rflags; 365 int cs, error, ret; 366 ksiginfo_t ksi; 367 368 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 369 if (error != 0) 370 return (error); 371 ucp = &uc; 372 regs = td->td_frame; 373 rflags = ucp->uc_mcontext.mc_rflags; 374 /* 375 * Don't allow users to change privileged or reserved flags. 376 */ 377 /* 378 * XXX do allow users to change the privileged flag PSL_RF. 379 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 380 * should sometimes set it there too. tf_rflags is kept in 381 * the signal context during signal handling and there is no 382 * other place to remember it, so the PSL_RF bit may be 383 * corrupted by the signal handler without us knowing. 384 * Corruption of the PSL_RF bit at worst causes one more or 385 * one less debugger trap, so allowing it is fairly harmless. 386 */ 387 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 388 printf("sigreturn: rflags = 0x%lx\n", rflags); 389 return (EINVAL); 390 } 391 392 /* 393 * Don't allow users to load a valid privileged %cs. Let the 394 * hardware check for invalid selectors, excess privilege in 395 * other selectors, invalid %eip's and invalid %esp's. 396 */ 397 cs = ucp->uc_mcontext.mc_cs; 398 if (!CS_SECURE(cs)) { 399 printf("sigreturn: cs = 0x%x\n", cs); 400 ksiginfo_init_trap(&ksi); 401 ksi.ksi_signo = SIGBUS; 402 ksi.ksi_code = BUS_OBJERR; 403 ksi.ksi_trapno = T_PROTFLT; 404 ksi.ksi_addr = (void *)regs->tf_rip; 405 trapsignal(td, &ksi); 406 return (EINVAL); 407 } 408 409 ret = set_fpcontext(td, &ucp->uc_mcontext); 410 if (ret != 0) 411 return (ret); 412 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 413 414 PROC_LOCK(p); 415#if defined(COMPAT_43) 416 if (ucp->uc_mcontext.mc_onstack & 1) 417 td->td_sigstk.ss_flags |= SS_ONSTACK; 418 else 419 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 420#endif 421 422 td->td_sigmask = ucp->uc_sigmask; 423 SIG_CANTMASK(td->td_sigmask); 424 signotify(td); 425 PROC_UNLOCK(p); 426 td->td_pcb->pcb_flags |= PCB_FULLCTX; 427 return (EJUSTRETURN); 428} 429 430#ifdef COMPAT_FREEBSD4 431int 432freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 433{ 434 435 return sigreturn(td, (struct sigreturn_args *)uap); 436} 437#endif 438 439 440/* 441 * Machine dependent boot() routine 442 * 443 * I haven't seen anything to put here yet 444 * Possibly some stuff might be grafted back here from boot() 445 */ 446void 447cpu_boot(int howto) 448{ 449} 450 451/* Get current clock frequency for the given cpu id. */ 452int 453cpu_est_clockrate(int cpu_id, uint64_t *rate) 454{ 455 register_t reg; 456 uint64_t tsc1, tsc2; 457 458 if (pcpu_find(cpu_id) == NULL || rate == NULL) 459 return (EINVAL); 460 461 /* If we're booting, trust the rate calibrated moments ago. */ 462 if (cold) { 463 *rate = tsc_freq; 464 return (0); 465 } 466 467#ifdef SMP 468 /* Schedule ourselves on the indicated cpu. */ 469 thread_lock(curthread); 470 sched_bind(curthread, cpu_id); 471 thread_unlock(curthread); 472#endif 473 474 /* Calibrate by measuring a short delay. */ 475 reg = intr_disable(); 476 tsc1 = rdtsc(); 477 DELAY(1000); 478 tsc2 = rdtsc(); 479 intr_restore(reg); 480 481#ifdef SMP 482 thread_lock(curthread); 483 sched_unbind(curthread); 484 thread_unlock(curthread); 485#endif 486 487 /* 488 * Calculate the difference in readings, convert to Mhz, and 489 * subtract 0.5% of the total. Empirical testing has shown that 490 * overhead in DELAY() works out to approximately this value. 491 */ 492 tsc2 -= tsc1; 493 *rate = tsc2 * 1000 - tsc2 * 5; 494 return (0); 495} 496 497/* 498 * Shutdown the CPU as much as possible 499 */ 500void 501cpu_halt(void) 502{ 503 for (;;) 504 __asm__ ("hlt"); 505} 506 507/* 508 * Hook to idle the CPU when possible. In the SMP case we default to 509 * off because a halted cpu will not currently pick up a new thread in the 510 * run queue until the next timer tick. If turned on this will result in 511 * approximately a 4.2% loss in real time performance in buildworld tests 512 * (but improves user and sys times oddly enough), and saves approximately 513 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 514 * 515 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 516 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 517 * Then we can have our cake and eat it too. 518 * 519 * XXX I'm turning it on for SMP as well by default for now. It seems to 520 * help lock contention somewhat, and this is critical for HTT. -Peter 521 */ 522static int cpu_idle_hlt = 1; 523TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 524SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 525 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 526 527static void 528cpu_idle_default(void) 529{ 530 /* 531 * we must absolutely guarentee that hlt is the 532 * absolute next instruction after sti or we 533 * introduce a timing window. 534 */ 535 __asm __volatile("sti; hlt"); 536} 537 538/* 539 * Note that we have to be careful here to avoid a race between checking 540 * sched_runnable() and actually halting. If we don't do this, we may waste 541 * the time between calling hlt and the next interrupt even though there 542 * is a runnable process. 543 */ 544void 545cpu_idle(void) 546{ 547 548#ifdef SMP 549 if (mp_grab_cpu_hlt()) 550 return; 551#endif 552 if (cpu_idle_hlt) { 553 disable_intr(); 554 if (sched_runnable()) 555 enable_intr(); 556 else 557 (*cpu_idle_hook)(); 558 } 559} 560 561/* Other subsystems (e.g., ACPI) can hook this later. */ 562void (*cpu_idle_hook)(void) = cpu_idle_default; 563 564/* 565 * Clear registers on exec 566 */ 567void 568exec_setregs(td, entry, stack, ps_strings) 569 struct thread *td; 570 u_long entry; 571 u_long stack; 572 u_long ps_strings; 573{ 574 struct trapframe *regs = td->td_frame; 575 struct pcb *pcb = td->td_pcb; 576 577 critical_enter(); 578 wrmsr(MSR_FSBASE, 0); 579 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 580 pcb->pcb_fsbase = 0; 581 pcb->pcb_gsbase = 0; 582 critical_exit(); 583 load_ds(_udatasel); 584 load_es(_udatasel); 585 load_fs(_udatasel); 586 load_gs(_udatasel); 587 pcb->pcb_ds = _udatasel; 588 pcb->pcb_es = _udatasel; 589 pcb->pcb_fs = _udatasel; 590 pcb->pcb_gs = _udatasel; 591 592 bzero((char *)regs, sizeof(struct trapframe)); 593 regs->tf_rip = entry; 594 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 595 regs->tf_rdi = stack; /* argv */ 596 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 597 regs->tf_ss = _udatasel; 598 regs->tf_cs = _ucodesel; 599 600 /* 601 * Reset the hardware debug registers if they were in use. 602 * They won't have any meaning for the newly exec'd process. 603 */ 604 if (pcb->pcb_flags & PCB_DBREGS) { 605 pcb->pcb_dr0 = 0; 606 pcb->pcb_dr1 = 0; 607 pcb->pcb_dr2 = 0; 608 pcb->pcb_dr3 = 0; 609 pcb->pcb_dr6 = 0; 610 pcb->pcb_dr7 = 0; 611 if (pcb == PCPU_GET(curpcb)) { 612 /* 613 * Clear the debug registers on the running 614 * CPU, otherwise they will end up affecting 615 * the next process we switch to. 616 */ 617 reset_dbregs(); 618 } 619 pcb->pcb_flags &= ~PCB_DBREGS; 620 } 621 622 /* 623 * Drop the FP state if we hold it, so that the process gets a 624 * clean FP state if it uses the FPU again. 625 */ 626 fpstate_drop(td); 627} 628 629void 630cpu_setregs(void) 631{ 632 register_t cr0; 633 634 cr0 = rcr0(); 635 /* 636 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 637 * BSP. See the comments there about why we set them. 638 */ 639 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 640 load_cr0(cr0); 641} 642 643/* 644 * Initialize amd64 and configure to run kernel 645 */ 646 647/* 648 * Initialize segments & interrupt table 649 */ 650 651struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */ 652static struct gate_descriptor idt0[NIDT]; 653struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 654 655static char dblfault_stack[PAGE_SIZE] __aligned(16); 656 657struct amd64tss common_tss[MAXCPU]; 658 659/* software prototypes -- in more palatable form */ 660struct soft_segment_descriptor gdt_segs[] = { 661/* GNULL_SEL 0 Null Descriptor */ 662{ 0x0, /* segment base address */ 663 0x0, /* length */ 664 0, /* segment type */ 665 0, /* segment descriptor priority level */ 666 0, /* segment descriptor present */ 667 0, /* long */ 668 0, /* default 32 vs 16 bit size */ 669 0 /* limit granularity (byte/page units)*/ }, 670/* GCODE_SEL 1 Code Descriptor for kernel */ 671{ 0x0, /* segment base address */ 672 0xfffff, /* length - all address space */ 673 SDT_MEMERA, /* segment type */ 674 SEL_KPL, /* segment descriptor priority level */ 675 1, /* segment descriptor present */ 676 1, /* long */ 677 0, /* default 32 vs 16 bit size */ 678 1 /* limit granularity (byte/page units)*/ }, 679/* GDATA_SEL 2 Data Descriptor for kernel */ 680{ 0x0, /* segment base address */ 681 0xfffff, /* length - all address space */ 682 SDT_MEMRWA, /* segment type */ 683 SEL_KPL, /* segment descriptor priority level */ 684 1, /* segment descriptor present */ 685 1, /* long */ 686 0, /* default 32 vs 16 bit size */ 687 1 /* limit granularity (byte/page units)*/ }, 688/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 689{ 0x0, /* segment base address */ 690 0xfffff, /* length - all address space */ 691 SDT_MEMERA, /* segment type */ 692 SEL_UPL, /* segment descriptor priority level */ 693 1, /* segment descriptor present */ 694 0, /* long */ 695 1, /* default 32 vs 16 bit size */ 696 1 /* limit granularity (byte/page units)*/ }, 697/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 698{ 0x0, /* segment base address */ 699 0xfffff, /* length - all address space */ 700 SDT_MEMRWA, /* segment type */ 701 SEL_UPL, /* segment descriptor priority level */ 702 1, /* segment descriptor present */ 703 0, /* long */ 704 1, /* default 32 vs 16 bit size */ 705 1 /* limit granularity (byte/page units)*/ }, 706/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 707{ 0x0, /* segment base address */ 708 0xfffff, /* length - all address space */ 709 SDT_MEMERA, /* segment type */ 710 SEL_UPL, /* segment descriptor priority level */ 711 1, /* segment descriptor present */ 712 1, /* long */ 713 0, /* default 32 vs 16 bit size */ 714 1 /* limit granularity (byte/page units)*/ }, 715/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 716{ 717 0x0, /* segment base address */ 718 sizeof(struct amd64tss)-1,/* length - all address space */ 719 SDT_SYSTSS, /* segment type */ 720 SEL_KPL, /* segment descriptor priority level */ 721 1, /* segment descriptor present */ 722 0, /* long */ 723 0, /* unused - default 32 vs 16 bit size */ 724 0 /* limit granularity (byte/page units)*/ }, 725/* Actually, the TSS is a system descriptor which is double size */ 726{ 0x0, /* segment base address */ 727 0x0, /* length */ 728 0, /* segment type */ 729 0, /* segment descriptor priority level */ 730 0, /* segment descriptor present */ 731 0, /* long */ 732 0, /* default 32 vs 16 bit size */ 733 0 /* limit granularity (byte/page units)*/ }, 734/* GUGS32_SEL 8 32 bit GS Descriptor for user */ 735{ 0x0, /* segment base address */ 736 0xfffff, /* length - all address space */ 737 SDT_MEMRWA, /* segment type */ 738 SEL_UPL, /* segment descriptor priority level */ 739 1, /* segment descriptor present */ 740 0, /* long */ 741 1, /* default 32 vs 16 bit size */ 742 1 /* limit granularity (byte/page units)*/ }, 743}; 744 745void 746setidt(idx, func, typ, dpl, ist) 747 int idx; 748 inthand_t *func; 749 int typ; 750 int dpl; 751 int ist; 752{ 753 struct gate_descriptor *ip; 754 755 ip = idt + idx; 756 ip->gd_looffset = (uintptr_t)func; 757 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 758 ip->gd_ist = ist; 759 ip->gd_xx = 0; 760 ip->gd_type = typ; 761 ip->gd_dpl = dpl; 762 ip->gd_p = 1; 763 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 764} 765 766extern inthand_t 767 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 768 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 769 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 770 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 771 IDTVEC(xmm), IDTVEC(dblfault), 772 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 773 774void 775sdtossd(sd, ssd) 776 struct user_segment_descriptor *sd; 777 struct soft_segment_descriptor *ssd; 778{ 779 780 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 781 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 782 ssd->ssd_type = sd->sd_type; 783 ssd->ssd_dpl = sd->sd_dpl; 784 ssd->ssd_p = sd->sd_p; 785 ssd->ssd_long = sd->sd_long; 786 ssd->ssd_def32 = sd->sd_def32; 787 ssd->ssd_gran = sd->sd_gran; 788} 789 790void 791ssdtosd(ssd, sd) 792 struct soft_segment_descriptor *ssd; 793 struct user_segment_descriptor *sd; 794{ 795 796 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 797 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 798 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 799 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 800 sd->sd_type = ssd->ssd_type; 801 sd->sd_dpl = ssd->ssd_dpl; 802 sd->sd_p = ssd->ssd_p; 803 sd->sd_long = ssd->ssd_long; 804 sd->sd_def32 = ssd->ssd_def32; 805 sd->sd_gran = ssd->ssd_gran; 806} 807 808void 809ssdtosyssd(ssd, sd) 810 struct soft_segment_descriptor *ssd; 811 struct system_segment_descriptor *sd; 812{ 813 814 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 815 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 816 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 817 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 818 sd->sd_type = ssd->ssd_type; 819 sd->sd_dpl = ssd->ssd_dpl; 820 sd->sd_p = ssd->ssd_p; 821 sd->sd_gran = ssd->ssd_gran; 822} 823 824#if !defined(DEV_ATPIC) && defined(DEV_ISA) 825#include <isa/isavar.h> 826u_int 827isa_irq_pending(void) 828{ 829 830 return (0); 831} 832#endif 833 834u_int basemem; 835 836/* 837 * Populate the (physmap) array with base/bound pairs describing the 838 * available physical memory in the system, then test this memory and 839 * build the phys_avail array describing the actually-available memory. 840 * 841 * If we cannot accurately determine the physical memory map, then use 842 * value from the 0xE801 call, and failing that, the RTC. 843 * 844 * Total memory size may be set by the kernel environment variable 845 * hw.physmem or the compile-time define MAXMEM. 846 * 847 * XXX first should be vm_paddr_t. 848 */ 849static void 850getmemsize(caddr_t kmdp, u_int64_t first) 851{ 852 int i, off, physmap_idx, pa_indx, da_indx; 853 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 854 u_long physmem_tunable; 855 pt_entry_t *pte; 856 struct bios_smap *smapbase, *smap, *smapend; 857 u_int32_t smapsize; 858 quad_t dcons_addr, dcons_size; 859 860 bzero(physmap, sizeof(physmap)); 861 basemem = 0; 862 physmap_idx = 0; 863 864 /* 865 * get memory map from INT 15:E820, kindly supplied by the loader. 866 * 867 * subr_module.c says: 868 * "Consumer may safely assume that size value precedes data." 869 * ie: an int32_t immediately precedes smap. 870 */ 871 smapbase = (struct bios_smap *)preload_search_info(kmdp, 872 MODINFO_METADATA | MODINFOMD_SMAP); 873 if (smapbase == NULL) 874 panic("No BIOS smap info from loader!"); 875 876 smapsize = *((u_int32_t *)smapbase - 1); 877 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 878 879 for (smap = smapbase; smap < smapend; smap++) { 880 if (boothowto & RB_VERBOSE) 881 printf("SMAP type=%02x base=%016lx len=%016lx\n", 882 smap->type, smap->base, smap->length); 883 884 if (smap->type != 0x01) 885 continue; 886 887 if (smap->length == 0) 888 continue; 889 890 for (i = 0; i <= physmap_idx; i += 2) { 891 if (smap->base < physmap[i + 1]) { 892 if (boothowto & RB_VERBOSE) 893 printf( 894 "Overlapping or non-monotonic memory region, ignoring second region\n"); 895 continue; 896 } 897 } 898 899 if (smap->base == physmap[physmap_idx + 1]) { 900 physmap[physmap_idx + 1] += smap->length; 901 continue; 902 } 903 904 physmap_idx += 2; 905 if (physmap_idx == PHYSMAP_SIZE) { 906 printf( 907 "Too many segments in the physical address map, giving up\n"); 908 break; 909 } 910 physmap[physmap_idx] = smap->base; 911 physmap[physmap_idx + 1] = smap->base + smap->length; 912 } 913 914 /* 915 * Find the 'base memory' segment for SMP 916 */ 917 basemem = 0; 918 for (i = 0; i <= physmap_idx; i += 2) { 919 if (physmap[i] == 0x00000000) { 920 basemem = physmap[i + 1] / 1024; 921 break; 922 } 923 } 924 if (basemem == 0) 925 panic("BIOS smap did not include a basemem segment!"); 926 927#ifdef SMP 928 /* make hole for AP bootstrap code */ 929 physmap[1] = mp_bootaddress(physmap[1] / 1024); 930#endif 931 932 /* 933 * Maxmem isn't the "maximum memory", it's one larger than the 934 * highest page of the physical address space. It should be 935 * called something like "Maxphyspage". We may adjust this 936 * based on ``hw.physmem'' and the results of the memory test. 937 */ 938 Maxmem = atop(physmap[physmap_idx + 1]); 939 940#ifdef MAXMEM 941 Maxmem = MAXMEM / 4; 942#endif 943 944 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 945 Maxmem = atop(physmem_tunable); 946 947 /* 948 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 949 * in the system. 950 */ 951 if (Maxmem > atop(physmap[physmap_idx + 1])) 952 Maxmem = atop(physmap[physmap_idx + 1]); 953 954 if (atop(physmap[physmap_idx + 1]) != Maxmem && 955 (boothowto & RB_VERBOSE)) 956 printf("Physical memory use set to %ldK\n", Maxmem * 4); 957 958 /* call pmap initialization to make new kernel address space */ 959 pmap_bootstrap(&first); 960 961 /* 962 * Size up each available chunk of physical memory. 963 */ 964 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 965 pa_indx = 0; 966 da_indx = 1; 967 phys_avail[pa_indx++] = physmap[0]; 968 phys_avail[pa_indx] = physmap[0]; 969 dump_avail[da_indx] = physmap[0]; 970 pte = CMAP1; 971 972 /* 973 * Get dcons buffer address 974 */ 975 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 976 getenv_quad("dcons.size", &dcons_size) == 0) 977 dcons_addr = 0; 978 979 /* 980 * physmap is in bytes, so when converting to page boundaries, 981 * round up the start address and round down the end address. 982 */ 983 for (i = 0; i <= physmap_idx; i += 2) { 984 vm_paddr_t end; 985 986 end = ptoa((vm_paddr_t)Maxmem); 987 if (physmap[i + 1] < end) 988 end = trunc_page(physmap[i + 1]); 989 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 990 int tmp, page_bad, full; 991 int *ptr = (int *)CADDR1; 992 993 full = FALSE; 994 /* 995 * block out kernel memory as not available. 996 */ 997 if (pa >= 0x100000 && pa < first) 998 goto do_dump_avail; 999 1000 /* 1001 * block out dcons buffer 1002 */ 1003 if (dcons_addr > 0 1004 && pa >= trunc_page(dcons_addr) 1005 && pa < dcons_addr + dcons_size) 1006 goto do_dump_avail; 1007 1008 page_bad = FALSE; 1009 1010 /* 1011 * map page into kernel: valid, read/write,non-cacheable 1012 */ 1013 *pte = pa | PG_V | PG_RW | PG_N; 1014 invltlb(); 1015 1016 tmp = *(int *)ptr; 1017 /* 1018 * Test for alternating 1's and 0's 1019 */ 1020 *(volatile int *)ptr = 0xaaaaaaaa; 1021 if (*(volatile int *)ptr != 0xaaaaaaaa) 1022 page_bad = TRUE; 1023 /* 1024 * Test for alternating 0's and 1's 1025 */ 1026 *(volatile int *)ptr = 0x55555555; 1027 if (*(volatile int *)ptr != 0x55555555) 1028 page_bad = TRUE; 1029 /* 1030 * Test for all 1's 1031 */ 1032 *(volatile int *)ptr = 0xffffffff; 1033 if (*(volatile int *)ptr != 0xffffffff) 1034 page_bad = TRUE; 1035 /* 1036 * Test for all 0's 1037 */ 1038 *(volatile int *)ptr = 0x0; 1039 if (*(volatile int *)ptr != 0x0) 1040 page_bad = TRUE; 1041 /* 1042 * Restore original value. 1043 */ 1044 *(int *)ptr = tmp; 1045 1046 /* 1047 * Adjust array of valid/good pages. 1048 */ 1049 if (page_bad == TRUE) 1050 continue; 1051 /* 1052 * If this good page is a continuation of the 1053 * previous set of good pages, then just increase 1054 * the end pointer. Otherwise start a new chunk. 1055 * Note that "end" points one higher than end, 1056 * making the range >= start and < end. 1057 * If we're also doing a speculative memory 1058 * test and we at or past the end, bump up Maxmem 1059 * so that we keep going. The first bad page 1060 * will terminate the loop. 1061 */ 1062 if (phys_avail[pa_indx] == pa) { 1063 phys_avail[pa_indx] += PAGE_SIZE; 1064 } else { 1065 pa_indx++; 1066 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1067 printf( 1068 "Too many holes in the physical address space, giving up\n"); 1069 pa_indx--; 1070 full = TRUE; 1071 goto do_dump_avail; 1072 } 1073 phys_avail[pa_indx++] = pa; /* start */ 1074 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1075 } 1076 physmem++; 1077do_dump_avail: 1078 if (dump_avail[da_indx] == pa) { 1079 dump_avail[da_indx] += PAGE_SIZE; 1080 } else { 1081 da_indx++; 1082 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1083 da_indx--; 1084 goto do_next; 1085 } 1086 dump_avail[da_indx++] = pa; /* start */ 1087 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1088 } 1089do_next: 1090 if (full) 1091 break; 1092 } 1093 } 1094 *pte = 0; 1095 invltlb(); 1096 1097 /* 1098 * XXX 1099 * The last chunk must contain at least one page plus the message 1100 * buffer to avoid complicating other code (message buffer address 1101 * calculation, etc.). 1102 */ 1103 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1104 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1105 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1106 phys_avail[pa_indx--] = 0; 1107 phys_avail[pa_indx--] = 0; 1108 } 1109 1110 Maxmem = atop(phys_avail[pa_indx]); 1111 1112 /* Trim off space for the message buffer. */ 1113 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1114 1115 /* Map the message buffer. */ 1116 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1117 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1118 off); 1119} 1120 1121u_int64_t 1122hammer_time(u_int64_t modulep, u_int64_t physfree) 1123{ 1124 caddr_t kmdp; 1125 int gsel_tss, x; 1126 struct pcpu *pc; 1127 u_int64_t msr; 1128 char *env; 1129 1130 thread0.td_kstack = physfree + KERNBASE; 1131 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1132 physfree += KSTACK_PAGES * PAGE_SIZE; 1133 thread0.td_pcb = (struct pcb *) 1134 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1135 1136 /* 1137 * This may be done better later if it gets more high level 1138 * components in it. If so just link td->td_proc here. 1139 */ 1140 proc_linkup(&proc0, &thread0); 1141 1142 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1143 preload_bootstrap_relocate(KERNBASE); 1144 kmdp = preload_search_by_type("elf kernel"); 1145 if (kmdp == NULL) 1146 kmdp = preload_search_by_type("elf64 kernel"); 1147 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1148 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1149#ifdef DDB 1150 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1151 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1152#endif 1153 1154 /* Init basic tunables, hz etc */ 1155 init_param1(); 1156 1157 /* 1158 * make gdt memory segments 1159 */ 1160 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1161 1162 for (x = 0; x < NGDT; x++) { 1163 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1164 ssdtosd(&gdt_segs[x], &gdt[x]); 1165 } 1166 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1167 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1168 1169 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1170 r_gdt.rd_base = (long) gdt; 1171 lgdt(&r_gdt); 1172 pc = &__pcpu[0]; 1173 1174 wrmsr(MSR_FSBASE, 0); /* User value */ 1175 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1176 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1177 1178 pcpu_init(pc, 0, sizeof(struct pcpu)); 1179 PCPU_SET(prvspace, pc); 1180 PCPU_SET(curthread, &thread0); 1181 PCPU_SET(curpcb, thread0.td_pcb); 1182 PCPU_SET(curtid, thread0.td_tid); 1183 PCPU_SET(tssp, &common_tss[0]); 1184 1185 /* 1186 * Initialize mutexes. 1187 * 1188 * icu_lock: in order to allow an interrupt to occur in a critical 1189 * section, to set pcpu->ipending (etc...) properly, we 1190 * must be able to get the icu lock, so it can't be 1191 * under witness. 1192 */ 1193 mutex_init(); 1194 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1195 1196 /* exceptions */ 1197 for (x = 0; x < NIDT; x++) 1198 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1199 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1200 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1201 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1); 1202 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1203 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1204 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1205 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1206 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1207 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1208 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1209 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1210 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1211 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1212 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1213 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1214 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1215 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1216 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1217 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1218 1219 r_idt.rd_limit = sizeof(idt0) - 1; 1220 r_idt.rd_base = (long) idt; 1221 lidt(&r_idt); 1222 1223 /* 1224 * Initialize the i8254 before the console so that console 1225 * initialization can use DELAY(). 1226 */ 1227 i8254_init(); 1228 1229 /* 1230 * Initialize the console before we print anything out. 1231 */ 1232 cninit(); 1233 1234#ifdef DEV_ISA 1235#ifdef DEV_ATPIC 1236 elcr_probe(); 1237 atpic_startup(); 1238#else 1239 /* Reset and mask the atpics and leave them shut down. */ 1240 atpic_reset(); 1241 1242 /* 1243 * Point the ICU spurious interrupt vectors at the APIC spurious 1244 * interrupt handler. 1245 */ 1246 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1247 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1248#endif 1249#else 1250#error "have you forgotten the isa device?"; 1251#endif 1252 1253 kdb_init(); 1254 1255#ifdef KDB 1256 if (boothowto & RB_KDB) 1257 kdb_enter("Boot flags requested debugger"); 1258#endif 1259 1260 identify_cpu(); /* Final stage of CPU initialization */ 1261 initializecpu(); /* Initialize CPU registers */ 1262 1263 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1264 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1265 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1266 /* Ensure the stack is aligned to 16 bytes */ 1267 common_tss[0].tss_rsp0 &= ~0xFul; 1268 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1269 1270 /* doublefault stack space, runs on ist1 */ 1271 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1272 1273 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1274 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1275 1276 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1277 ltr(gsel_tss); 1278 1279 /* Set up the fast syscall stuff */ 1280 msr = rdmsr(MSR_EFER) | EFER_SCE; 1281 wrmsr(MSR_EFER, msr); 1282 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1283 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1284 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1285 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1286 wrmsr(MSR_STAR, msr); 1287 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1288 1289 getmemsize(kmdp, physfree); 1290 init_param2(physmem); 1291 1292 /* now running on new page tables, configured,and u/iom is accessible */ 1293 1294 msgbufinit(msgbufp, MSGBUF_SIZE); 1295 fpuinit(); 1296 1297 /* transfer to user mode */ 1298 1299 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1300 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1301 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1302 1303 /* setup proc 0's pcb */ 1304 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1305 thread0.td_pcb->pcb_cr3 = KPML4phys; 1306 thread0.td_frame = &proc0_tf; 1307 1308 env = getenv("kernelname"); 1309 if (env != NULL) 1310 strlcpy(kernelname, env, sizeof(kernelname)); 1311 1312 /* Location of kernel stack for locore */ 1313 return ((u_int64_t)thread0.td_pcb); 1314} 1315 1316void 1317cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1318{ 1319 1320 pcpu->pc_acpi_id = 0xffffffff; 1321} 1322 1323void 1324spinlock_enter(void) 1325{ 1326 struct thread *td; 1327 1328 td = curthread; 1329 if (td->td_md.md_spinlock_count == 0) 1330 td->td_md.md_saved_flags = intr_disable(); 1331 td->td_md.md_spinlock_count++; 1332 critical_enter(); 1333} 1334 1335void 1336spinlock_exit(void) 1337{ 1338 struct thread *td; 1339 1340 td = curthread; 1341 critical_exit(); 1342 td->td_md.md_spinlock_count--; 1343 if (td->td_md.md_spinlock_count == 0) 1344 intr_restore(td->td_md.md_saved_flags); 1345} 1346 1347/* 1348 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1349 * we want to start a backtrace from the function that caused us to enter 1350 * the debugger. We have the context in the trapframe, but base the trace 1351 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1352 * enough for a backtrace. 1353 */ 1354void 1355makectx(struct trapframe *tf, struct pcb *pcb) 1356{ 1357 1358 pcb->pcb_r12 = tf->tf_r12; 1359 pcb->pcb_r13 = tf->tf_r13; 1360 pcb->pcb_r14 = tf->tf_r14; 1361 pcb->pcb_r15 = tf->tf_r15; 1362 pcb->pcb_rbp = tf->tf_rbp; 1363 pcb->pcb_rbx = tf->tf_rbx; 1364 pcb->pcb_rip = tf->tf_rip; 1365 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1366} 1367 1368int 1369ptrace_set_pc(struct thread *td, unsigned long addr) 1370{ 1371 td->td_frame->tf_rip = addr; 1372 return (0); 1373} 1374 1375int 1376ptrace_single_step(struct thread *td) 1377{ 1378 td->td_frame->tf_rflags |= PSL_T; 1379 return (0); 1380} 1381 1382int 1383ptrace_clear_single_step(struct thread *td) 1384{ 1385 td->td_frame->tf_rflags &= ~PSL_T; 1386 return (0); 1387} 1388 1389int 1390fill_regs(struct thread *td, struct reg *regs) 1391{ 1392 struct trapframe *tp; 1393 1394 tp = td->td_frame; 1395 regs->r_r15 = tp->tf_r15; 1396 regs->r_r14 = tp->tf_r14; 1397 regs->r_r13 = tp->tf_r13; 1398 regs->r_r12 = tp->tf_r12; 1399 regs->r_r11 = tp->tf_r11; 1400 regs->r_r10 = tp->tf_r10; 1401 regs->r_r9 = tp->tf_r9; 1402 regs->r_r8 = tp->tf_r8; 1403 regs->r_rdi = tp->tf_rdi; 1404 regs->r_rsi = tp->tf_rsi; 1405 regs->r_rbp = tp->tf_rbp; 1406 regs->r_rbx = tp->tf_rbx; 1407 regs->r_rdx = tp->tf_rdx; 1408 regs->r_rcx = tp->tf_rcx; 1409 regs->r_rax = tp->tf_rax; 1410 regs->r_rip = tp->tf_rip; 1411 regs->r_cs = tp->tf_cs; 1412 regs->r_rflags = tp->tf_rflags; 1413 regs->r_rsp = tp->tf_rsp; 1414 regs->r_ss = tp->tf_ss; 1415 return (0); 1416} 1417 1418int 1419set_regs(struct thread *td, struct reg *regs) 1420{ 1421 struct trapframe *tp; 1422 register_t rflags; 1423 1424 tp = td->td_frame; 1425 rflags = regs->r_rflags & 0xffffffff; 1426 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1427 return (EINVAL); 1428 tp->tf_r15 = regs->r_r15; 1429 tp->tf_r14 = regs->r_r14; 1430 tp->tf_r13 = regs->r_r13; 1431 tp->tf_r12 = regs->r_r12; 1432 tp->tf_r11 = regs->r_r11; 1433 tp->tf_r10 = regs->r_r10; 1434 tp->tf_r9 = regs->r_r9; 1435 tp->tf_r8 = regs->r_r8; 1436 tp->tf_rdi = regs->r_rdi; 1437 tp->tf_rsi = regs->r_rsi; 1438 tp->tf_rbp = regs->r_rbp; 1439 tp->tf_rbx = regs->r_rbx; 1440 tp->tf_rdx = regs->r_rdx; 1441 tp->tf_rcx = regs->r_rcx; 1442 tp->tf_rax = regs->r_rax; 1443 tp->tf_rip = regs->r_rip; 1444 tp->tf_cs = regs->r_cs; 1445 tp->tf_rflags = rflags; 1446 tp->tf_rsp = regs->r_rsp; 1447 tp->tf_ss = regs->r_ss; 1448 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1449 return (0); 1450} 1451 1452/* XXX check all this stuff! */ 1453/* externalize from sv_xmm */ 1454static void 1455fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1456{ 1457 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1458 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1459 int i; 1460 1461 /* pcb -> fpregs */ 1462 bzero(fpregs, sizeof(*fpregs)); 1463 1464 /* FPU control/status */ 1465 penv_fpreg->en_cw = penv_xmm->en_cw; 1466 penv_fpreg->en_sw = penv_xmm->en_sw; 1467 penv_fpreg->en_tw = penv_xmm->en_tw; 1468 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1469 penv_fpreg->en_rip = penv_xmm->en_rip; 1470 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1471 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1472 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1473 1474 /* FPU registers */ 1475 for (i = 0; i < 8; ++i) 1476 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1477 1478 /* SSE registers */ 1479 for (i = 0; i < 16; ++i) 1480 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1481} 1482 1483/* internalize from fpregs into sv_xmm */ 1484static void 1485set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1486{ 1487 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1488 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1489 int i; 1490 1491 /* fpregs -> pcb */ 1492 /* FPU control/status */ 1493 penv_xmm->en_cw = penv_fpreg->en_cw; 1494 penv_xmm->en_sw = penv_fpreg->en_sw; 1495 penv_xmm->en_tw = penv_fpreg->en_tw; 1496 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1497 penv_xmm->en_rip = penv_fpreg->en_rip; 1498 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1499 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1500 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1501 1502 /* FPU registers */ 1503 for (i = 0; i < 8; ++i) 1504 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1505 1506 /* SSE registers */ 1507 for (i = 0; i < 16; ++i) 1508 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1509} 1510 1511/* externalize from td->pcb */ 1512int 1513fill_fpregs(struct thread *td, struct fpreg *fpregs) 1514{ 1515 1516 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1517 return (0); 1518} 1519 1520/* internalize to td->pcb */ 1521int 1522set_fpregs(struct thread *td, struct fpreg *fpregs) 1523{ 1524 1525 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1526 return (0); 1527} 1528 1529/* 1530 * Get machine context. 1531 */ 1532int 1533get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1534{ 1535 struct trapframe *tp; 1536 1537 tp = td->td_frame; 1538 PROC_LOCK(curthread->td_proc); 1539 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1540 PROC_UNLOCK(curthread->td_proc); 1541 mcp->mc_r15 = tp->tf_r15; 1542 mcp->mc_r14 = tp->tf_r14; 1543 mcp->mc_r13 = tp->tf_r13; 1544 mcp->mc_r12 = tp->tf_r12; 1545 mcp->mc_r11 = tp->tf_r11; 1546 mcp->mc_r10 = tp->tf_r10; 1547 mcp->mc_r9 = tp->tf_r9; 1548 mcp->mc_r8 = tp->tf_r8; 1549 mcp->mc_rdi = tp->tf_rdi; 1550 mcp->mc_rsi = tp->tf_rsi; 1551 mcp->mc_rbp = tp->tf_rbp; 1552 mcp->mc_rbx = tp->tf_rbx; 1553 mcp->mc_rcx = tp->tf_rcx; 1554 mcp->mc_rflags = tp->tf_rflags; 1555 if (flags & GET_MC_CLEAR_RET) { 1556 mcp->mc_rax = 0; 1557 mcp->mc_rdx = 0; 1558 mcp->mc_rflags &= ~PSL_C; 1559 } else { 1560 mcp->mc_rax = tp->tf_rax; 1561 mcp->mc_rdx = tp->tf_rdx; 1562 } 1563 mcp->mc_rip = tp->tf_rip; 1564 mcp->mc_cs = tp->tf_cs; 1565 mcp->mc_rsp = tp->tf_rsp; 1566 mcp->mc_ss = tp->tf_ss; 1567 mcp->mc_len = sizeof(*mcp); 1568 get_fpcontext(td, mcp); 1569 return (0); 1570} 1571 1572/* 1573 * Set machine context. 1574 * 1575 * However, we don't set any but the user modifiable flags, and we won't 1576 * touch the cs selector. 1577 */ 1578int 1579set_mcontext(struct thread *td, const mcontext_t *mcp) 1580{ 1581 struct trapframe *tp; 1582 long rflags; 1583 int ret; 1584 1585 tp = td->td_frame; 1586 if (mcp->mc_len != sizeof(*mcp)) 1587 return (EINVAL); 1588 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1589 (tp->tf_rflags & ~PSL_USERCHANGE); 1590 ret = set_fpcontext(td, mcp); 1591 if (ret != 0) 1592 return (ret); 1593 tp->tf_r15 = mcp->mc_r15; 1594 tp->tf_r14 = mcp->mc_r14; 1595 tp->tf_r13 = mcp->mc_r13; 1596 tp->tf_r12 = mcp->mc_r12; 1597 tp->tf_r11 = mcp->mc_r11; 1598 tp->tf_r10 = mcp->mc_r10; 1599 tp->tf_r9 = mcp->mc_r9; 1600 tp->tf_r8 = mcp->mc_r8; 1601 tp->tf_rdi = mcp->mc_rdi; 1602 tp->tf_rsi = mcp->mc_rsi; 1603 tp->tf_rbp = mcp->mc_rbp; 1604 tp->tf_rbx = mcp->mc_rbx; 1605 tp->tf_rdx = mcp->mc_rdx; 1606 tp->tf_rcx = mcp->mc_rcx; 1607 tp->tf_rax = mcp->mc_rax; 1608 tp->tf_rip = mcp->mc_rip; 1609 tp->tf_rflags = rflags; 1610 tp->tf_rsp = mcp->mc_rsp; 1611 tp->tf_ss = mcp->mc_ss; 1612 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1613 return (0); 1614} 1615 1616static void 1617get_fpcontext(struct thread *td, mcontext_t *mcp) 1618{ 1619 1620 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1621 mcp->mc_fpformat = fpuformat(); 1622} 1623 1624static int 1625set_fpcontext(struct thread *td, const mcontext_t *mcp) 1626{ 1627 struct savefpu *fpstate; 1628 1629 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1630 return (0); 1631 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1632 return (EINVAL); 1633 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1634 /* We don't care what state is left in the FPU or PCB. */ 1635 fpstate_drop(td); 1636 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1637 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1638 /* 1639 * XXX we violate the dubious requirement that fpusetregs() 1640 * be called with interrupts disabled. 1641 * XXX obsolete on trap-16 systems? 1642 */ 1643 fpstate = (struct savefpu *)&mcp->mc_fpstate; 1644 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 1645 fpusetregs(td, fpstate); 1646 } else 1647 return (EINVAL); 1648 return (0); 1649} 1650 1651void 1652fpstate_drop(struct thread *td) 1653{ 1654 register_t s; 1655 1656 s = intr_disable(); 1657 if (PCPU_GET(fpcurthread) == td) 1658 fpudrop(); 1659 /* 1660 * XXX force a full drop of the fpu. The above only drops it if we 1661 * owned it. 1662 * 1663 * XXX I don't much like fpugetregs()'s semantics of doing a full 1664 * drop. Dropping only to the pcb matches fnsave's behaviour. 1665 * We only need to drop to !PCB_INITDONE in sendsig(). But 1666 * sendsig() is the only caller of fpugetregs()... perhaps we just 1667 * have too many layers. 1668 */ 1669 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1670 intr_restore(s); 1671} 1672 1673int 1674fill_dbregs(struct thread *td, struct dbreg *dbregs) 1675{ 1676 struct pcb *pcb; 1677 1678 if (td == NULL) { 1679 dbregs->dr[0] = rdr0(); 1680 dbregs->dr[1] = rdr1(); 1681 dbregs->dr[2] = rdr2(); 1682 dbregs->dr[3] = rdr3(); 1683 dbregs->dr[6] = rdr6(); 1684 dbregs->dr[7] = rdr7(); 1685 } else { 1686 pcb = td->td_pcb; 1687 dbregs->dr[0] = pcb->pcb_dr0; 1688 dbregs->dr[1] = pcb->pcb_dr1; 1689 dbregs->dr[2] = pcb->pcb_dr2; 1690 dbregs->dr[3] = pcb->pcb_dr3; 1691 dbregs->dr[6] = pcb->pcb_dr6; 1692 dbregs->dr[7] = pcb->pcb_dr7; 1693 } 1694 dbregs->dr[4] = 0; 1695 dbregs->dr[5] = 0; 1696 dbregs->dr[8] = 0; 1697 dbregs->dr[9] = 0; 1698 dbregs->dr[10] = 0; 1699 dbregs->dr[11] = 0; 1700 dbregs->dr[12] = 0; 1701 dbregs->dr[13] = 0; 1702 dbregs->dr[14] = 0; 1703 dbregs->dr[15] = 0; 1704 return (0); 1705} 1706 1707int 1708set_dbregs(struct thread *td, struct dbreg *dbregs) 1709{ 1710 struct pcb *pcb; 1711 int i; 1712 1713 if (td == NULL) { 1714 load_dr0(dbregs->dr[0]); 1715 load_dr1(dbregs->dr[1]); 1716 load_dr2(dbregs->dr[2]); 1717 load_dr3(dbregs->dr[3]); 1718 load_dr6(dbregs->dr[6]); 1719 load_dr7(dbregs->dr[7]); 1720 } else { 1721 /* 1722 * Don't let an illegal value for dr7 get set. Specifically, 1723 * check for undefined settings. Setting these bit patterns 1724 * result in undefined behaviour and can lead to an unexpected 1725 * TRCTRAP or a general protection fault right here. 1726 * Upper bits of dr6 and dr7 must not be set 1727 */ 1728 for (i = 0; i < 4; i++) { 1729 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 1730 return (EINVAL); 1731 if (td->td_frame->tf_cs == _ucode32sel && 1732 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 1733 return (EINVAL); 1734 } 1735 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1736 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1737 return (EINVAL); 1738 1739 pcb = td->td_pcb; 1740 1741 /* 1742 * Don't let a process set a breakpoint that is not within the 1743 * process's address space. If a process could do this, it 1744 * could halt the system by setting a breakpoint in the kernel 1745 * (if ddb was enabled). Thus, we need to check to make sure 1746 * that no breakpoints are being enabled for addresses outside 1747 * process's address space. 1748 * 1749 * XXX - what about when the watched area of the user's 1750 * address space is written into from within the kernel 1751 * ... wouldn't that still cause a breakpoint to be generated 1752 * from within kernel mode? 1753 */ 1754 1755 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 1756 /* dr0 is enabled */ 1757 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1758 return (EINVAL); 1759 } 1760 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 1761 /* dr1 is enabled */ 1762 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1763 return (EINVAL); 1764 } 1765 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 1766 /* dr2 is enabled */ 1767 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1768 return (EINVAL); 1769 } 1770 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 1771 /* dr3 is enabled */ 1772 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1773 return (EINVAL); 1774 } 1775 1776 pcb->pcb_dr0 = dbregs->dr[0]; 1777 pcb->pcb_dr1 = dbregs->dr[1]; 1778 pcb->pcb_dr2 = dbregs->dr[2]; 1779 pcb->pcb_dr3 = dbregs->dr[3]; 1780 pcb->pcb_dr6 = dbregs->dr[6]; 1781 pcb->pcb_dr7 = dbregs->dr[7]; 1782 1783 pcb->pcb_flags |= PCB_DBREGS; 1784 } 1785 1786 return (0); 1787} 1788 1789void 1790reset_dbregs(void) 1791{ 1792 1793 load_dr7(0); /* Turn off the control bits first */ 1794 load_dr0(0); 1795 load_dr1(0); 1796 load_dr2(0); 1797 load_dr3(0); 1798 load_dr6(0); 1799} 1800 1801/* 1802 * Return > 0 if a hardware breakpoint has been hit, and the 1803 * breakpoint was in user space. Return 0, otherwise. 1804 */ 1805int 1806user_dbreg_trap(void) 1807{ 1808 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1809 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1810 int nbp; /* number of breakpoints that triggered */ 1811 caddr_t addr[4]; /* breakpoint addresses */ 1812 int i; 1813 1814 dr7 = rdr7(); 1815 if ((dr7 & 0x000000ff) == 0) { 1816 /* 1817 * all GE and LE bits in the dr7 register are zero, 1818 * thus the trap couldn't have been caused by the 1819 * hardware debug registers 1820 */ 1821 return 0; 1822 } 1823 1824 nbp = 0; 1825 dr6 = rdr6(); 1826 bp = dr6 & 0x0000000f; 1827 1828 if (!bp) { 1829 /* 1830 * None of the breakpoint bits are set meaning this 1831 * trap was not caused by any of the debug registers 1832 */ 1833 return 0; 1834 } 1835 1836 /* 1837 * at least one of the breakpoints were hit, check to see 1838 * which ones and if any of them are user space addresses 1839 */ 1840 1841 if (bp & 0x01) { 1842 addr[nbp++] = (caddr_t)rdr0(); 1843 } 1844 if (bp & 0x02) { 1845 addr[nbp++] = (caddr_t)rdr1(); 1846 } 1847 if (bp & 0x04) { 1848 addr[nbp++] = (caddr_t)rdr2(); 1849 } 1850 if (bp & 0x08) { 1851 addr[nbp++] = (caddr_t)rdr3(); 1852 } 1853 1854 for (i = 0; i < nbp; i++) { 1855 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 1856 /* 1857 * addr[i] is in user space 1858 */ 1859 return nbp; 1860 } 1861 } 1862 1863 /* 1864 * None of the breakpoints are in user space. 1865 */ 1866 return 0; 1867} 1868 1869#ifdef KDB 1870 1871/* 1872 * Provide inb() and outb() as functions. They are normally only 1873 * available as macros calling inlined functions, thus cannot be 1874 * called from the debugger. 1875 * 1876 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1877 */ 1878 1879#undef inb 1880#undef outb 1881 1882/* silence compiler warnings */ 1883u_char inb(u_int); 1884void outb(u_int, u_char); 1885 1886u_char 1887inb(u_int port) 1888{ 1889 u_char data; 1890 /* 1891 * We use %%dx and not %1 here because i/o is done at %dx and not at 1892 * %edx, while gcc generates inferior code (movw instead of movl) 1893 * if we tell it to load (u_short) port. 1894 */ 1895 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1896 return (data); 1897} 1898 1899void 1900outb(u_int port, u_char data) 1901{ 1902 u_char al; 1903 /* 1904 * Use an unnecessary assignment to help gcc's register allocator. 1905 * This make a large difference for gcc-1.40 and a tiny difference 1906 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1907 * best results. gcc-2.6.0 can't handle this. 1908 */ 1909 al = data; 1910 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1911} 1912 1913#endif /* KDB */ 1914