machdep.c revision 130224
1/*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 130224 2004-06-08 01:02:52Z peter $"); 43 44#include "opt_atalk.h" 45#include "opt_atpic.h" 46#include "opt_compat.h" 47#include "opt_cpu.h" 48#include "opt_ddb.h" 49#include "opt_inet.h" 50#include "opt_ipx.h" 51#include "opt_isa.h" 52#include "opt_kstack_pages.h" 53#include "opt_maxmem.h" 54#include "opt_msgbuf.h" 55#include "opt_perfmon.h" 56 57#include <sys/param.h> 58#include <sys/systm.h> 59#include <sys/sysproto.h> 60#include <sys/signalvar.h> 61#include <sys/imgact.h> 62#include <sys/kernel.h> 63#include <sys/ktr.h> 64#include <sys/linker.h> 65#include <sys/lock.h> 66#include <sys/malloc.h> 67#include <sys/mutex.h> 68#include <sys/pcpu.h> 69#include <sys/proc.h> 70#include <sys/bio.h> 71#include <sys/buf.h> 72#include <sys/reboot.h> 73#include <sys/callout.h> 74#include <sys/msgbuf.h> 75#include <sys/sched.h> 76#include <sys/sysent.h> 77#include <sys/sysctl.h> 78#include <sys/ucontext.h> 79#include <sys/vmmeter.h> 80#include <sys/bus.h> 81#include <sys/eventhandler.h> 82 83#include <vm/vm.h> 84#include <vm/vm_param.h> 85#include <vm/vm_kern.h> 86#include <vm/vm_object.h> 87#include <vm/vm_page.h> 88#include <vm/vm_map.h> 89#include <vm/vm_pager.h> 90#include <vm/vm_extern.h> 91 92#include <sys/user.h> 93#include <sys/exec.h> 94#include <sys/cons.h> 95 96#include <ddb/ddb.h> 97 98#include <net/netisr.h> 99 100#include <machine/cpu.h> 101#include <machine/cputypes.h> 102#include <machine/reg.h> 103#include <machine/clock.h> 104#include <machine/specialreg.h> 105#include <machine/intr_machdep.h> 106#include <machine/md_var.h> 107#include <machine/metadata.h> 108#include <machine/proc.h> 109#ifdef PERFMON 110#include <machine/perfmon.h> 111#endif 112#include <machine/tss.h> 113#ifdef SMP 114#include <machine/smp.h> 115#endif 116 117#include <amd64/isa/icu.h> 118 119#include <isa/isareg.h> 120#include <isa/rtc.h> 121#include <sys/ptrace.h> 122#include <machine/sigframe.h> 123 124/* Sanity check for __curthread() */ 125CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 126 127extern u_int64_t hammer_time(u_int64_t, u_int64_t); 128extern void dblfault_handler(void); 129 130extern void printcpuinfo(void); /* XXX header file */ 131extern void identify_cpu(void); 132extern void panicifcpuunsupported(void); 133 134#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 135#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 136 137static void cpu_startup(void *); 138static void get_fpcontext(struct thread *td, mcontext_t *mcp); 139static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 140SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 141 142int _udatasel, _ucodesel, _ucode32sel; 143u_long atdevbase; 144 145int cold = 1; 146 147long Maxmem = 0; 148 149vm_paddr_t phys_avail[20]; 150 151/* must be 2 less so 0 0 can signal end of chunks */ 152#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 153 154struct kva_md_info kmi; 155 156static struct trapframe proc0_tf; 157struct region_descriptor r_gdt, r_idt; 158 159struct pcpu __pcpu[MAXCPU]; 160 161struct mtx icu_lock; 162 163#ifdef DDB 164void *ksym_start, *ksym_end; 165#endif 166 167static void 168cpu_startup(dummy) 169 void *dummy; 170{ 171 /* 172 * Good {morning,afternoon,evening,night}. 173 */ 174 startrtclock(); 175 printcpuinfo(); 176 panicifcpuunsupported(); 177#ifdef PERFMON 178 perfmon_init(); 179#endif 180 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 181 ptoa((uintmax_t)Maxmem) / 1048576); 182 /* 183 * Display any holes after the first chunk of extended memory. 184 */ 185 if (bootverbose) { 186 int indx; 187 188 printf("Physical memory chunk(s):\n"); 189 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 190 vm_paddr_t size; 191 192 size = phys_avail[indx + 1] - phys_avail[indx]; 193 printf( 194 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 195 (uintmax_t)phys_avail[indx], 196 (uintmax_t)phys_avail[indx + 1] - 1, 197 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 198 } 199 } 200 201 vm_ksubmap_init(&kmi); 202 203 printf("avail memory = %ju (%ju MB)\n", 204 ptoa((uintmax_t)cnt.v_free_count), 205 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 206 207 /* 208 * Set up buffers, so they can be used to read disk labels. 209 */ 210 bufinit(); 211 vm_pager_bufferinit(); 212 213 cpu_setregs(); 214} 215 216/* 217 * Send an interrupt to process. 218 * 219 * Stack is set up to allow sigcode stored 220 * at top to call routine, followed by kcall 221 * to sigreturn routine below. After sigreturn 222 * resets the signal mask, the stack, and the 223 * frame pointer, it returns to the user 224 * specified pc, psl. 225 */ 226void 227sendsig(catcher, sig, mask, code) 228 sig_t catcher; 229 int sig; 230 sigset_t *mask; 231 u_long code; 232{ 233 struct sigframe sf, *sfp; 234 struct proc *p; 235 struct thread *td; 236 struct sigacts *psp; 237 char *sp; 238 struct trapframe *regs; 239 int oonstack; 240 241 td = curthread; 242 p = td->td_proc; 243 PROC_LOCK_ASSERT(p, MA_OWNED); 244 psp = p->p_sigacts; 245 mtx_assert(&psp->ps_mtx, MA_OWNED); 246 regs = td->td_frame; 247 oonstack = sigonstack(regs->tf_rsp); 248 249 /* Save user context. */ 250 bzero(&sf, sizeof(sf)); 251 sf.sf_uc.uc_sigmask = *mask; 252 sf.sf_uc.uc_stack = td->td_sigstk; 253 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 254 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 255 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 256 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 257 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 258 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 259 fpstate_drop(td); 260 261 /* Allocate space for the signal handler context. */ 262 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 263 SIGISMEMBER(psp->ps_sigonstack, sig)) { 264 sp = td->td_sigstk.ss_sp + 265 td->td_sigstk.ss_size - sizeof(struct sigframe); 266#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 267 td->td_sigstk.ss_flags |= SS_ONSTACK; 268#endif 269 } else 270 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 271 /* Align to 16 bytes. */ 272 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 273 274 /* Translate the signal if appropriate. */ 275 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 276 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 277 278 /* Build the argument list for the signal handler. */ 279 regs->tf_rdi = sig; /* arg 1 in %rdi */ 280 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 281 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 282 /* Signal handler installed with SA_SIGINFO. */ 283 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 284 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 285 286 /* Fill in POSIX parts */ 287 sf.sf_si.si_signo = sig; 288 sf.sf_si.si_code = code; 289 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 290 } else { 291 /* Old FreeBSD-style arguments. */ 292 regs->tf_rsi = code; /* arg 2 in %rsi */ 293 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 294 sf.sf_ahu.sf_handler = catcher; 295 } 296 mtx_unlock(&psp->ps_mtx); 297 PROC_UNLOCK(p); 298 299 /* 300 * Copy the sigframe out to the user's stack. 301 */ 302 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 303#ifdef DEBUG 304 printf("process %ld has trashed its stack\n", (long)p->p_pid); 305#endif 306 PROC_LOCK(p); 307 sigexit(td, SIGILL); 308 } 309 310 regs->tf_rsp = (long)sfp; 311 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 312 regs->tf_rflags &= ~PSL_T; 313 regs->tf_cs = _ucodesel; 314 PROC_LOCK(p); 315 mtx_lock(&psp->ps_mtx); 316} 317 318/* 319 * Build siginfo_t for SA thread 320 */ 321void 322cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 323{ 324 struct proc *p; 325 struct thread *td; 326 struct trapframe *regs; 327 328 td = curthread; 329 p = td->td_proc; 330 regs = td->td_frame; 331 PROC_LOCK_ASSERT(p, MA_OWNED); 332 333 bzero(si, sizeof(*si)); 334 si->si_signo = sig; 335 si->si_code = code; 336 si->si_addr = (void *)regs->tf_addr; 337 /* XXXKSE fill other fields */ 338} 339 340/* 341 * System call to cleanup state after a signal 342 * has been taken. Reset signal mask and 343 * stack state from context left by sendsig (above). 344 * Return to previous pc and psl as specified by 345 * context left by sendsig. Check carefully to 346 * make sure that the user has not modified the 347 * state to gain improper privileges. 348 * 349 * MPSAFE 350 */ 351int 352sigreturn(td, uap) 353 struct thread *td; 354 struct sigreturn_args /* { 355 const __ucontext *sigcntxp; 356 } */ *uap; 357{ 358 ucontext_t uc; 359 struct proc *p = td->td_proc; 360 struct trapframe *regs; 361 const ucontext_t *ucp; 362 long rflags; 363 int cs, error, ret; 364 365 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 366 if (error != 0) 367 return (error); 368 ucp = &uc; 369 regs = td->td_frame; 370 rflags = ucp->uc_mcontext.mc_rflags; 371 /* 372 * Don't allow users to change privileged or reserved flags. 373 */ 374 /* 375 * XXX do allow users to change the privileged flag PSL_RF. 376 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 377 * should sometimes set it there too. tf_rflags is kept in 378 * the signal context during signal handling and there is no 379 * other place to remember it, so the PSL_RF bit may be 380 * corrupted by the signal handler without us knowing. 381 * Corruption of the PSL_RF bit at worst causes one more or 382 * one less debugger trap, so allowing it is fairly harmless. 383 */ 384 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 385 printf("sigreturn: rflags = 0x%lx\n", rflags); 386 return (EINVAL); 387 } 388 389 /* 390 * Don't allow users to load a valid privileged %cs. Let the 391 * hardware check for invalid selectors, excess privilege in 392 * other selectors, invalid %eip's and invalid %esp's. 393 */ 394 cs = ucp->uc_mcontext.mc_cs; 395 if (!CS_SECURE(cs)) { 396 printf("sigreturn: cs = 0x%x\n", cs); 397 trapsignal(td, SIGBUS, T_PROTFLT); 398 return (EINVAL); 399 } 400 401 ret = set_fpcontext(td, &ucp->uc_mcontext); 402 if (ret != 0) 403 return (ret); 404 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 405 406 PROC_LOCK(p); 407#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 408 if (ucp->uc_mcontext.mc_onstack & 1) 409 td->td_sigstk.ss_flags |= SS_ONSTACK; 410 else 411 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 412#endif 413 414 td->td_sigmask = ucp->uc_sigmask; 415 SIG_CANTMASK(td->td_sigmask); 416 signotify(td); 417 PROC_UNLOCK(p); 418 td->td_pcb->pcb_flags |= PCB_FULLCTX; 419 return (EJUSTRETURN); 420} 421 422#ifdef COMPAT_FREEBSD4 423int 424freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 425{ 426 427 return sigreturn(td, (struct sigreturn_args *)uap); 428} 429#endif 430 431 432/* 433 * Machine dependent boot() routine 434 * 435 * I haven't seen anything to put here yet 436 * Possibly some stuff might be grafted back here from boot() 437 */ 438void 439cpu_boot(int howto) 440{ 441} 442 443/* 444 * Shutdown the CPU as much as possible 445 */ 446void 447cpu_halt(void) 448{ 449 for (;;) 450 __asm__ ("hlt"); 451} 452 453/* 454 * Hook to idle the CPU when possible. In the SMP case we default to 455 * off because a halted cpu will not currently pick up a new thread in the 456 * run queue until the next timer tick. If turned on this will result in 457 * approximately a 4.2% loss in real time performance in buildworld tests 458 * (but improves user and sys times oddly enough), and saves approximately 459 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 460 * 461 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 462 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 463 * Then we can have our cake and eat it too. 464 * 465 * XXX I'm turning it on for SMP as well by default for now. It seems to 466 * help lock contention somewhat, and this is critical for HTT. -Peter 467 */ 468static int cpu_idle_hlt = 1; 469SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 470 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 471 472static void 473cpu_idle_default(void) 474{ 475 /* 476 * we must absolutely guarentee that hlt is the 477 * absolute next instruction after sti or we 478 * introduce a timing window. 479 */ 480 __asm __volatile("sti; hlt"); 481} 482 483/* 484 * Note that we have to be careful here to avoid a race between checking 485 * sched_runnable() and actually halting. If we don't do this, we may waste 486 * the time between calling hlt and the next interrupt even though there 487 * is a runnable process. 488 */ 489void 490cpu_idle(void) 491{ 492 493 if (cpu_idle_hlt) { 494 disable_intr(); 495 if (sched_runnable()) 496 enable_intr(); 497 else 498 (*cpu_idle_hook)(); 499 } 500} 501 502/* Other subsystems (e.g., ACPI) can hook this later. */ 503void (*cpu_idle_hook)(void) = cpu_idle_default; 504 505/* 506 * Clear registers on exec 507 */ 508void 509exec_setregs(td, entry, stack, ps_strings) 510 struct thread *td; 511 u_long entry; 512 u_long stack; 513 u_long ps_strings; 514{ 515 struct trapframe *regs = td->td_frame; 516 struct pcb *pcb = td->td_pcb; 517 518 wrmsr(MSR_FSBASE, 0); 519 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 520 pcb->pcb_fsbase = 0; 521 pcb->pcb_gsbase = 0; 522 load_ds(_udatasel); 523 load_es(_udatasel); 524 load_fs(_udatasel); 525 load_gs(_udatasel); 526 pcb->pcb_ds = _udatasel; 527 pcb->pcb_es = _udatasel; 528 pcb->pcb_fs = _udatasel; 529 pcb->pcb_gs = _udatasel; 530 531 bzero((char *)regs, sizeof(struct trapframe)); 532 regs->tf_rip = entry; 533 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 534 regs->tf_rdi = stack; /* argv */ 535 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 536 regs->tf_ss = _udatasel; 537 regs->tf_cs = _ucodesel; 538 539 /* 540 * Reset the hardware debug registers if they were in use. 541 * They won't have any meaning for the newly exec'd process. 542 */ 543 if (pcb->pcb_flags & PCB_DBREGS) { 544 pcb->pcb_dr0 = 0; 545 pcb->pcb_dr1 = 0; 546 pcb->pcb_dr2 = 0; 547 pcb->pcb_dr3 = 0; 548 pcb->pcb_dr6 = 0; 549 pcb->pcb_dr7 = 0; 550 if (pcb == PCPU_GET(curpcb)) { 551 /* 552 * Clear the debug registers on the running 553 * CPU, otherwise they will end up affecting 554 * the next process we switch to. 555 */ 556 reset_dbregs(); 557 } 558 pcb->pcb_flags &= ~PCB_DBREGS; 559 } 560 561 /* 562 * Arrange to trap the next fpu or `fwait' instruction (see fpu.c 563 * for why fwait must be trapped at least if there is an fpu or an 564 * emulator). This is mainly to handle the case where npx0 is not 565 * configured, since the fpu routines normally set up the trap 566 * otherwise. It should be done only at boot time, but doing it 567 * here allows modifying `fpu_exists' for testing the emulator on 568 * systems with an fpu. 569 */ 570 load_cr0(rcr0() | CR0_MP | CR0_TS); 571 572 /* Initialize the fpu (if any) for the current process. */ 573 /* 574 * XXX the above load_cr0() also initializes it and is a layering 575 * violation. It drops the fpu state partially 576 * and this would be fatal if we were interrupted now, and decided 577 * to force the state to the pcb, and checked the invariant 578 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 579 * ALL of this can happen except the check. The check used to 580 * happen and be fatal later when we didn't complete the drop 581 * before returning to user mode. This should be fixed properly 582 * soon. 583 */ 584 fpstate_drop(td); 585} 586 587void 588cpu_setregs(void) 589{ 590 register_t cr0; 591 592 cr0 = rcr0(); 593 cr0 |= CR0_NE; /* Done by fpuinit() */ 594 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 595 cr0 |= CR0_WP | CR0_AM; 596 load_cr0(cr0); 597} 598 599static int 600sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 601{ 602 int error; 603 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 604 req); 605 if (!error && req->newptr) 606 resettodr(); 607 return (error); 608} 609 610SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 611 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 612 613SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 614 CTLFLAG_RW, &disable_rtc_set, 0, ""); 615 616SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 617 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 618 619/* 620 * Initialize 386 and configure to run kernel 621 */ 622 623/* 624 * Initialize segments & interrupt table 625 */ 626 627struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */ 628static struct gate_descriptor idt0[NIDT]; 629struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 630 631static char dblfault_stack[PAGE_SIZE] __aligned(16); 632 633struct amd64tss common_tss[MAXCPU]; 634 635/* software prototypes -- in more palatable form */ 636struct soft_segment_descriptor gdt_segs[] = { 637/* GNULL_SEL 0 Null Descriptor */ 638{ 0x0, /* segment base address */ 639 0x0, /* length */ 640 0, /* segment type */ 641 0, /* segment descriptor priority level */ 642 0, /* segment descriptor present */ 643 0, /* long */ 644 0, /* default 32 vs 16 bit size */ 645 0 /* limit granularity (byte/page units)*/ }, 646/* GCODE_SEL 1 Code Descriptor for kernel */ 647{ 0x0, /* segment base address */ 648 0xfffff, /* length - all address space */ 649 SDT_MEMERA, /* segment type */ 650 SEL_KPL, /* segment descriptor priority level */ 651 1, /* segment descriptor present */ 652 1, /* long */ 653 0, /* default 32 vs 16 bit size */ 654 1 /* limit granularity (byte/page units)*/ }, 655/* GDATA_SEL 2 Data Descriptor for kernel */ 656{ 0x0, /* segment base address */ 657 0xfffff, /* length - all address space */ 658 SDT_MEMRWA, /* segment type */ 659 SEL_KPL, /* segment descriptor priority level */ 660 1, /* segment descriptor present */ 661 1, /* long */ 662 0, /* default 32 vs 16 bit size */ 663 1 /* limit granularity (byte/page units)*/ }, 664/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 665{ 0x0, /* segment base address */ 666 0xfffff, /* length - all address space */ 667 SDT_MEMERA, /* segment type */ 668 SEL_UPL, /* segment descriptor priority level */ 669 1, /* segment descriptor present */ 670 0, /* long */ 671 1, /* default 32 vs 16 bit size */ 672 1 /* limit granularity (byte/page units)*/ }, 673/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 674{ 0x0, /* segment base address */ 675 0xfffff, /* length - all address space */ 676 SDT_MEMRWA, /* segment type */ 677 SEL_UPL, /* segment descriptor priority level */ 678 1, /* segment descriptor present */ 679 0, /* long */ 680 1, /* default 32 vs 16 bit size */ 681 1 /* limit granularity (byte/page units)*/ }, 682/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 683{ 0x0, /* segment base address */ 684 0xfffff, /* length - all address space */ 685 SDT_MEMERA, /* segment type */ 686 SEL_UPL, /* segment descriptor priority level */ 687 1, /* segment descriptor present */ 688 1, /* long */ 689 0, /* default 32 vs 16 bit size */ 690 1 /* limit granularity (byte/page units)*/ }, 691/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 692{ 693 0x0, /* segment base address */ 694 sizeof(struct amd64tss)-1,/* length - all address space */ 695 SDT_SYSTSS, /* segment type */ 696 SEL_KPL, /* segment descriptor priority level */ 697 1, /* segment descriptor present */ 698 0, /* long */ 699 0, /* unused - default 32 vs 16 bit size */ 700 0 /* limit granularity (byte/page units)*/ }, 701/* Actually, the TSS is a system descriptor which is double size */ 702{ 0x0, /* segment base address */ 703 0x0, /* length */ 704 0, /* segment type */ 705 0, /* segment descriptor priority level */ 706 0, /* segment descriptor present */ 707 0, /* long */ 708 0, /* default 32 vs 16 bit size */ 709 0 /* limit granularity (byte/page units)*/ }, 710}; 711 712void 713setidt(idx, func, typ, dpl, ist) 714 int idx; 715 inthand_t *func; 716 int typ; 717 int dpl; 718 int ist; 719{ 720 struct gate_descriptor *ip; 721 722 ip = idt + idx; 723 ip->gd_looffset = (uintptr_t)func; 724 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 725 ip->gd_ist = ist; 726 ip->gd_xx = 0; 727 ip->gd_type = typ; 728 ip->gd_dpl = dpl; 729 ip->gd_p = 1; 730 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 731} 732 733#define IDTVEC(name) __CONCAT(X,name) 734 735extern inthand_t 736 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 737 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 738 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 739 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 740 IDTVEC(xmm), IDTVEC(dblfault), 741 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 742 743void 744sdtossd(sd, ssd) 745 struct user_segment_descriptor *sd; 746 struct soft_segment_descriptor *ssd; 747{ 748 749 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 750 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 751 ssd->ssd_type = sd->sd_type; 752 ssd->ssd_dpl = sd->sd_dpl; 753 ssd->ssd_p = sd->sd_p; 754 ssd->ssd_long = sd->sd_long; 755 ssd->ssd_def32 = sd->sd_def32; 756 ssd->ssd_gran = sd->sd_gran; 757} 758 759void 760ssdtosd(ssd, sd) 761 struct soft_segment_descriptor *ssd; 762 struct user_segment_descriptor *sd; 763{ 764 765 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 766 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 767 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 768 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 769 sd->sd_type = ssd->ssd_type; 770 sd->sd_dpl = ssd->ssd_dpl; 771 sd->sd_p = ssd->ssd_p; 772 sd->sd_long = ssd->ssd_long; 773 sd->sd_def32 = ssd->ssd_def32; 774 sd->sd_gran = ssd->ssd_gran; 775} 776 777void 778ssdtosyssd(ssd, sd) 779 struct soft_segment_descriptor *ssd; 780 struct system_segment_descriptor *sd; 781{ 782 783 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 784 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 785 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 786 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 787 sd->sd_type = ssd->ssd_type; 788 sd->sd_dpl = ssd->ssd_dpl; 789 sd->sd_p = ssd->ssd_p; 790 sd->sd_gran = ssd->ssd_gran; 791} 792 793#if !defined(DEV_ATPIC) && defined(DEV_ISA) 794#include <isa/isavar.h> 795u_int 796isa_irq_pending(void) 797{ 798 799 return (0); 800} 801#endif 802 803#define PHYSMAP_SIZE (2 * 8) 804 805struct bios_smap { 806 u_int64_t base; 807 u_int64_t length; 808 u_int32_t type; 809} __packed; 810 811u_int basemem; 812 813/* 814 * Populate the (physmap) array with base/bound pairs describing the 815 * available physical memory in the system, then test this memory and 816 * build the phys_avail array describing the actually-available memory. 817 * 818 * If we cannot accurately determine the physical memory map, then use 819 * value from the 0xE801 call, and failing that, the RTC. 820 * 821 * Total memory size may be set by the kernel environment variable 822 * hw.physmem or the compile-time define MAXMEM. 823 * 824 * XXX first should be vm_paddr_t. 825 */ 826static void 827getmemsize(caddr_t kmdp, u_int64_t first) 828{ 829 int i, physmap_idx, pa_indx; 830 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 831 pt_entry_t *pte; 832 char *cp; 833 struct bios_smap *smapbase, *smap, *smapend; 834 u_int32_t smapsize; 835 836 bzero(physmap, sizeof(physmap)); 837 basemem = 0; 838 physmap_idx = 0; 839 840 /* 841 * get memory map from INT 15:E820, kindly supplied by the loader. 842 * 843 * subr_module.c says: 844 * "Consumer may safely assume that size value precedes data." 845 * ie: an int32_t immediately precedes smap. 846 */ 847 smapbase = (struct bios_smap *)preload_search_info(kmdp, 848 MODINFO_METADATA | MODINFOMD_SMAP); 849 if (smapbase == NULL) 850 panic("No BIOS smap info from loader!"); 851 852 smapsize = *((u_int32_t *)smapbase - 1); 853 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 854 855 for (smap = smapbase; smap < smapend; smap++) { 856 if (boothowto & RB_VERBOSE) 857 printf("SMAP type=%02x base=%016lx len=%016lx\n", 858 smap->type, smap->base, smap->length); 859 860 if (smap->type != 0x01) 861 continue; 862 863 if (smap->length == 0) 864 continue; 865 866 for (i = 0; i <= physmap_idx; i += 2) { 867 if (smap->base < physmap[i + 1]) { 868 if (boothowto & RB_VERBOSE) 869 printf( 870 "Overlapping or non-montonic memory region, ignoring second region\n"); 871 goto next_run; 872 } 873 } 874 875 if (smap->base == physmap[physmap_idx + 1]) { 876 physmap[physmap_idx + 1] += smap->length; 877next_run: 878 continue; 879 } 880 881 physmap_idx += 2; 882 if (physmap_idx == PHYSMAP_SIZE) { 883 printf( 884 "Too many segments in the physical address map, giving up\n"); 885 break; 886 } 887 physmap[physmap_idx] = smap->base; 888 physmap[physmap_idx + 1] = smap->base + smap->length; 889 } 890 891 /* 892 * Find the 'base memory' segment for SMP 893 */ 894 basemem = 0; 895 for (i = 0; i <= physmap_idx; i += 2) { 896 if (physmap[i] == 0x00000000) { 897 basemem = physmap[i + 1] / 1024; 898 break; 899 } 900 } 901 if (basemem == 0) 902 panic("BIOS smap did not include a basemem segment!"); 903 904#ifdef SMP 905 /* make hole for AP bootstrap code */ 906 physmap[1] = mp_bootaddress(physmap[1] / 1024); 907#endif 908 909 /* 910 * Maxmem isn't the "maximum memory", it's one larger than the 911 * highest page of the physical address space. It should be 912 * called something like "Maxphyspage". We may adjust this 913 * based on ``hw.physmem'' and the results of the memory test. 914 */ 915 Maxmem = atop(physmap[physmap_idx + 1]); 916 917#ifdef MAXMEM 918 Maxmem = MAXMEM / 4; 919#endif 920 921 /* 922 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 923 * for the appropriate modifiers. This overrides MAXMEM. 924 */ 925 cp = getenv("hw.physmem"); 926 if (cp != NULL) { 927 u_int64_t AllowMem, sanity; 928 char *ep; 929 930 sanity = AllowMem = strtouq(cp, &ep, 0); 931 if ((ep != cp) && (*ep != 0)) { 932 switch(*ep) { 933 case 'g': 934 case 'G': 935 AllowMem <<= 10; 936 case 'm': 937 case 'M': 938 AllowMem <<= 10; 939 case 'k': 940 case 'K': 941 AllowMem <<= 10; 942 break; 943 default: 944 AllowMem = sanity = 0; 945 } 946 if (AllowMem < sanity) 947 AllowMem = 0; 948 } 949 if (AllowMem == 0) 950 printf("Ignoring invalid memory size of '%s'\n", cp); 951 else 952 Maxmem = atop(AllowMem); 953 freeenv(cp); 954 } 955 956 if (atop(physmap[physmap_idx + 1]) != Maxmem && 957 (boothowto & RB_VERBOSE)) 958 printf("Physical memory use set to %ldK\n", Maxmem * 4); 959 960 /* 961 * If Maxmem has been increased beyond what the system has detected, 962 * extend the last memory segment to the new limit. 963 */ 964 if (atop(physmap[physmap_idx + 1]) < Maxmem) 965 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 966 967 /* call pmap initialization to make new kernel address space */ 968 pmap_bootstrap(&first); 969 970 /* 971 * Size up each available chunk of physical memory. 972 */ 973 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 974 pa_indx = 0; 975 phys_avail[pa_indx++] = physmap[0]; 976 phys_avail[pa_indx] = physmap[0]; 977 pte = CMAP1; 978 979 /* 980 * physmap is in bytes, so when converting to page boundaries, 981 * round up the start address and round down the end address. 982 */ 983 for (i = 0; i <= physmap_idx; i += 2) { 984 vm_paddr_t end; 985 986 end = ptoa((vm_paddr_t)Maxmem); 987 if (physmap[i + 1] < end) 988 end = trunc_page(physmap[i + 1]); 989 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 990 int tmp, page_bad; 991 int *ptr = (int *)CADDR1; 992 993 /* 994 * block out kernel memory as not available. 995 */ 996 if (pa >= 0x100000 && pa < first) 997 continue; 998 999 page_bad = FALSE; 1000 1001 /* 1002 * map page into kernel: valid, read/write,non-cacheable 1003 */ 1004 *pte = pa | PG_V | PG_RW | PG_N; 1005 invltlb(); 1006 1007 tmp = *(int *)ptr; 1008 /* 1009 * Test for alternating 1's and 0's 1010 */ 1011 *(volatile int *)ptr = 0xaaaaaaaa; 1012 if (*(volatile int *)ptr != 0xaaaaaaaa) 1013 page_bad = TRUE; 1014 /* 1015 * Test for alternating 0's and 1's 1016 */ 1017 *(volatile int *)ptr = 0x55555555; 1018 if (*(volatile int *)ptr != 0x55555555) 1019 page_bad = TRUE; 1020 /* 1021 * Test for all 1's 1022 */ 1023 *(volatile int *)ptr = 0xffffffff; 1024 if (*(volatile int *)ptr != 0xffffffff) 1025 page_bad = TRUE; 1026 /* 1027 * Test for all 0's 1028 */ 1029 *(volatile int *)ptr = 0x0; 1030 if (*(volatile int *)ptr != 0x0) 1031 page_bad = TRUE; 1032 /* 1033 * Restore original value. 1034 */ 1035 *(int *)ptr = tmp; 1036 1037 /* 1038 * Adjust array of valid/good pages. 1039 */ 1040 if (page_bad == TRUE) 1041 continue; 1042 /* 1043 * If this good page is a continuation of the 1044 * previous set of good pages, then just increase 1045 * the end pointer. Otherwise start a new chunk. 1046 * Note that "end" points one higher than end, 1047 * making the range >= start and < end. 1048 * If we're also doing a speculative memory 1049 * test and we at or past the end, bump up Maxmem 1050 * so that we keep going. The first bad page 1051 * will terminate the loop. 1052 */ 1053 if (phys_avail[pa_indx] == pa) { 1054 phys_avail[pa_indx] += PAGE_SIZE; 1055 } else { 1056 pa_indx++; 1057 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1058 printf( 1059 "Too many holes in the physical address space, giving up\n"); 1060 pa_indx--; 1061 break; 1062 } 1063 phys_avail[pa_indx++] = pa; /* start */ 1064 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1065 } 1066 physmem++; 1067 } 1068 } 1069 *pte = 0; 1070 invltlb(); 1071 1072 /* 1073 * XXX 1074 * The last chunk must contain at least one page plus the message 1075 * buffer to avoid complicating other code (message buffer address 1076 * calculation, etc.). 1077 */ 1078 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1079 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1080 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1081 phys_avail[pa_indx--] = 0; 1082 phys_avail[pa_indx--] = 0; 1083 } 1084 1085 Maxmem = atop(phys_avail[pa_indx]); 1086 1087 /* Trim off space for the message buffer. */ 1088 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1089 1090 avail_end = phys_avail[pa_indx]; 1091} 1092 1093u_int64_t 1094hammer_time(u_int64_t modulep, u_int64_t physfree) 1095{ 1096 caddr_t kmdp; 1097 int gsel_tss, off, x; 1098 struct pcpu *pc; 1099 u_int64_t msr; 1100 char *env; 1101 1102#ifdef DEV_ISA 1103 /* Preemptively mask the atpics and leave them shut down */ 1104 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); 1105 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); 1106#else 1107#error "have you forgotten the isa device?"; 1108#endif 1109 1110 proc0.p_uarea = (struct user *)(physfree + KERNBASE); 1111 bzero(proc0.p_uarea, UAREA_PAGES * PAGE_SIZE); 1112 physfree += UAREA_PAGES * PAGE_SIZE; 1113 thread0.td_kstack = physfree + KERNBASE; 1114 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1115 physfree += KSTACK_PAGES * PAGE_SIZE; 1116 thread0.td_pcb = (struct pcb *) 1117 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1118 1119 atdevbase = ISA_HOLE_START + KERNBASE; 1120 1121 /* 1122 * This may be done better later if it gets more high level 1123 * components in it. If so just link td->td_proc here. 1124 */ 1125 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1126 1127 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1128 preload_bootstrap_relocate(KERNBASE); 1129 kmdp = preload_search_by_type("elf kernel"); 1130 if (kmdp == NULL) 1131 kmdp = preload_search_by_type("elf64 kernel"); 1132 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1133 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1134#ifdef DDB 1135 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, void *); 1136 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, void *); 1137#endif 1138 1139 /* Init basic tunables, hz etc */ 1140 init_param1(); 1141 1142 /* 1143 * make gdt memory segments 1144 */ 1145 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1146 1147 for (x = 0; x < NGDT; x++) { 1148 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1149 ssdtosd(&gdt_segs[x], &gdt[x]); 1150 } 1151 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1152 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1153 1154 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1155 r_gdt.rd_base = (long) gdt; 1156 lgdt(&r_gdt); 1157 pc = &__pcpu[0]; 1158 1159 wrmsr(MSR_FSBASE, 0); /* User value */ 1160 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1161 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1162 1163 pcpu_init(pc, 0, sizeof(struct pcpu)); 1164 PCPU_SET(prvspace, pc); 1165 PCPU_SET(curthread, &thread0); 1166 PCPU_SET(curpcb, thread0.td_pcb); 1167 PCPU_SET(tssp, &common_tss[0]); 1168 1169 /* 1170 * Initialize mutexes. 1171 * 1172 * icu_lock: in order to allow an interrupt to occur in a critical 1173 * section, to set pcpu->ipending (etc...) properly, we 1174 * must be able to get the icu lock, so it can't be 1175 * under witness. 1176 */ 1177 mutex_init(); 1178 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1179 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1180 1181 /* exceptions */ 1182 for (x = 0; x < NIDT; x++) 1183 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1184 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1185 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1186 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 0); 1187 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1188 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1189 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1190 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1191 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1192 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1193 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1194 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1195 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1196 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1197 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1198 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1199 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1200 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1201 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1202 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1203 1204 r_idt.rd_limit = sizeof(idt0) - 1; 1205 r_idt.rd_base = (long) idt; 1206 lidt(&r_idt); 1207 1208 /* 1209 * Initialize the console before we print anything out. 1210 */ 1211 cninit(); 1212 1213#ifdef DEV_ATPIC 1214 atpic_startup(); 1215#endif 1216 1217#ifdef DDB 1218 kdb_init(); 1219 if (boothowto & RB_KDB) 1220 Debugger("Boot flags requested debugger"); 1221#endif 1222 1223 identify_cpu(); /* Final stage of CPU initialization */ 1224 initializecpu(); /* Initialize CPU registers */ 1225 1226 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1227 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1228 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1229 /* Ensure the stack is aligned to 16 bytes */ 1230 common_tss[0].tss_rsp0 &= ~0xFul; 1231 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1232 1233 /* doublefault stack space, runs on ist1 */ 1234 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1235 1236 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1237 ltr(gsel_tss); 1238 1239 /* Set up the fast syscall stuff */ 1240 msr = rdmsr(MSR_EFER) | EFER_SCE; 1241 wrmsr(MSR_EFER, msr); 1242 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1243 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1244 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1245 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1246 wrmsr(MSR_STAR, msr); 1247 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1248 1249 getmemsize(kmdp, physfree); 1250 init_param2(physmem); 1251 1252 /* now running on new page tables, configured,and u/iom is accessible */ 1253 1254 /* Map the message buffer. */ 1255 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1256 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1257 1258 msgbufinit(msgbufp, MSGBUF_SIZE); 1259 fpuinit(); 1260 1261 /* transfer to user mode */ 1262 1263 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1264 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1265 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1266 1267 /* setup proc 0's pcb */ 1268 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1269 thread0.td_pcb->pcb_cr3 = KPML4phys; 1270 thread0.td_frame = &proc0_tf; 1271 1272 env = getenv("kernelname"); 1273 if (env != NULL) 1274 strlcpy(kernelname, env, sizeof(kernelname)); 1275 1276 /* Location of kernel stack for locore */ 1277 return ((u_int64_t)thread0.td_pcb); 1278} 1279 1280void 1281cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1282{ 1283 1284 pcpu->pc_acpi_id = 0xffffffff; 1285} 1286 1287int 1288ptrace_set_pc(struct thread *td, unsigned long addr) 1289{ 1290 td->td_frame->tf_rip = addr; 1291 return (0); 1292} 1293 1294int 1295ptrace_single_step(struct thread *td) 1296{ 1297 td->td_frame->tf_rflags |= PSL_T; 1298 return (0); 1299} 1300 1301int 1302fill_regs(struct thread *td, struct reg *regs) 1303{ 1304 struct pcb *pcb; 1305 struct trapframe *tp; 1306 1307 tp = td->td_frame; 1308 regs->r_r15 = tp->tf_r15; 1309 regs->r_r14 = tp->tf_r14; 1310 regs->r_r13 = tp->tf_r13; 1311 regs->r_r12 = tp->tf_r12; 1312 regs->r_r11 = tp->tf_r11; 1313 regs->r_r10 = tp->tf_r10; 1314 regs->r_r9 = tp->tf_r9; 1315 regs->r_r8 = tp->tf_r8; 1316 regs->r_rdi = tp->tf_rdi; 1317 regs->r_rsi = tp->tf_rsi; 1318 regs->r_rbp = tp->tf_rbp; 1319 regs->r_rbx = tp->tf_rbx; 1320 regs->r_rdx = tp->tf_rdx; 1321 regs->r_rcx = tp->tf_rcx; 1322 regs->r_rax = tp->tf_rax; 1323 regs->r_rip = tp->tf_rip; 1324 regs->r_cs = tp->tf_cs; 1325 regs->r_rflags = tp->tf_rflags; 1326 regs->r_rsp = tp->tf_rsp; 1327 regs->r_ss = tp->tf_ss; 1328 pcb = td->td_pcb; 1329 return (0); 1330} 1331 1332int 1333set_regs(struct thread *td, struct reg *regs) 1334{ 1335 struct pcb *pcb; 1336 struct trapframe *tp; 1337 1338 tp = td->td_frame; 1339 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 1340 !CS_SECURE(regs->r_cs)) 1341 return (EINVAL); 1342 tp->tf_r15 = regs->r_r15; 1343 tp->tf_r14 = regs->r_r14; 1344 tp->tf_r13 = regs->r_r13; 1345 tp->tf_r12 = regs->r_r12; 1346 tp->tf_r11 = regs->r_r11; 1347 tp->tf_r10 = regs->r_r10; 1348 tp->tf_r9 = regs->r_r9; 1349 tp->tf_r8 = regs->r_r8; 1350 tp->tf_rdi = regs->r_rdi; 1351 tp->tf_rsi = regs->r_rsi; 1352 tp->tf_rbp = regs->r_rbp; 1353 tp->tf_rbx = regs->r_rbx; 1354 tp->tf_rdx = regs->r_rdx; 1355 tp->tf_rcx = regs->r_rcx; 1356 tp->tf_rax = regs->r_rax; 1357 tp->tf_rip = regs->r_rip; 1358 tp->tf_cs = regs->r_cs; 1359 tp->tf_rflags = regs->r_rflags; 1360 tp->tf_rsp = regs->r_rsp; 1361 tp->tf_ss = regs->r_ss; 1362 pcb = td->td_pcb; 1363 return (0); 1364} 1365 1366/* XXX check all this stuff! */ 1367/* externalize from sv_xmm */ 1368static void 1369fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1370{ 1371 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1372 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1373 int i; 1374 1375 /* pcb -> fpregs */ 1376 bzero(fpregs, sizeof(*fpregs)); 1377 1378 /* FPU control/status */ 1379 penv_fpreg->en_cw = penv_xmm->en_cw; 1380 penv_fpreg->en_sw = penv_xmm->en_sw; 1381 penv_fpreg->en_tw = penv_xmm->en_tw; 1382 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1383 penv_fpreg->en_rip = penv_xmm->en_rip; 1384 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1385 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1386 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1387 1388 /* FPU registers */ 1389 for (i = 0; i < 8; ++i) 1390 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1391 1392 /* SSE registers */ 1393 for (i = 0; i < 16; ++i) 1394 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1395} 1396 1397/* internalize from fpregs into sv_xmm */ 1398static void 1399set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1400{ 1401 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1402 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1403 int i; 1404 1405 /* fpregs -> pcb */ 1406 /* FPU control/status */ 1407 penv_xmm->en_cw = penv_fpreg->en_cw; 1408 penv_xmm->en_sw = penv_fpreg->en_sw; 1409 penv_xmm->en_tw = penv_fpreg->en_tw; 1410 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1411 penv_xmm->en_rip = penv_fpreg->en_rip; 1412 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1413 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1414 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask; 1415 1416 /* FPU registers */ 1417 for (i = 0; i < 8; ++i) 1418 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1419 1420 /* SSE registers */ 1421 for (i = 0; i < 16; ++i) 1422 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1423} 1424 1425/* externalize from td->pcb */ 1426int 1427fill_fpregs(struct thread *td, struct fpreg *fpregs) 1428{ 1429 1430 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1431 return (0); 1432} 1433 1434/* internalize to td->pcb */ 1435int 1436set_fpregs(struct thread *td, struct fpreg *fpregs) 1437{ 1438 1439 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1440 return (0); 1441} 1442 1443/* 1444 * Get machine context. 1445 */ 1446int 1447get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1448{ 1449 struct trapframe *tp; 1450 1451 tp = td->td_frame; 1452 PROC_LOCK(curthread->td_proc); 1453 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1454 PROC_UNLOCK(curthread->td_proc); 1455 mcp->mc_r15 = tp->tf_r15; 1456 mcp->mc_r14 = tp->tf_r14; 1457 mcp->mc_r13 = tp->tf_r13; 1458 mcp->mc_r12 = tp->tf_r12; 1459 mcp->mc_r11 = tp->tf_r11; 1460 mcp->mc_r10 = tp->tf_r10; 1461 mcp->mc_r9 = tp->tf_r9; 1462 mcp->mc_r8 = tp->tf_r8; 1463 mcp->mc_rdi = tp->tf_rdi; 1464 mcp->mc_rsi = tp->tf_rsi; 1465 mcp->mc_rbp = tp->tf_rbp; 1466 mcp->mc_rbx = tp->tf_rbx; 1467 mcp->mc_rcx = tp->tf_rcx; 1468 if (flags & GET_MC_CLEAR_RET) { 1469 mcp->mc_rax = 0; 1470 mcp->mc_rdx = 0; 1471 } else { 1472 mcp->mc_rax = tp->tf_rax; 1473 mcp->mc_rdx = tp->tf_rdx; 1474 } 1475 mcp->mc_rip = tp->tf_rip; 1476 mcp->mc_cs = tp->tf_cs; 1477 mcp->mc_rflags = tp->tf_rflags; 1478 mcp->mc_rsp = tp->tf_rsp; 1479 mcp->mc_ss = tp->tf_ss; 1480 mcp->mc_len = sizeof(*mcp); 1481 get_fpcontext(td, mcp); 1482 return (0); 1483} 1484 1485/* 1486 * Set machine context. 1487 * 1488 * However, we don't set any but the user modifiable flags, and we won't 1489 * touch the cs selector. 1490 */ 1491int 1492set_mcontext(struct thread *td, const mcontext_t *mcp) 1493{ 1494 struct trapframe *tp; 1495 long rflags; 1496 int ret; 1497 1498 tp = td->td_frame; 1499 if (mcp->mc_len != sizeof(*mcp)) 1500 return (EINVAL); 1501 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1502 (tp->tf_rflags & ~PSL_USERCHANGE); 1503 ret = set_fpcontext(td, mcp); 1504 if (ret != 0) 1505 return (ret); 1506 tp->tf_r15 = mcp->mc_r15; 1507 tp->tf_r14 = mcp->mc_r14; 1508 tp->tf_r13 = mcp->mc_r13; 1509 tp->tf_r12 = mcp->mc_r12; 1510 tp->tf_r11 = mcp->mc_r11; 1511 tp->tf_r10 = mcp->mc_r10; 1512 tp->tf_r9 = mcp->mc_r9; 1513 tp->tf_r8 = mcp->mc_r8; 1514 tp->tf_rdi = mcp->mc_rdi; 1515 tp->tf_rsi = mcp->mc_rsi; 1516 tp->tf_rbp = mcp->mc_rbp; 1517 tp->tf_rbx = mcp->mc_rbx; 1518 tp->tf_rdx = mcp->mc_rdx; 1519 tp->tf_rcx = mcp->mc_rcx; 1520 tp->tf_rax = mcp->mc_rax; 1521 tp->tf_rip = mcp->mc_rip; 1522 tp->tf_rflags = rflags; 1523 tp->tf_rsp = mcp->mc_rsp; 1524 tp->tf_ss = mcp->mc_ss; 1525 return (0); 1526} 1527 1528static void 1529get_fpcontext(struct thread *td, mcontext_t *mcp) 1530{ 1531 1532 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1533 mcp->mc_fpformat = fpuformat(); 1534} 1535 1536static int 1537set_fpcontext(struct thread *td, const mcontext_t *mcp) 1538{ 1539 1540 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1541 return (0); 1542 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1543 return (EINVAL); 1544 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1545 /* We don't care what state is left in the FPU or PCB. */ 1546 fpstate_drop(td); 1547 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1548 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1549 /* 1550 * XXX we violate the dubious requirement that fpusetregs() 1551 * be called with interrupts disabled. 1552 * XXX obsolete on trap-16 systems? 1553 */ 1554 fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1555 } else 1556 return (EINVAL); 1557 return (0); 1558} 1559 1560void 1561fpstate_drop(struct thread *td) 1562{ 1563 register_t s; 1564 1565 s = intr_disable(); 1566 if (PCPU_GET(fpcurthread) == td) 1567 fpudrop(); 1568 /* 1569 * XXX force a full drop of the fpu. The above only drops it if we 1570 * owned it. 1571 * 1572 * XXX I don't much like fpugetregs()'s semantics of doing a full 1573 * drop. Dropping only to the pcb matches fnsave's behaviour. 1574 * We only need to drop to !PCB_INITDONE in sendsig(). But 1575 * sendsig() is the only caller of fpugetregs()... perhaps we just 1576 * have too many layers. 1577 */ 1578 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1579 intr_restore(s); 1580} 1581 1582int 1583fill_dbregs(struct thread *td, struct dbreg *dbregs) 1584{ 1585 struct pcb *pcb; 1586 1587 if (td == NULL) { 1588 dbregs->dr[0] = rdr0(); 1589 dbregs->dr[1] = rdr1(); 1590 dbregs->dr[2] = rdr2(); 1591 dbregs->dr[3] = rdr3(); 1592 dbregs->dr[6] = rdr6(); 1593 dbregs->dr[7] = rdr7(); 1594 } else { 1595 pcb = td->td_pcb; 1596 dbregs->dr[0] = pcb->pcb_dr0; 1597 dbregs->dr[1] = pcb->pcb_dr1; 1598 dbregs->dr[2] = pcb->pcb_dr2; 1599 dbregs->dr[3] = pcb->pcb_dr3; 1600 dbregs->dr[6] = pcb->pcb_dr6; 1601 dbregs->dr[7] = pcb->pcb_dr7; 1602 } 1603 dbregs->dr[4] = 0; 1604 dbregs->dr[5] = 0; 1605 dbregs->dr[8] = 0; 1606 dbregs->dr[9] = 0; 1607 dbregs->dr[10] = 0; 1608 dbregs->dr[11] = 0; 1609 dbregs->dr[12] = 0; 1610 dbregs->dr[13] = 0; 1611 dbregs->dr[14] = 0; 1612 dbregs->dr[15] = 0; 1613 return (0); 1614} 1615 1616int 1617set_dbregs(struct thread *td, struct dbreg *dbregs) 1618{ 1619 struct pcb *pcb; 1620 int i; 1621 u_int64_t mask1, mask2; 1622 1623 if (td == NULL) { 1624 load_dr0(dbregs->dr[0]); 1625 load_dr1(dbregs->dr[1]); 1626 load_dr2(dbregs->dr[2]); 1627 load_dr3(dbregs->dr[3]); 1628 load_dr6(dbregs->dr[6]); 1629 load_dr7(dbregs->dr[7]); 1630 } else { 1631 /* 1632 * Don't let an illegal value for dr7 get set. Specifically, 1633 * check for undefined settings. Setting these bit patterns 1634 * result in undefined behaviour and can lead to an unexpected 1635 * TRCTRAP or a general protection fault right here. 1636 */ 1637 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 1638 i++, mask1 <<= 2, mask2 <<= 2) 1639 if ((dbregs->dr[7] & mask1) == mask2) 1640 return (EINVAL); 1641 1642 pcb = td->td_pcb; 1643 1644 /* 1645 * Don't let a process set a breakpoint that is not within the 1646 * process's address space. If a process could do this, it 1647 * could halt the system by setting a breakpoint in the kernel 1648 * (if ddb was enabled). Thus, we need to check to make sure 1649 * that no breakpoints are being enabled for addresses outside 1650 * process's address space, unless, perhaps, we were called by 1651 * uid 0. 1652 * 1653 * XXX - what about when the watched area of the user's 1654 * address space is written into from within the kernel 1655 * ... wouldn't that still cause a breakpoint to be generated 1656 * from within kernel mode? 1657 */ 1658 1659 if (suser(td) != 0) { 1660 if (dbregs->dr[7] & 0x3) { 1661 /* dr0 is enabled */ 1662 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1663 return (EINVAL); 1664 } 1665 if (dbregs->dr[7] & 0x3<<2) { 1666 /* dr1 is enabled */ 1667 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1668 return (EINVAL); 1669 } 1670 if (dbregs->dr[7] & 0x3<<4) { 1671 /* dr2 is enabled */ 1672 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1673 return (EINVAL); 1674 } 1675 if (dbregs->dr[7] & 0x3<<6) { 1676 /* dr3 is enabled */ 1677 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1678 return (EINVAL); 1679 } 1680 } 1681 1682 pcb->pcb_dr0 = dbregs->dr[0]; 1683 pcb->pcb_dr1 = dbregs->dr[1]; 1684 pcb->pcb_dr2 = dbregs->dr[2]; 1685 pcb->pcb_dr3 = dbregs->dr[3]; 1686 pcb->pcb_dr6 = dbregs->dr[6]; 1687 pcb->pcb_dr7 = dbregs->dr[7]; 1688 1689 pcb->pcb_flags |= PCB_DBREGS; 1690 } 1691 1692 return (0); 1693} 1694 1695void 1696reset_dbregs(void) 1697{ 1698 1699 load_dr7(0); /* Turn off the control bits first */ 1700 load_dr0(0); 1701 load_dr1(0); 1702 load_dr2(0); 1703 load_dr3(0); 1704 load_dr6(0); 1705} 1706 1707/* 1708 * Return > 0 if a hardware breakpoint has been hit, and the 1709 * breakpoint was in user space. Return 0, otherwise. 1710 */ 1711int 1712user_dbreg_trap(void) 1713{ 1714 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1715 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1716 int nbp; /* number of breakpoints that triggered */ 1717 caddr_t addr[4]; /* breakpoint addresses */ 1718 int i; 1719 1720 dr7 = rdr7(); 1721 if ((dr7 & 0x000000ff) == 0) { 1722 /* 1723 * all GE and LE bits in the dr7 register are zero, 1724 * thus the trap couldn't have been caused by the 1725 * hardware debug registers 1726 */ 1727 return 0; 1728 } 1729 1730 nbp = 0; 1731 dr6 = rdr6(); 1732 bp = dr6 & 0x0000000f; 1733 1734 if (!bp) { 1735 /* 1736 * None of the breakpoint bits are set meaning this 1737 * trap was not caused by any of the debug registers 1738 */ 1739 return 0; 1740 } 1741 1742 /* 1743 * at least one of the breakpoints were hit, check to see 1744 * which ones and if any of them are user space addresses 1745 */ 1746 1747 if (bp & 0x01) { 1748 addr[nbp++] = (caddr_t)rdr0(); 1749 } 1750 if (bp & 0x02) { 1751 addr[nbp++] = (caddr_t)rdr1(); 1752 } 1753 if (bp & 0x04) { 1754 addr[nbp++] = (caddr_t)rdr2(); 1755 } 1756 if (bp & 0x08) { 1757 addr[nbp++] = (caddr_t)rdr3(); 1758 } 1759 1760 for (i=0; i<nbp; i++) { 1761 if (addr[i] < 1762 (caddr_t)VM_MAXUSER_ADDRESS) { 1763 /* 1764 * addr[i] is in user space 1765 */ 1766 return nbp; 1767 } 1768 } 1769 1770 /* 1771 * None of the breakpoints are in user space. 1772 */ 1773 return 0; 1774} 1775 1776#ifndef DDB 1777void 1778Debugger(const char *msg) 1779{ 1780 printf("Debugger(\"%s\") called.\n", msg); 1781} 1782#endif /* no DDB */ 1783 1784#ifdef DDB 1785 1786/* 1787 * Provide inb() and outb() as functions. They are normally only 1788 * available as macros calling inlined functions, thus cannot be 1789 * called inside DDB. 1790 * 1791 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1792 */ 1793 1794#undef inb 1795#undef outb 1796 1797/* silence compiler warnings */ 1798u_char inb(u_int); 1799void outb(u_int, u_char); 1800 1801u_char 1802inb(u_int port) 1803{ 1804 u_char data; 1805 /* 1806 * We use %%dx and not %1 here because i/o is done at %dx and not at 1807 * %edx, while gcc generates inferior code (movw instead of movl) 1808 * if we tell it to load (u_short) port. 1809 */ 1810 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1811 return (data); 1812} 1813 1814void 1815outb(u_int port, u_char data) 1816{ 1817 u_char al; 1818 /* 1819 * Use an unnecessary assignment to help gcc's register allocator. 1820 * This make a large difference for gcc-1.40 and a tiny difference 1821 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1822 * best results. gcc-2.6.0 can't handle this. 1823 */ 1824 al = data; 1825 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1826} 1827 1828#endif /* DDB */ 1829