machdep.c revision 120367
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40#include <sys/cdefs.h> 41__FBSDID("$FreeBSD: head/sys/amd64/amd64/machdep.c 120367 2003-09-23 00:45:55Z peter $"); 42 43#include "opt_atalk.h" 44#include "opt_compat.h" 45#include "opt_cpu.h" 46#include "opt_ddb.h" 47#include "opt_inet.h" 48#include "opt_ipx.h" 49#include "opt_isa.h" 50#include "opt_kstack_pages.h" 51#include "opt_maxmem.h" 52#include "opt_msgbuf.h" 53#include "opt_perfmon.h" 54 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/sysproto.h> 58#include <sys/signalvar.h> 59#include <sys/imgact.h> 60#include <sys/kernel.h> 61#include <sys/ktr.h> 62#include <sys/linker.h> 63#include <sys/lock.h> 64#include <sys/malloc.h> 65#include <sys/mutex.h> 66#include <sys/pcpu.h> 67#include <sys/proc.h> 68#include <sys/bio.h> 69#include <sys/buf.h> 70#include <sys/reboot.h> 71#include <sys/callout.h> 72#include <sys/msgbuf.h> 73#include <sys/sched.h> 74#include <sys/sysent.h> 75#include <sys/sysctl.h> 76#include <sys/ucontext.h> 77#include <sys/vmmeter.h> 78#include <sys/bus.h> 79#include <sys/eventhandler.h> 80 81#include <vm/vm.h> 82#include <vm/vm_param.h> 83#include <vm/vm_kern.h> 84#include <vm/vm_object.h> 85#include <vm/vm_page.h> 86#include <vm/vm_map.h> 87#include <vm/vm_pager.h> 88#include <vm/vm_extern.h> 89 90#include <sys/user.h> 91#include <sys/exec.h> 92#include <sys/cons.h> 93 94#include <ddb/ddb.h> 95 96#include <net/netisr.h> 97 98#include <machine/cpu.h> 99#include <machine/cputypes.h> 100#include <machine/reg.h> 101#include <machine/clock.h> 102#include <machine/specialreg.h> 103#include <machine/md_var.h> 104#include <machine/metadata.h> 105#include <machine/proc.h> 106#ifdef PERFMON 107#include <machine/perfmon.h> 108#endif 109#include <machine/tss.h> 110 111#include <amd64/isa/icu.h> 112#include <amd64/isa/intr_machdep.h> 113#include <isa/rtc.h> 114#include <sys/ptrace.h> 115#include <machine/sigframe.h> 116 117extern u_int64_t hammer_time(u_int64_t, u_int64_t); 118extern void dblfault_handler(void); 119 120extern void printcpuinfo(void); /* XXX header file */ 121extern void identify_cpu(void); 122extern void panicifcpuunsupported(void); 123extern void initializecpu(void); 124 125#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 126#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 127 128static void cpu_startup(void *); 129static void get_fpcontext(struct thread *td, mcontext_t *mcp); 130static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 131SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 132 133int _udatasel, _ucodesel, _ucode32sel; 134u_long atdevbase; 135 136int cold = 1; 137 138long Maxmem = 0; 139 140vm_paddr_t phys_avail[10]; 141 142/* must be 2 less so 0 0 can signal end of chunks */ 143#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 144 145struct kva_md_info kmi; 146 147static struct trapframe proc0_tf; 148static struct pcpu __pcpu; 149 150struct mtx icu_lock; 151 152static void 153cpu_startup(dummy) 154 void *dummy; 155{ 156 /* 157 * Good {morning,afternoon,evening,night}. 158 */ 159 startrtclock(); 160 printcpuinfo(); 161 panicifcpuunsupported(); 162#ifdef PERFMON 163 perfmon_init(); 164#endif 165 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 166 ptoa((uintmax_t)Maxmem) / 1048576); 167 /* 168 * Display any holes after the first chunk of extended memory. 169 */ 170 if (bootverbose) { 171 int indx; 172 173 printf("Physical memory chunk(s):\n"); 174 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 175 vm_paddr_t size; 176 177 size = phys_avail[indx + 1] - phys_avail[indx]; 178 printf( 179 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 180 (uintmax_t)phys_avail[indx], 181 (uintmax_t)phys_avail[indx + 1] - 1, 182 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 183 } 184 } 185 186 vm_ksubmap_init(&kmi); 187 188 printf("avail memory = %ju (%ju MB)\n", 189 ptoa((uintmax_t)cnt.v_free_count), 190 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 191 192 /* 193 * Set up buffers, so they can be used to read disk labels. 194 */ 195 bufinit(); 196 vm_pager_bufferinit(); 197 198 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 199 cpu_setregs(); 200} 201 202/* 203 * Send an interrupt to process. 204 * 205 * Stack is set up to allow sigcode stored 206 * at top to call routine, followed by kcall 207 * to sigreturn routine below. After sigreturn 208 * resets the signal mask, the stack, and the 209 * frame pointer, it returns to the user 210 * specified pc, psl. 211 */ 212void 213sendsig(catcher, sig, mask, code) 214 sig_t catcher; 215 int sig; 216 sigset_t *mask; 217 u_long code; 218{ 219 struct sigframe sf, *sfp; 220 struct proc *p; 221 struct thread *td; 222 struct sigacts *psp; 223 char *sp; 224 struct trapframe *regs; 225 int oonstack; 226 227 td = curthread; 228 p = td->td_proc; 229 PROC_LOCK_ASSERT(p, MA_OWNED); 230 psp = p->p_sigacts; 231 mtx_assert(&psp->ps_mtx, MA_OWNED); 232 regs = td->td_frame; 233 oonstack = sigonstack(regs->tf_rsp); 234 235 /* Save user context. */ 236 bzero(&sf, sizeof(sf)); 237 sf.sf_uc.uc_sigmask = *mask; 238 sf.sf_uc.uc_stack = p->p_sigstk; 239 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 240 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 241 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 242 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 243 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 244 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 245 fpstate_drop(td); 246 247 /* Allocate space for the signal handler context. */ 248 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 249 SIGISMEMBER(psp->ps_sigonstack, sig)) { 250 sp = p->p_sigstk.ss_sp + 251 p->p_sigstk.ss_size - sizeof(struct sigframe); 252#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 253 p->p_sigstk.ss_flags |= SS_ONSTACK; 254#endif 255 } else 256 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 257 /* Align to 16 bytes. */ 258 sfp = (struct sigframe *)((unsigned long)sp & ~0xF); 259 260 /* Translate the signal if appropriate. */ 261 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 262 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 263 264 /* Build the argument list for the signal handler. */ 265 regs->tf_rdi = sig; /* arg 1 in %rdi */ 266 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 267 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 268 /* Signal handler installed with SA_SIGINFO. */ 269 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 270 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 271 272 /* Fill in POSIX parts */ 273 sf.sf_si.si_signo = sig; 274 sf.sf_si.si_code = code; 275 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 276 } else { 277 /* Old FreeBSD-style arguments. */ 278 regs->tf_rsi = code; /* arg 2 in %rsi */ 279 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 280 sf.sf_ahu.sf_handler = catcher; 281 } 282 mtx_unlock(&psp->ps_mtx); 283 PROC_UNLOCK(p); 284 285 /* 286 * Copy the sigframe out to the user's stack. 287 */ 288 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 289#ifdef DEBUG 290 printf("process %ld has trashed its stack\n", (long)p->p_pid); 291#endif 292 PROC_LOCK(p); 293 sigexit(td, SIGILL); 294 } 295 296 regs->tf_rsp = (long)sfp; 297 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 298 regs->tf_rflags &= ~PSL_T; 299 regs->tf_cs = _ucodesel; 300 PROC_LOCK(p); 301 mtx_lock(&psp->ps_mtx); 302} 303 304/* 305 * Build siginfo_t for SA thread 306 */ 307void 308cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 309{ 310 struct proc *p; 311 struct thread *td; 312 struct trapframe *regs; 313 314 td = curthread; 315 p = td->td_proc; 316 regs = td->td_frame; 317 PROC_LOCK_ASSERT(p, MA_OWNED); 318 319 bzero(si, sizeof(*si)); 320 si->si_signo = sig; 321 si->si_code = code; 322 si->si_addr = (void *)regs->tf_addr; 323 /* XXXKSE fill other fields */ 324} 325 326/* 327 * System call to cleanup state after a signal 328 * has been taken. Reset signal mask and 329 * stack state from context left by sendsig (above). 330 * Return to previous pc and psl as specified by 331 * context left by sendsig. Check carefully to 332 * make sure that the user has not modified the 333 * state to gain improper privileges. 334 * 335 * MPSAFE 336 */ 337int 338sigreturn(td, uap) 339 struct thread *td; 340 struct sigreturn_args /* { 341 const __ucontext *sigcntxp; 342 } */ *uap; 343{ 344 ucontext_t uc; 345 struct proc *p = td->td_proc; 346 struct trapframe *regs; 347 const ucontext_t *ucp; 348 long rflags; 349 int cs, error, ret; 350 351 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 352 if (error != 0) 353 return (error); 354 ucp = &uc; 355 regs = td->td_frame; 356 rflags = ucp->uc_mcontext.mc_rflags; 357 /* 358 * Don't allow users to change privileged or reserved flags. 359 */ 360 /* 361 * XXX do allow users to change the privileged flag PSL_RF. 362 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 363 * should sometimes set it there too. tf_rflags is kept in 364 * the signal context during signal handling and there is no 365 * other place to remember it, so the PSL_RF bit may be 366 * corrupted by the signal handler without us knowing. 367 * Corruption of the PSL_RF bit at worst causes one more or 368 * one less debugger trap, so allowing it is fairly harmless. 369 */ 370 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 371 printf("sigreturn: rflags = 0x%lx\n", rflags); 372 return (EINVAL); 373 } 374 375 /* 376 * Don't allow users to load a valid privileged %cs. Let the 377 * hardware check for invalid selectors, excess privilege in 378 * other selectors, invalid %eip's and invalid %esp's. 379 */ 380 cs = ucp->uc_mcontext.mc_cs; 381 if (!CS_SECURE(cs)) { 382 printf("sigreturn: cs = 0x%x\n", cs); 383 trapsignal(td, SIGBUS, T_PROTFLT); 384 return (EINVAL); 385 } 386 387 ret = set_fpcontext(td, &ucp->uc_mcontext); 388 if (ret != 0) 389 return (ret); 390 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 391 392 PROC_LOCK(p); 393#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 394 if (ucp->uc_mcontext.mc_onstack & 1) 395 p->p_sigstk.ss_flags |= SS_ONSTACK; 396 else 397 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 398#endif 399 400 td->td_sigmask = ucp->uc_sigmask; 401 SIG_CANTMASK(td->td_sigmask); 402 signotify(td); 403 PROC_UNLOCK(p); 404 td->td_pcb->pcb_flags |= PCB_FULLCTX; 405 return (EJUSTRETURN); 406} 407 408#ifdef COMPAT_FREEBSD4 409int 410freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 411{ 412 413 return sigreturn(td, (struct sigreturn_args *)uap); 414} 415#endif 416 417 418/* 419 * Machine dependent boot() routine 420 * 421 * I haven't seen anything to put here yet 422 * Possibly some stuff might be grafted back here from boot() 423 */ 424void 425cpu_boot(int howto) 426{ 427} 428 429/* 430 * Shutdown the CPU as much as possible 431 */ 432void 433cpu_halt(void) 434{ 435 for (;;) 436 __asm__ ("hlt"); 437} 438 439/* 440 * Hook to idle the CPU when possible. In the SMP case we default to 441 * off because a halted cpu will not currently pick up a new thread in the 442 * run queue until the next timer tick. If turned on this will result in 443 * approximately a 4.2% loss in real time performance in buildworld tests 444 * (but improves user and sys times oddly enough), and saves approximately 445 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 446 * 447 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 448 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 449 * Then we can have our cake and eat it too. 450 * 451 * XXX I'm turning it on for SMP as well by default for now. It seems to 452 * help lock contention somewhat, and this is critical for HTT. -Peter 453 */ 454static int cpu_idle_hlt = 1; 455SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 456 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 457 458/* 459 * Note that we have to be careful here to avoid a race between checking 460 * sched_runnable() and actually halting. If we don't do this, we may waste 461 * the time between calling hlt and the next interrupt even though there 462 * is a runnable process. 463 */ 464void 465cpu_idle(void) 466{ 467 468 if (cpu_idle_hlt) { 469 disable_intr(); 470 if (sched_runnable()) { 471 enable_intr(); 472 } else { 473 /* 474 * we must absolutely guarentee that hlt is the 475 * absolute next instruction after sti or we 476 * introduce a timing window. 477 */ 478 __asm __volatile("sti; hlt"); 479 } 480 } 481} 482 483/* 484 * Clear registers on exec 485 */ 486void 487exec_setregs(td, entry, stack, ps_strings) 488 struct thread *td; 489 u_long entry; 490 u_long stack; 491 u_long ps_strings; 492{ 493 struct trapframe *regs = td->td_frame; 494 struct pcb *pcb = td->td_pcb; 495 496 wrmsr(MSR_FSBASE, 0); 497 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 498 pcb->pcb_fsbase = 0; 499 pcb->pcb_gsbase = 0; 500 load_ds(_udatasel); 501 load_es(_udatasel); 502 load_fs(_udatasel); 503 load_gs(_udatasel); 504 pcb->pcb_ds = _udatasel; 505 pcb->pcb_es = _udatasel; 506 pcb->pcb_fs = _udatasel; 507 pcb->pcb_gs = _udatasel; 508 509 bzero((char *)regs, sizeof(struct trapframe)); 510 regs->tf_rip = entry; 511 /* This strangeness is to ensure alignment after the implied return address */ 512 regs->tf_rsp = ((stack - 8) & ~0xF) + 8; 513 regs->tf_rdi = stack; /* argv */ 514 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 515 regs->tf_ss = _udatasel; 516 regs->tf_cs = _ucodesel; 517 518 /* 519 * Arrange to trap the next npx or `fwait' instruction (see npx.c 520 * for why fwait must be trapped at least if there is an npx or an 521 * emulator). This is mainly to handle the case where npx0 is not 522 * configured, since the npx routines normally set up the trap 523 * otherwise. It should be done only at boot time, but doing it 524 * here allows modifying `npx_exists' for testing the emulator on 525 * systems with an npx. 526 */ 527 load_cr0(rcr0() | CR0_MP | CR0_TS); 528 529 /* Initialize the npx (if any) for the current process. */ 530 /* 531 * XXX the above load_cr0() also initializes it and is a layering 532 * violation if NPX is configured. It drops the npx partially 533 * and this would be fatal if we were interrupted now, and decided 534 * to force the state to the pcb, and checked the invariant 535 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 536 * ALL of this can happen except the check. The check used to 537 * happen and be fatal later when we didn't complete the drop 538 * before returning to user mode. This should be fixed properly 539 * soon. 540 */ 541 fpstate_drop(td); 542} 543 544void 545cpu_setregs(void) 546{ 547 register_t cr0; 548 549 cr0 = rcr0(); 550 cr0 |= CR0_NE; /* Done by npxinit() */ 551 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 552 cr0 |= CR0_WP | CR0_AM; 553 load_cr0(cr0); 554} 555 556static int 557sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 558{ 559 int error; 560 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 561 req); 562 if (!error && req->newptr) 563 resettodr(); 564 return (error); 565} 566 567SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 568 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 569 570SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 571 CTLFLAG_RW, &disable_rtc_set, 0, ""); 572 573SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 574 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 575 576/* 577 * Initialize 386 and configure to run kernel 578 */ 579 580/* 581 * Initialize segments & interrupt table 582 */ 583 584struct user_segment_descriptor gdt[NGDT];/* global descriptor table */ 585static struct gate_descriptor idt0[NIDT]; 586struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 587 588static char dblfault_stack[PAGE_SIZE] __aligned(16); 589 590struct amd64tss common_tss; 591 592/* software prototypes -- in more palatable form */ 593struct soft_segment_descriptor gdt_segs[] = { 594/* GNULL_SEL 0 Null Descriptor */ 595{ 0x0, /* segment base address */ 596 0x0, /* length */ 597 0, /* segment type */ 598 0, /* segment descriptor priority level */ 599 0, /* segment descriptor present */ 600 0, /* long */ 601 0, /* default 32 vs 16 bit size */ 602 0 /* limit granularity (byte/page units)*/ }, 603/* GCODE_SEL 1 Code Descriptor for kernel */ 604{ 0x0, /* segment base address */ 605 0xfffff, /* length - all address space */ 606 SDT_MEMERA, /* segment type */ 607 SEL_KPL, /* segment descriptor priority level */ 608 1, /* segment descriptor present */ 609 1, /* long */ 610 0, /* default 32 vs 16 bit size */ 611 1 /* limit granularity (byte/page units)*/ }, 612/* GDATA_SEL 2 Data Descriptor for kernel */ 613{ 0x0, /* segment base address */ 614 0xfffff, /* length - all address space */ 615 SDT_MEMRWA, /* segment type */ 616 SEL_KPL, /* segment descriptor priority level */ 617 1, /* segment descriptor present */ 618 1, /* long */ 619 0, /* default 32 vs 16 bit size */ 620 1 /* limit granularity (byte/page units)*/ }, 621/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 622{ 0x0, /* segment base address */ 623 0xfffff, /* length - all address space */ 624 SDT_MEMERA, /* segment type */ 625 SEL_UPL, /* segment descriptor priority level */ 626 1, /* segment descriptor present */ 627 0, /* long */ 628 1, /* default 32 vs 16 bit size */ 629 1 /* limit granularity (byte/page units)*/ }, 630/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 631{ 0x0, /* segment base address */ 632 0xfffff, /* length - all address space */ 633 SDT_MEMRWA, /* segment type */ 634 SEL_UPL, /* segment descriptor priority level */ 635 1, /* segment descriptor present */ 636 0, /* long */ 637 1, /* default 32 vs 16 bit size */ 638 1 /* limit granularity (byte/page units)*/ }, 639/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 640{ 0x0, /* segment base address */ 641 0xfffff, /* length - all address space */ 642 SDT_MEMERA, /* segment type */ 643 SEL_UPL, /* segment descriptor priority level */ 644 1, /* segment descriptor present */ 645 1, /* long */ 646 0, /* default 32 vs 16 bit size */ 647 1 /* limit granularity (byte/page units)*/ }, 648/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 649{ 650 0x0, /* segment base address */ 651 sizeof(struct amd64tss)-1,/* length - all address space */ 652 SDT_SYSTSS, /* segment type */ 653 SEL_KPL, /* segment descriptor priority level */ 654 1, /* segment descriptor present */ 655 0, /* long */ 656 0, /* unused - default 32 vs 16 bit size */ 657 0 /* limit granularity (byte/page units)*/ }, 658/* Actually, the TSS is a system descriptor which is double size */ 659{ 0x0, /* segment base address */ 660 0x0, /* length */ 661 0, /* segment type */ 662 0, /* segment descriptor priority level */ 663 0, /* segment descriptor present */ 664 0, /* long */ 665 0, /* default 32 vs 16 bit size */ 666 0 /* limit granularity (byte/page units)*/ }, 667}; 668 669void 670setidt(idx, func, typ, dpl, ist) 671 int idx; 672 inthand_t *func; 673 int typ; 674 int dpl; 675 int ist; 676{ 677 struct gate_descriptor *ip; 678 679 ip = idt + idx; 680 ip->gd_looffset = (uintptr_t)func; 681 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 682 ip->gd_ist = ist; 683 ip->gd_xx = 0; 684 ip->gd_type = typ; 685 ip->gd_dpl = dpl; 686 ip->gd_p = 1; 687 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 688} 689 690#define IDTVEC(name) __CONCAT(X,name) 691 692extern inthand_t 693 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 694 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 695 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 696 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 697 IDTVEC(xmm), IDTVEC(dblfault), 698 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 699 700void 701sdtossd(sd, ssd) 702 struct user_segment_descriptor *sd; 703 struct soft_segment_descriptor *ssd; 704{ 705 706 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 707 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 708 ssd->ssd_type = sd->sd_type; 709 ssd->ssd_dpl = sd->sd_dpl; 710 ssd->ssd_p = sd->sd_p; 711 ssd->ssd_long = sd->sd_long; 712 ssd->ssd_def32 = sd->sd_def32; 713 ssd->ssd_gran = sd->sd_gran; 714} 715 716void 717ssdtosd(ssd, sd) 718 struct soft_segment_descriptor *ssd; 719 struct user_segment_descriptor *sd; 720{ 721 722 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 723 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 724 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 725 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 726 sd->sd_type = ssd->ssd_type; 727 sd->sd_dpl = ssd->ssd_dpl; 728 sd->sd_p = ssd->ssd_p; 729 sd->sd_long = ssd->ssd_long; 730 sd->sd_def32 = ssd->ssd_def32; 731 sd->sd_gran = ssd->ssd_gran; 732} 733 734void 735ssdtosyssd(ssd, sd) 736 struct soft_segment_descriptor *ssd; 737 struct system_segment_descriptor *sd; 738{ 739 740 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 741 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 742 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 743 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 744 sd->sd_type = ssd->ssd_type; 745 sd->sd_dpl = ssd->ssd_dpl; 746 sd->sd_p = ssd->ssd_p; 747 sd->sd_gran = ssd->ssd_gran; 748} 749 750 751#define PHYSMAP_SIZE (2 * 8) 752 753struct bios_smap { 754 u_int64_t base; 755 u_int64_t length; 756 u_int32_t type; 757} __packed; 758 759u_int basemem; 760 761/* 762 * Populate the (physmap) array with base/bound pairs describing the 763 * available physical memory in the system, then test this memory and 764 * build the phys_avail array describing the actually-available memory. 765 * 766 * If we cannot accurately determine the physical memory map, then use 767 * value from the 0xE801 call, and failing that, the RTC. 768 * 769 * Total memory size may be set by the kernel environment variable 770 * hw.physmem or the compile-time define MAXMEM. 771 * 772 * XXX first should be vm_paddr_t. 773 */ 774static void 775getmemsize(caddr_t kmdp, u_int64_t first) 776{ 777 int i, physmap_idx, pa_indx; 778 u_int extmem; 779 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 780 pt_entry_t *pte; 781 char *cp; 782 struct bios_smap *smapbase, *smap, *smapend; 783 u_int32_t smapsize; 784 785 bzero(physmap, sizeof(physmap)); 786 basemem = 0; 787 physmap_idx = 0; 788 789 /* 790 * get memory map from INT 15:E820, kindly supplied by the loader. 791 * 792 * subr_module.c says: 793 * "Consumer may safely assume that size value precedes data." 794 * ie: an int32_t immediately precedes smap. 795 */ 796 smapbase = (struct bios_smap *)preload_search_info(kmdp, MODINFO_METADATA | MODINFOMD_SMAP); 797 if (smapbase == 0) 798 smapbase = (struct bios_smap *)preload_search_info(kmdp, MODINFO_METADATA | 0x0009); /* Old value for MODINFOMD_SMAP */ 799 if (smapbase == 0) { 800 panic("No BIOS smap info from loader!"); 801 goto deep_shit; 802 } 803 smapsize = *((u_int32_t *)smapbase - 1); 804 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 805 806 for (smap = smapbase; smap < smapend; smap++) { 807 if (boothowto & RB_VERBOSE) 808 printf("SMAP type=%02x base=%016lx len=%016lx\n", 809 smap->type, smap->base, smap->length); 810 811 if (smap->type != 0x01) { 812 continue; 813 } 814 815 if (smap->length == 0) { 816next_run: 817 continue; 818 } 819 820 for (i = 0; i <= physmap_idx; i += 2) { 821 if (smap->base < physmap[i + 1]) { 822 if (boothowto & RB_VERBOSE) 823 printf( 824 "Overlapping or non-montonic memory region, ignoring second region\n"); 825 goto next_run; 826 } 827 } 828 829 if (smap->base == physmap[physmap_idx + 1]) { 830 physmap[physmap_idx + 1] += smap->length; 831 continue; 832 } 833 834 physmap_idx += 2; 835 if (physmap_idx == PHYSMAP_SIZE) { 836 printf( 837 "Too many segments in the physical address map, giving up\n"); 838 break; 839 } 840 physmap[physmap_idx] = smap->base; 841 physmap[physmap_idx + 1] = smap->base + smap->length; 842 } 843 844 /* 845 * Perform "base memory" related probes & setup based on SMAP 846 */ 847deep_shit: 848 if (basemem == 0) { 849 for (i = 0; i <= physmap_idx; i += 2) { 850 if (physmap[i] == 0x00000000) { 851 basemem = physmap[i + 1] / 1024; 852 break; 853 } 854 } 855 856 if (basemem == 0) { 857 basemem = rtcin(RTC_BASELO) + (rtcin(RTC_BASEHI) << 8); 858 } 859 860 if (basemem == 0) { 861 basemem = 640; 862 } 863 864 if (basemem > 640) { 865 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 866 basemem); 867 basemem = 640; 868 } 869 870#if 0 871 for (pa = trunc_page(basemem * 1024); 872 pa < ISA_HOLE_START; pa += PAGE_SIZE) 873 pmap_kenter(KERNBASE + pa, pa); 874#endif 875 } 876 877 if (physmap[1] != 0) 878 goto physmap_done; 879 880 /* 881 * Prefer the RTC value for extended memory. 882 */ 883 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 884 885 /* 886 * Special hack for chipsets that still remap the 384k hole when 887 * there's 16MB of memory - this really confuses people that 888 * are trying to use bus mastering ISA controllers with the 889 * "16MB limit"; they only have 16MB, but the remapping puts 890 * them beyond the limit. 891 * 892 * If extended memory is between 15-16MB (16-17MB phys address range), 893 * chop it to 15MB. 894 */ 895 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 896 extmem = 15 * 1024; 897 898 physmap[0] = 0; 899 physmap[1] = basemem * 1024; 900 physmap_idx = 2; 901 physmap[physmap_idx] = 0x100000; 902 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 903 904physmap_done: 905 /* 906 * Now, physmap contains a map of physical memory. 907 */ 908 /* 909 * Maxmem isn't the "maximum memory", it's one larger than the 910 * highest page of the physical address space. It should be 911 * called something like "Maxphyspage". We may adjust this 912 * based on ``hw.physmem'' and the results of the memory test. 913 */ 914 Maxmem = atop(physmap[physmap_idx + 1]); 915 916#ifdef MAXMEM 917 Maxmem = MAXMEM / 4; 918#endif 919 920 /* 921 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 922 * for the appropriate modifiers. This overrides MAXMEM. 923 */ 924 if ((cp = getenv("hw.physmem")) != NULL) { 925 u_int64_t AllowMem, sanity; 926 char *ep; 927 928 sanity = AllowMem = strtouq(cp, &ep, 0); 929 if ((ep != cp) && (*ep != 0)) { 930 switch(*ep) { 931 case 'g': 932 case 'G': 933 AllowMem <<= 10; 934 case 'm': 935 case 'M': 936 AllowMem <<= 10; 937 case 'k': 938 case 'K': 939 AllowMem <<= 10; 940 break; 941 default: 942 AllowMem = sanity = 0; 943 } 944 if (AllowMem < sanity) 945 AllowMem = 0; 946 } 947 if (AllowMem == 0) 948 printf("Ignoring invalid memory size of '%s'\n", cp); 949 else 950 Maxmem = atop(AllowMem); 951 freeenv(cp); 952 } 953 954 if (atop(physmap[physmap_idx + 1]) != Maxmem && 955 (boothowto & RB_VERBOSE)) 956 printf("Physical memory use set to %ldK\n", Maxmem * 4); 957 958 /* 959 * If Maxmem has been increased beyond what the system has detected, 960 * extend the last memory segment to the new limit. 961 */ 962 if (atop(physmap[physmap_idx + 1]) < Maxmem) 963 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 964 965 /* call pmap initialization to make new kernel address space */ 966 pmap_bootstrap(&first); 967 968 /* 969 * Size up each available chunk of physical memory. 970 */ 971 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 972 pa_indx = 0; 973 phys_avail[pa_indx++] = physmap[0]; 974 phys_avail[pa_indx] = physmap[0]; 975 pte = CMAP1; 976 977 /* 978 * physmap is in bytes, so when converting to page boundaries, 979 * round up the start address and round down the end address. 980 */ 981 for (i = 0; i <= physmap_idx; i += 2) { 982 vm_paddr_t end; 983 984 end = ptoa((vm_paddr_t)Maxmem); 985 if (physmap[i + 1] < end) 986 end = trunc_page(physmap[i + 1]); 987 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 988 int tmp, page_bad; 989 int *ptr = (int *)CADDR1; 990 991 /* 992 * block out kernel memory as not available. 993 */ 994 if (pa >= 0x100000 && pa < first) 995 continue; 996 997 page_bad = FALSE; 998 999 /* 1000 * map page into kernel: valid, read/write,non-cacheable 1001 */ 1002 *pte = pa | PG_V | PG_RW | PG_N; 1003 invltlb(); 1004 1005 tmp = *(int *)ptr; 1006 /* 1007 * Test for alternating 1's and 0's 1008 */ 1009 *(volatile int *)ptr = 0xaaaaaaaa; 1010 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1011 page_bad = TRUE; 1012 } 1013 /* 1014 * Test for alternating 0's and 1's 1015 */ 1016 *(volatile int *)ptr = 0x55555555; 1017 if (*(volatile int *)ptr != 0x55555555) { 1018 page_bad = TRUE; 1019 } 1020 /* 1021 * Test for all 1's 1022 */ 1023 *(volatile int *)ptr = 0xffffffff; 1024 if (*(volatile int *)ptr != 0xffffffff) { 1025 page_bad = TRUE; 1026 } 1027 /* 1028 * Test for all 0's 1029 */ 1030 *(volatile int *)ptr = 0x0; 1031 if (*(volatile int *)ptr != 0x0) { 1032 page_bad = TRUE; 1033 } 1034 /* 1035 * Restore original value. 1036 */ 1037 *(int *)ptr = tmp; 1038 1039 /* 1040 * Adjust array of valid/good pages. 1041 */ 1042 if (page_bad == TRUE) { 1043 continue; 1044 } 1045 /* 1046 * If this good page is a continuation of the 1047 * previous set of good pages, then just increase 1048 * the end pointer. Otherwise start a new chunk. 1049 * Note that "end" points one higher than end, 1050 * making the range >= start and < end. 1051 * If we're also doing a speculative memory 1052 * test and we at or past the end, bump up Maxmem 1053 * so that we keep going. The first bad page 1054 * will terminate the loop. 1055 */ 1056 if (phys_avail[pa_indx] == pa) { 1057 phys_avail[pa_indx] += PAGE_SIZE; 1058 } else { 1059 pa_indx++; 1060 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1061 printf( 1062 "Too many holes in the physical address space, giving up\n"); 1063 pa_indx--; 1064 break; 1065 } 1066 phys_avail[pa_indx++] = pa; /* start */ 1067 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1068 } 1069 physmem++; 1070 } 1071 } 1072 *pte = 0; 1073 invltlb(); 1074 1075 /* 1076 * XXX 1077 * The last chunk must contain at least one page plus the message 1078 * buffer to avoid complicating other code (message buffer address 1079 * calculation, etc.). 1080 */ 1081 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1082 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1083 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1084 phys_avail[pa_indx--] = 0; 1085 phys_avail[pa_indx--] = 0; 1086 } 1087 1088 Maxmem = atop(phys_avail[pa_indx]); 1089 1090 /* Trim off space for the message buffer. */ 1091 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1092 1093 avail_end = phys_avail[pa_indx]; 1094} 1095 1096u_int64_t 1097hammer_time(u_int64_t modulep, u_int64_t physfree) 1098{ 1099 caddr_t kmdp; 1100 int gsel_tss, off, x; 1101 struct region_descriptor r_gdt, r_idt; 1102 struct pcpu *pc; 1103 u_int64_t msr; 1104 char *env; 1105 1106 /* Turn on PTE NX (no execute) bit */ 1107 msr = rdmsr(MSR_EFER) | EFER_NXE; 1108 wrmsr(MSR_EFER, msr); 1109 1110 proc0.p_uarea = (struct user *)(physfree + KERNBASE); 1111 bzero(proc0.p_uarea, UAREA_PAGES * PAGE_SIZE); 1112 physfree += UAREA_PAGES * PAGE_SIZE; 1113 thread0.td_kstack = physfree + KERNBASE; 1114 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1115 physfree += KSTACK_PAGES * PAGE_SIZE; 1116 thread0.td_pcb = (struct pcb *) 1117 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1118 1119 atdevbase = ISA_HOLE_START + KERNBASE; 1120 1121 /* 1122 * This may be done better later if it gets more high level 1123 * components in it. If so just link td->td_proc here. 1124 */ 1125 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1126 1127 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1128 preload_bootstrap_relocate(KERNBASE); 1129 kmdp = preload_search_by_type("elf kernel"); 1130 if (kmdp == NULL) 1131 kmdp = preload_search_by_type("elf64 kernel"); 1132 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1133 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1134 1135 /* Init basic tunables, hz etc */ 1136 init_param1(); 1137 1138 /* 1139 * make gdt memory segments 1140 */ 1141 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss; 1142 1143 for (x = 0; x < NGDT; x++) { 1144 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1145 ssdtosd(&gdt_segs[x], &gdt[x]); 1146 } 1147 ssdtosyssd(&gdt_segs[GPROC0_SEL], (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1148 1149 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1150 r_gdt.rd_base = (long) gdt; 1151 lgdt(&r_gdt); 1152 pc = &__pcpu; 1153 1154 wrmsr(MSR_FSBASE, 0); /* User value */ 1155 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1156 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 1157 1158 pcpu_init(pc, 0, sizeof(struct pcpu)); 1159 PCPU_SET(prvspace, pc); 1160 PCPU_SET(curthread, &thread0); 1161 1162 /* 1163 * Initialize mutexes. 1164 * 1165 * icu_lock: in order to allow an interrupt to occur in a critical 1166 * section, to set pcpu->ipending (etc...) properly, we 1167 * must be able to get the icu lock, so it can't be 1168 * under witness. 1169 */ 1170 mutex_init(); 1171 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1172 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1173 1174 /* exceptions */ 1175 for (x = 0; x < NIDT; x++) 1176 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1177 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1178 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1179 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 0); 1180 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1181 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1182 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1183 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1184 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1185 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1186 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1187 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1188 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1189 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1190 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1191 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1192 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1193 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1194 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1195 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1196 1197 r_idt.rd_limit = sizeof(idt0) - 1; 1198 r_idt.rd_base = (long) idt; 1199 lidt(&r_idt); 1200 1201 /* 1202 * Initialize the console before we print anything out. 1203 */ 1204 cninit(); 1205 1206#ifdef DEV_ISA 1207 isa_defaultirq(); 1208#endif 1209 1210#ifdef DDB 1211 kdb_init(); 1212 if (boothowto & RB_KDB) 1213 Debugger("Boot flags requested debugger"); 1214#endif 1215 1216 identify_cpu(); /* Final stage of CPU initialization */ 1217 initializecpu(); /* Initialize CPU registers */ 1218 1219 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1220 common_tss.tss_rsp0 = thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1221 /* Ensure the stack is aligned to 16 bytes */ 1222 common_tss.tss_rsp0 &= ~0xF; 1223 1224 /* doublefault stack space, runs on ist1 */ 1225 common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1226 1227 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1228 ltr(gsel_tss); 1229 1230 /* Set up the fast syscall stuff */ 1231 msr = rdmsr(MSR_EFER) | EFER_SCE; 1232 wrmsr(MSR_EFER, msr); 1233 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1234 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1235 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1236 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1237 wrmsr(MSR_STAR, msr); 1238 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1239 1240 getmemsize(kmdp, physfree); 1241 init_param2(physmem); 1242 1243 /* now running on new page tables, configured,and u/iom is accessible */ 1244 1245 /* Map the message buffer. */ 1246 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1247 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1248 1249 msgbufinit(msgbufp, MSGBUF_SIZE); 1250 1251 /* transfer to user mode */ 1252 1253 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1254 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1255 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1256 1257 /* setup proc 0's pcb */ 1258 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1259 thread0.td_pcb->pcb_cr3 = KPML4phys; 1260 thread0.td_frame = &proc0_tf; 1261 1262 env = getenv("kernelname"); 1263 if (env != NULL) 1264 strlcpy(kernelname, env, sizeof(kernelname)); 1265 1266 /* Location of kernel stack for locore */ 1267 return ((u_int64_t)thread0.td_pcb); 1268} 1269 1270void 1271cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1272{ 1273} 1274 1275int 1276ptrace_set_pc(struct thread *td, unsigned long addr) 1277{ 1278 td->td_frame->tf_rip = addr; 1279 return (0); 1280} 1281 1282int 1283ptrace_single_step(struct thread *td) 1284{ 1285 td->td_frame->tf_rflags |= PSL_T; 1286 return (0); 1287} 1288 1289int 1290fill_regs(struct thread *td, struct reg *regs) 1291{ 1292 struct pcb *pcb; 1293 struct trapframe *tp; 1294 1295 tp = td->td_frame; 1296 regs->r_r15 = tp->tf_r15; 1297 regs->r_r14 = tp->tf_r14; 1298 regs->r_r13 = tp->tf_r13; 1299 regs->r_r12 = tp->tf_r12; 1300 regs->r_r11 = tp->tf_r11; 1301 regs->r_r10 = tp->tf_r10; 1302 regs->r_r9 = tp->tf_r9; 1303 regs->r_r8 = tp->tf_r8; 1304 regs->r_rdi = tp->tf_rdi; 1305 regs->r_rsi = tp->tf_rsi; 1306 regs->r_rbp = tp->tf_rbp; 1307 regs->r_rbx = tp->tf_rbx; 1308 regs->r_rdx = tp->tf_rdx; 1309 regs->r_rcx = tp->tf_rcx; 1310 regs->r_rax = tp->tf_rax; 1311 regs->r_rip = tp->tf_rip; 1312 regs->r_cs = tp->tf_cs; 1313 regs->r_rflags = tp->tf_rflags; 1314 regs->r_rsp = tp->tf_rsp; 1315 regs->r_ss = tp->tf_ss; 1316 pcb = td->td_pcb; 1317 return (0); 1318} 1319 1320int 1321set_regs(struct thread *td, struct reg *regs) 1322{ 1323 struct pcb *pcb; 1324 struct trapframe *tp; 1325 1326 tp = td->td_frame; 1327 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 1328 !CS_SECURE(regs->r_cs)) 1329 return (EINVAL); 1330 tp->tf_r15 = regs->r_r15; 1331 tp->tf_r14 = regs->r_r14; 1332 tp->tf_r13 = regs->r_r13; 1333 tp->tf_r12 = regs->r_r12; 1334 tp->tf_r11 = regs->r_r11; 1335 tp->tf_r10 = regs->r_r10; 1336 tp->tf_r9 = regs->r_r9; 1337 tp->tf_r8 = regs->r_r8; 1338 tp->tf_rdi = regs->r_rdi; 1339 tp->tf_rsi = regs->r_rsi; 1340 tp->tf_rbp = regs->r_rbp; 1341 tp->tf_rbx = regs->r_rbx; 1342 tp->tf_rdx = regs->r_rdx; 1343 tp->tf_rcx = regs->r_rcx; 1344 tp->tf_rax = regs->r_rax; 1345 tp->tf_rip = regs->r_rip; 1346 tp->tf_cs = regs->r_cs; 1347 tp->tf_rflags = regs->r_rflags; 1348 tp->tf_rsp = regs->r_rsp; 1349 tp->tf_ss = regs->r_ss; 1350 pcb = td->td_pcb; 1351 return (0); 1352} 1353 1354/* XXX check all this stuff! */ 1355/* externalize from sv_xmm */ 1356static void 1357fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1358{ 1359 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1360 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1361 int i; 1362 1363 /* pcb -> fpregs */ 1364 bzero(fpregs, sizeof(*fpregs)); 1365 1366 /* FPU control/status */ 1367 penv_fpreg->en_cw = penv_xmm->en_cw; 1368 penv_fpreg->en_sw = penv_xmm->en_sw; 1369 penv_fpreg->en_tw = penv_xmm->en_tw; 1370 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1371 penv_fpreg->en_rip = penv_xmm->en_rip; 1372 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1373 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1374 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1375 1376 /* FPU registers */ 1377 for (i = 0; i < 8; ++i) 1378 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1379 1380 /* SSE registers */ 1381 for (i = 0; i < 16; ++i) 1382 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1383} 1384 1385/* internalize from fpregs into sv_xmm */ 1386static void 1387set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1388{ 1389 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1390 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1391 int i; 1392 1393 /* fpregs -> pcb */ 1394 /* FPU control/status */ 1395 penv_xmm->en_cw = penv_fpreg->en_cw; 1396 penv_xmm->en_sw = penv_fpreg->en_sw; 1397 penv_xmm->en_tw = penv_fpreg->en_tw; 1398 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1399 penv_xmm->en_rip = penv_fpreg->en_rip; 1400 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1401 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1402 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask; 1403 1404 /* FPU registers */ 1405 for (i = 0; i < 8; ++i) 1406 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1407 1408 /* SSE registers */ 1409 for (i = 0; i < 16; ++i) 1410 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1411} 1412 1413/* externalize from td->pcb */ 1414int 1415fill_fpregs(struct thread *td, struct fpreg *fpregs) 1416{ 1417 1418 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1419 return (0); 1420} 1421 1422/* internalize to td->pcb */ 1423int 1424set_fpregs(struct thread *td, struct fpreg *fpregs) 1425{ 1426 1427 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1428 return (0); 1429} 1430 1431/* 1432 * Get machine context. 1433 */ 1434int 1435get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 1436{ 1437 struct trapframe *tp; 1438 1439 tp = td->td_frame; 1440 PROC_LOCK(curthread->td_proc); 1441 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1442 PROC_UNLOCK(curthread->td_proc); 1443 mcp->mc_r15 = tp->tf_r15; 1444 mcp->mc_r14 = tp->tf_r14; 1445 mcp->mc_r13 = tp->tf_r13; 1446 mcp->mc_r12 = tp->tf_r12; 1447 mcp->mc_r11 = tp->tf_r11; 1448 mcp->mc_r10 = tp->tf_r10; 1449 mcp->mc_r9 = tp->tf_r9; 1450 mcp->mc_r8 = tp->tf_r8; 1451 mcp->mc_rdi = tp->tf_rdi; 1452 mcp->mc_rsi = tp->tf_rsi; 1453 mcp->mc_rbp = tp->tf_rbp; 1454 mcp->mc_rbx = tp->tf_rbx; 1455 mcp->mc_rcx = tp->tf_rcx; 1456 if (clear_ret != 0) { 1457 mcp->mc_rax = 0; 1458 mcp->mc_rdx = 0; 1459 } else { 1460 mcp->mc_rax = tp->tf_rax; 1461 mcp->mc_rdx = tp->tf_rdx; 1462 } 1463 mcp->mc_rip = tp->tf_rip; 1464 mcp->mc_cs = tp->tf_cs; 1465 mcp->mc_rflags = tp->tf_rflags; 1466 mcp->mc_rsp = tp->tf_rsp; 1467 mcp->mc_ss = tp->tf_ss; 1468 mcp->mc_len = sizeof(*mcp); 1469 get_fpcontext(td, mcp); 1470 return (0); 1471} 1472 1473/* 1474 * Set machine context. 1475 * 1476 * However, we don't set any but the user modifiable flags, and we won't 1477 * touch the cs selector. 1478 */ 1479int 1480set_mcontext(struct thread *td, const mcontext_t *mcp) 1481{ 1482 struct trapframe *tp; 1483 long rflags; 1484 int ret; 1485 1486 tp = td->td_frame; 1487 if (mcp->mc_len != sizeof(*mcp)) 1488 return (EINVAL); 1489 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1490 (tp->tf_rflags & ~PSL_USERCHANGE); 1491 ret = set_fpcontext(td, mcp); 1492 if (ret != 0) 1493 return (ret); 1494 tp->tf_r15 = mcp->mc_r15; 1495 tp->tf_r14 = mcp->mc_r14; 1496 tp->tf_r13 = mcp->mc_r13; 1497 tp->tf_r12 = mcp->mc_r12; 1498 tp->tf_r11 = mcp->mc_r11; 1499 tp->tf_r10 = mcp->mc_r10; 1500 tp->tf_r9 = mcp->mc_r9; 1501 tp->tf_r8 = mcp->mc_r8; 1502 tp->tf_rdi = mcp->mc_rdi; 1503 tp->tf_rsi = mcp->mc_rsi; 1504 tp->tf_rbp = mcp->mc_rbp; 1505 tp->tf_rbx = mcp->mc_rbx; 1506 tp->tf_rdx = mcp->mc_rdx; 1507 tp->tf_rcx = mcp->mc_rcx; 1508 tp->tf_rax = mcp->mc_rax; 1509 tp->tf_rip = mcp->mc_rip; 1510 tp->tf_rflags = rflags; 1511 tp->tf_rsp = mcp->mc_rsp; 1512 tp->tf_ss = mcp->mc_ss; 1513 return (0); 1514} 1515 1516static void 1517get_fpcontext(struct thread *td, mcontext_t *mcp) 1518{ 1519 1520 mcp->mc_ownedfp = npxgetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1521 mcp->mc_fpformat = npxformat(); 1522} 1523 1524static int 1525set_fpcontext(struct thread *td, const mcontext_t *mcp) 1526{ 1527 1528 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1529 return (0); 1530 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1531 return (EINVAL); 1532 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1533 /* We don't care what state is left in the FPU or PCB. */ 1534 fpstate_drop(td); 1535 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1536 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1537 /* 1538 * XXX we violate the dubious requirement that npxsetregs() 1539 * be called with interrupts disabled. 1540 * XXX obsolete on trap-16 systems? 1541 */ 1542 npxsetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1543 } else 1544 return (EINVAL); 1545 return (0); 1546} 1547 1548void 1549fpstate_drop(struct thread *td) 1550{ 1551 register_t s; 1552 1553 s = intr_disable(); 1554 if (PCPU_GET(fpcurthread) == td) 1555 npxdrop(); 1556 /* 1557 * XXX force a full drop of the npx. The above only drops it if we 1558 * owned it. 1559 * 1560 * XXX I don't much like npxgetregs()'s semantics of doing a full 1561 * drop. Dropping only to the pcb matches fnsave's behaviour. 1562 * We only need to drop to !PCB_INITDONE in sendsig(). But 1563 * sendsig() is the only caller of npxgetregs()... perhaps we just 1564 * have too many layers. 1565 */ 1566 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 1567 intr_restore(s); 1568} 1569 1570int 1571fill_dbregs(struct thread *td, struct dbreg *dbregs) 1572{ 1573 1574 return (0); 1575} 1576 1577int 1578set_dbregs(struct thread *td, struct dbreg *dbregs) 1579{ 1580 1581 return (0); 1582} 1583 1584#ifndef DDB 1585void 1586Debugger(const char *msg) 1587{ 1588 printf("Debugger(\"%s\") called.\n", msg); 1589} 1590#endif /* no DDB */ 1591 1592#ifdef DDB 1593 1594/* 1595 * Provide inb() and outb() as functions. They are normally only 1596 * available as macros calling inlined functions, thus cannot be 1597 * called inside DDB. 1598 * 1599 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1600 */ 1601 1602#undef inb 1603#undef outb 1604 1605/* silence compiler warnings */ 1606u_char inb(u_int); 1607void outb(u_int, u_char); 1608 1609u_char 1610inb(u_int port) 1611{ 1612 u_char data; 1613 /* 1614 * We use %%dx and not %1 here because i/o is done at %dx and not at 1615 * %edx, while gcc generates inferior code (movw instead of movl) 1616 * if we tell it to load (u_short) port. 1617 */ 1618 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1619 return (data); 1620} 1621 1622void 1623outb(u_int port, u_char data) 1624{ 1625 u_char al; 1626 /* 1627 * Use an unnecessary assignment to help gcc's register allocator. 1628 * This make a large difference for gcc-1.40 and a tiny difference 1629 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1630 * best results. gcc-2.6.0 can't handle this. 1631 */ 1632 al = data; 1633 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1634} 1635 1636#endif /* DDB */ 1637