machdep.c revision 117961
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 117961 2003-07-24 08:51:22Z davidxu $ 39 */ 40 41#include "opt_atalk.h" 42#include "opt_compat.h" 43#include "opt_cpu.h" 44#include "opt_ddb.h" 45#include "opt_inet.h" 46#include "opt_ipx.h" 47#include "opt_isa.h" 48#include "opt_maxmem.h" 49#include "opt_msgbuf.h" 50#include "opt_perfmon.h" 51#include "opt_kstack_pages.h" 52 53#include <sys/param.h> 54#include <sys/systm.h> 55#include <sys/sysproto.h> 56#include <sys/signalvar.h> 57#include <sys/imgact.h> 58#include <sys/kernel.h> 59#include <sys/ktr.h> 60#include <sys/linker.h> 61#include <sys/lock.h> 62#include <sys/malloc.h> 63#include <sys/mutex.h> 64#include <sys/pcpu.h> 65#include <sys/proc.h> 66#include <sys/bio.h> 67#include <sys/buf.h> 68#include <sys/reboot.h> 69#include <sys/callout.h> 70#include <sys/msgbuf.h> 71#include <sys/sched.h> 72#include <sys/sysent.h> 73#include <sys/sysctl.h> 74#include <sys/ucontext.h> 75#include <sys/vmmeter.h> 76#include <sys/bus.h> 77#include <sys/eventhandler.h> 78 79#include <vm/vm.h> 80#include <vm/vm_param.h> 81#include <vm/vm_kern.h> 82#include <vm/vm_object.h> 83#include <vm/vm_page.h> 84#include <vm/vm_map.h> 85#include <vm/vm_pager.h> 86#include <vm/vm_extern.h> 87 88#include <sys/user.h> 89#include <sys/exec.h> 90#include <sys/cons.h> 91 92#include <ddb/ddb.h> 93 94#include <net/netisr.h> 95 96#include <machine/cpu.h> 97#include <machine/cputypes.h> 98#include <machine/reg.h> 99#include <machine/clock.h> 100#include <machine/specialreg.h> 101#include <machine/md_var.h> 102#include <machine/metadata.h> 103#include <machine/proc.h> 104#ifdef PERFMON 105#include <machine/perfmon.h> 106#endif 107#include <machine/tss.h> 108 109#include <amd64/isa/icu.h> 110#include <amd64/isa/intr_machdep.h> 111#include <isa/rtc.h> 112#include <sys/ptrace.h> 113#include <machine/sigframe.h> 114 115extern u_int64_t hammer_time(u_int64_t, u_int64_t); 116extern void dblfault_handler(void); 117 118extern void printcpuinfo(void); /* XXX header file */ 119extern void identify_cpu(void); 120extern void panicifcpuunsupported(void); 121extern void initializecpu(void); 122 123#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 124#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 125 126static void cpu_startup(void *); 127static void get_fpcontext(struct thread *td, mcontext_t *mcp); 128static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 129SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 130 131int _udatasel, _ucodesel, _ucode32sel; 132u_long atdevbase; 133 134int cold = 1; 135 136long Maxmem = 0; 137 138vm_paddr_t phys_avail[10]; 139 140/* must be 2 less so 0 0 can signal end of chunks */ 141#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 142 143struct kva_md_info kmi; 144 145static struct trapframe proc0_tf; 146static struct pcpu __pcpu; 147 148struct mtx icu_lock; 149 150static void 151cpu_startup(dummy) 152 void *dummy; 153{ 154 /* 155 * Good {morning,afternoon,evening,night}. 156 */ 157 startrtclock(); 158 printcpuinfo(); 159 panicifcpuunsupported(); 160#ifdef PERFMON 161 perfmon_init(); 162#endif 163 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 164 ptoa((uintmax_t)Maxmem) / 1048576); 165 /* 166 * Display any holes after the first chunk of extended memory. 167 */ 168 if (bootverbose) { 169 int indx; 170 171 printf("Physical memory chunk(s):\n"); 172 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 173 vm_paddr_t size; 174 175 size = phys_avail[indx + 1] - phys_avail[indx]; 176 printf( 177 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 178 (uintmax_t)phys_avail[indx], 179 (uintmax_t)phys_avail[indx + 1] - 1, 180 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 181 } 182 } 183 184 vm_ksubmap_init(&kmi); 185 186 printf("avail memory = %ju (%ju MB)\n", 187 ptoa((uintmax_t)cnt.v_free_count), 188 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 189 190 /* 191 * Set up buffers, so they can be used to read disk labels. 192 */ 193 bufinit(); 194 vm_pager_bufferinit(); 195 196 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 197 cpu_setregs(); 198} 199 200/* 201 * Send an interrupt to process. 202 * 203 * Stack is set up to allow sigcode stored 204 * at top to call routine, followed by kcall 205 * to sigreturn routine below. After sigreturn 206 * resets the signal mask, the stack, and the 207 * frame pointer, it returns to the user 208 * specified pc, psl. 209 */ 210void 211sendsig(catcher, sig, mask, code) 212 sig_t catcher; 213 int sig; 214 sigset_t *mask; 215 u_long code; 216{ 217 struct sigframe sf, *sfp; 218 struct proc *p; 219 struct thread *td; 220 struct sigacts *psp; 221 char *sp; 222 struct trapframe *regs; 223 int oonstack; 224 225 td = curthread; 226 p = td->td_proc; 227 PROC_LOCK_ASSERT(p, MA_OWNED); 228 psp = p->p_sigacts; 229 mtx_assert(&psp->ps_mtx, MA_OWNED); 230 regs = td->td_frame; 231 oonstack = sigonstack(regs->tf_rsp); 232 233 /* Save user context. */ 234 bzero(&sf, sizeof(sf)); 235 sf.sf_uc.uc_sigmask = *mask; 236 sf.sf_uc.uc_stack = p->p_sigstk; 237 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 238 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 239 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 240 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 241 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 242 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 243 fpstate_drop(td); 244 245 /* Allocate space for the signal handler context. */ 246 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 247 SIGISMEMBER(psp->ps_sigonstack, sig)) { 248 sp = p->p_sigstk.ss_sp + 249 p->p_sigstk.ss_size - sizeof(struct sigframe); 250#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 251 p->p_sigstk.ss_flags |= SS_ONSTACK; 252#endif 253 } else 254 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 255 /* Align to 16 bytes. */ 256 sfp = (struct sigframe *)((unsigned long)sp & ~0xF); 257 258 /* Translate the signal if appropriate. */ 259 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 260 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 261 262 /* Build the argument list for the signal handler. */ 263 regs->tf_rdi = sig; /* arg 1 in %rdi */ 264 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 265 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 266 /* Signal handler installed with SA_SIGINFO. */ 267 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 268 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 269 270 /* Fill in POSIX parts */ 271 sf.sf_si.si_signo = sig; 272 sf.sf_si.si_code = code; 273 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 274 } else { 275 /* Old FreeBSD-style arguments. */ 276 regs->tf_rsi = code; /* arg 2 in %rsi */ 277 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 278 sf.sf_ahu.sf_handler = catcher; 279 } 280 mtx_unlock(&psp->ps_mtx); 281 PROC_UNLOCK(p); 282 283 /* 284 * Copy the sigframe out to the user's stack. 285 */ 286 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 287#ifdef DEBUG 288 printf("process %ld has trashed its stack\n", (long)p->p_pid); 289#endif 290 PROC_LOCK(p); 291 sigexit(td, SIGILL); 292 } 293 294 regs->tf_rsp = (long)sfp; 295 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 296 regs->tf_rflags &= ~PSL_T; 297 regs->tf_cs = _ucodesel; 298 PROC_LOCK(p); 299 mtx_lock(&psp->ps_mtx); 300} 301 302/* 303 * Build siginfo_t for SA thread 304 */ 305void 306cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 307{ 308 struct proc *p; 309 struct thread *td; 310 struct trapframe *regs; 311 312 td = curthread; 313 p = td->td_proc; 314 regs = td->td_frame; 315 PROC_LOCK_ASSERT(p, MA_OWNED); 316 317 bzero(si, sizeof(*si)); 318 si->si_signo = sig; 319 si->si_code = code; 320 si->si_addr = (void *)regs->tf_addr; 321 /* XXXKSE fill other fields */ 322} 323 324/* 325 * System call to cleanup state after a signal 326 * has been taken. Reset signal mask and 327 * stack state from context left by sendsig (above). 328 * Return to previous pc and psl as specified by 329 * context left by sendsig. Check carefully to 330 * make sure that the user has not modified the 331 * state to gain improper privileges. 332 * 333 * MPSAFE 334 */ 335int 336sigreturn(td, uap) 337 struct thread *td; 338 struct sigreturn_args /* { 339 const __ucontext *sigcntxp; 340 } */ *uap; 341{ 342 ucontext_t uc; 343 struct proc *p = td->td_proc; 344 struct trapframe *regs; 345 const ucontext_t *ucp; 346 long rflags; 347 int cs, error, ret; 348 349 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 350 if (error != 0) 351 return (error); 352 ucp = &uc; 353 regs = td->td_frame; 354 rflags = ucp->uc_mcontext.mc_rflags; 355 /* 356 * Don't allow users to change privileged or reserved flags. 357 */ 358 /* 359 * XXX do allow users to change the privileged flag PSL_RF. 360 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 361 * should sometimes set it there too. tf_rflags is kept in 362 * the signal context during signal handling and there is no 363 * other place to remember it, so the PSL_RF bit may be 364 * corrupted by the signal handler without us knowing. 365 * Corruption of the PSL_RF bit at worst causes one more or 366 * one less debugger trap, so allowing it is fairly harmless. 367 */ 368 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 369 printf("sigreturn: rflags = 0x%lx\n", rflags); 370 return (EINVAL); 371 } 372 373 /* 374 * Don't allow users to load a valid privileged %cs. Let the 375 * hardware check for invalid selectors, excess privilege in 376 * other selectors, invalid %eip's and invalid %esp's. 377 */ 378 cs = ucp->uc_mcontext.mc_cs; 379 if (!CS_SECURE(cs)) { 380 printf("sigreturn: cs = 0x%x\n", cs); 381 trapsignal(td, SIGBUS, T_PROTFLT); 382 return (EINVAL); 383 } 384 385 ret = set_fpcontext(td, &ucp->uc_mcontext); 386 if (ret != 0) 387 return (ret); 388 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 389 390 PROC_LOCK(p); 391#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 392 if (ucp->uc_mcontext.mc_onstack & 1) 393 p->p_sigstk.ss_flags |= SS_ONSTACK; 394 else 395 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 396#endif 397 398 td->td_sigmask = ucp->uc_sigmask; 399 SIG_CANTMASK(td->td_sigmask); 400 signotify(td); 401 PROC_UNLOCK(p); 402 td->td_pcb->pcb_flags |= PCB_FULLCTX; 403 return (EJUSTRETURN); 404} 405 406#ifdef COMPAT_FREEBSD4 407int 408freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 409{ 410 411 return sigreturn(td, (struct sigreturn_args *)uap); 412} 413#endif 414 415 416/* 417 * Machine dependent boot() routine 418 * 419 * I haven't seen anything to put here yet 420 * Possibly some stuff might be grafted back here from boot() 421 */ 422void 423cpu_boot(int howto) 424{ 425} 426 427/* 428 * Shutdown the CPU as much as possible 429 */ 430void 431cpu_halt(void) 432{ 433 for (;;) 434 __asm__ ("hlt"); 435} 436 437/* 438 * Hook to idle the CPU when possible. In the SMP case we default to 439 * off because a halted cpu will not currently pick up a new thread in the 440 * run queue until the next timer tick. If turned on this will result in 441 * approximately a 4.2% loss in real time performance in buildworld tests 442 * (but improves user and sys times oddly enough), and saves approximately 443 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 444 * 445 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 446 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 447 * Then we can have our cake and eat it too. 448 * 449 * XXX I'm turning it on for SMP as well by default for now. It seems to 450 * help lock contention somewhat, and this is critical for HTT. -Peter 451 */ 452static int cpu_idle_hlt = 1; 453SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 454 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 455 456/* 457 * Note that we have to be careful here to avoid a race between checking 458 * sched_runnable() and actually halting. If we don't do this, we may waste 459 * the time between calling hlt and the next interrupt even though there 460 * is a runnable process. 461 */ 462void 463cpu_idle(void) 464{ 465 466 if (cpu_idle_hlt) { 467 disable_intr(); 468 if (sched_runnable()) { 469 enable_intr(); 470 } else { 471 /* 472 * we must absolutely guarentee that hlt is the 473 * absolute next instruction after sti or we 474 * introduce a timing window. 475 */ 476 __asm __volatile("sti; hlt"); 477 } 478 } 479} 480 481/* 482 * Clear registers on exec 483 */ 484void 485exec_setregs(td, entry, stack, ps_strings) 486 struct thread *td; 487 u_long entry; 488 u_long stack; 489 u_long ps_strings; 490{ 491 struct trapframe *regs = td->td_frame; 492 struct pcb *pcb = td->td_pcb; 493 494 wrmsr(MSR_FSBASE, 0); 495 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 496 pcb->pcb_fsbase = 0; 497 pcb->pcb_gsbase = 0; 498 load_ds(_udatasel); 499 load_es(_udatasel); 500 load_fs(_udatasel); 501 load_gs(_udatasel); 502 pcb->pcb_ds = _udatasel; 503 pcb->pcb_es = _udatasel; 504 pcb->pcb_fs = _udatasel; 505 pcb->pcb_gs = _udatasel; 506 507 bzero((char *)regs, sizeof(struct trapframe)); 508 regs->tf_rip = entry; 509 /* This strangeness is to ensure alignment after the implied return address */ 510 regs->tf_rsp = ((stack - 8) & ~0xF) + 8; 511 regs->tf_rdi = stack; /* argv */ 512 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 513 regs->tf_ss = _udatasel; 514 regs->tf_cs = _ucodesel; 515 516 /* 517 * Arrange to trap the next npx or `fwait' instruction (see npx.c 518 * for why fwait must be trapped at least if there is an npx or an 519 * emulator). This is mainly to handle the case where npx0 is not 520 * configured, since the npx routines normally set up the trap 521 * otherwise. It should be done only at boot time, but doing it 522 * here allows modifying `npx_exists' for testing the emulator on 523 * systems with an npx. 524 */ 525 load_cr0(rcr0() | CR0_MP | CR0_TS); 526 527 /* Initialize the npx (if any) for the current process. */ 528 /* 529 * XXX the above load_cr0() also initializes it and is a layering 530 * violation if NPX is configured. It drops the npx partially 531 * and this would be fatal if we were interrupted now, and decided 532 * to force the state to the pcb, and checked the invariant 533 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 534 * ALL of this can happen except the check. The check used to 535 * happen and be fatal later when we didn't complete the drop 536 * before returning to user mode. This should be fixed properly 537 * soon. 538 */ 539 fpstate_drop(td); 540} 541 542void 543cpu_setregs(void) 544{ 545 register_t cr0; 546 547 cr0 = rcr0(); 548 cr0 |= CR0_NE; /* Done by npxinit() */ 549 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 550 cr0 |= CR0_WP | CR0_AM; 551 load_cr0(cr0); 552} 553 554static int 555sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 556{ 557 int error; 558 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 559 req); 560 if (!error && req->newptr) 561 resettodr(); 562 return (error); 563} 564 565SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 566 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 567 568SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 569 CTLFLAG_RW, &disable_rtc_set, 0, ""); 570 571SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 572 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 573 574/* 575 * Initialize 386 and configure to run kernel 576 */ 577 578/* 579 * Initialize segments & interrupt table 580 */ 581 582struct user_segment_descriptor gdt[NGDT];/* global descriptor table */ 583static struct gate_descriptor idt0[NIDT]; 584struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 585 586static char dblfault_stack[PAGE_SIZE] __aligned(16); 587 588struct amd64tss common_tss; 589 590/* software prototypes -- in more palatable form */ 591struct soft_segment_descriptor gdt_segs[] = { 592/* GNULL_SEL 0 Null Descriptor */ 593{ 0x0, /* segment base address */ 594 0x0, /* length */ 595 0, /* segment type */ 596 0, /* segment descriptor priority level */ 597 0, /* segment descriptor present */ 598 0, /* long */ 599 0, /* default 32 vs 16 bit size */ 600 0 /* limit granularity (byte/page units)*/ }, 601/* GCODE_SEL 1 Code Descriptor for kernel */ 602{ 0x0, /* segment base address */ 603 0xfffff, /* length - all address space */ 604 SDT_MEMERA, /* segment type */ 605 SEL_KPL, /* segment descriptor priority level */ 606 1, /* segment descriptor present */ 607 1, /* long */ 608 0, /* default 32 vs 16 bit size */ 609 1 /* limit granularity (byte/page units)*/ }, 610/* GDATA_SEL 2 Data Descriptor for kernel */ 611{ 0x0, /* segment base address */ 612 0xfffff, /* length - all address space */ 613 SDT_MEMRWA, /* segment type */ 614 SEL_KPL, /* segment descriptor priority level */ 615 1, /* segment descriptor present */ 616 1, /* long */ 617 0, /* default 32 vs 16 bit size */ 618 1 /* limit granularity (byte/page units)*/ }, 619/* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 620{ 0x0, /* segment base address */ 621 0xfffff, /* length - all address space */ 622 SDT_MEMERA, /* segment type */ 623 SEL_UPL, /* segment descriptor priority level */ 624 1, /* segment descriptor present */ 625 0, /* long */ 626 1, /* default 32 vs 16 bit size */ 627 1 /* limit granularity (byte/page units)*/ }, 628/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 629{ 0x0, /* segment base address */ 630 0xfffff, /* length - all address space */ 631 SDT_MEMRWA, /* segment type */ 632 SEL_UPL, /* segment descriptor priority level */ 633 1, /* segment descriptor present */ 634 0, /* long */ 635 1, /* default 32 vs 16 bit size */ 636 1 /* limit granularity (byte/page units)*/ }, 637/* GUCODE_SEL 5 64 bit Code Descriptor for user */ 638{ 0x0, /* segment base address */ 639 0xfffff, /* length - all address space */ 640 SDT_MEMERA, /* segment type */ 641 SEL_UPL, /* segment descriptor priority level */ 642 1, /* segment descriptor present */ 643 1, /* long */ 644 0, /* default 32 vs 16 bit size */ 645 1 /* limit granularity (byte/page units)*/ }, 646/* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 647{ 648 0x0, /* segment base address */ 649 sizeof(struct amd64tss)-1,/* length - all address space */ 650 SDT_SYSTSS, /* segment type */ 651 SEL_KPL, /* segment descriptor priority level */ 652 1, /* segment descriptor present */ 653 0, /* long */ 654 0, /* unused - default 32 vs 16 bit size */ 655 0 /* limit granularity (byte/page units)*/ }, 656/* Actually, the TSS is a system descriptor which is double size */ 657{ 0x0, /* segment base address */ 658 0x0, /* length */ 659 0, /* segment type */ 660 0, /* segment descriptor priority level */ 661 0, /* segment descriptor present */ 662 0, /* long */ 663 0, /* default 32 vs 16 bit size */ 664 0 /* limit granularity (byte/page units)*/ }, 665}; 666 667void 668setidt(idx, func, typ, dpl, ist) 669 int idx; 670 inthand_t *func; 671 int typ; 672 int dpl; 673 int ist; 674{ 675 struct gate_descriptor *ip; 676 677 ip = idt + idx; 678 ip->gd_looffset = (uintptr_t)func; 679 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 680 ip->gd_ist = ist; 681 ip->gd_xx = 0; 682 ip->gd_type = typ; 683 ip->gd_dpl = dpl; 684 ip->gd_p = 1; 685 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 686} 687 688#define IDTVEC(name) __CONCAT(X,name) 689 690extern inthand_t 691 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 692 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 693 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 694 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 695 IDTVEC(xmm), IDTVEC(dblfault), 696 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 697 698void 699sdtossd(sd, ssd) 700 struct user_segment_descriptor *sd; 701 struct soft_segment_descriptor *ssd; 702{ 703 704 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 705 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 706 ssd->ssd_type = sd->sd_type; 707 ssd->ssd_dpl = sd->sd_dpl; 708 ssd->ssd_p = sd->sd_p; 709 ssd->ssd_long = sd->sd_long; 710 ssd->ssd_def32 = sd->sd_def32; 711 ssd->ssd_gran = sd->sd_gran; 712} 713 714void 715ssdtosd(ssd, sd) 716 struct soft_segment_descriptor *ssd; 717 struct user_segment_descriptor *sd; 718{ 719 720 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 721 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 722 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 723 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 724 sd->sd_type = ssd->ssd_type; 725 sd->sd_dpl = ssd->ssd_dpl; 726 sd->sd_p = ssd->ssd_p; 727 sd->sd_long = ssd->ssd_long; 728 sd->sd_def32 = ssd->ssd_def32; 729 sd->sd_gran = ssd->ssd_gran; 730} 731 732void 733ssdtosyssd(ssd, sd) 734 struct soft_segment_descriptor *ssd; 735 struct system_segment_descriptor *sd; 736{ 737 738 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 739 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 740 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 741 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 742 sd->sd_type = ssd->ssd_type; 743 sd->sd_dpl = ssd->ssd_dpl; 744 sd->sd_p = ssd->ssd_p; 745 sd->sd_gran = ssd->ssd_gran; 746} 747 748 749#define PHYSMAP_SIZE (2 * 8) 750 751struct bios_smap { 752 u_int64_t base; 753 u_int64_t length; 754 u_int32_t type; 755} __packed; 756 757/* 758 * Populate the (physmap) array with base/bound pairs describing the 759 * available physical memory in the system, then test this memory and 760 * build the phys_avail array describing the actually-available memory. 761 * 762 * If we cannot accurately determine the physical memory map, then use 763 * value from the 0xE801 call, and failing that, the RTC. 764 * 765 * Total memory size may be set by the kernel environment variable 766 * hw.physmem or the compile-time define MAXMEM. 767 * 768 * XXX first should be vm_paddr_t. 769 */ 770static void 771getmemsize(caddr_t kmdp, u_int64_t first) 772{ 773 int i, physmap_idx, pa_indx; 774 u_int basemem, extmem; 775 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 776 pt_entry_t *pte; 777 char *cp; 778 struct bios_smap *smapbase, *smap, *smapend; 779 u_int32_t smapsize; 780 781 bzero(physmap, sizeof(physmap)); 782 basemem = 0; 783 physmap_idx = 0; 784 785 /* 786 * get memory map from INT 15:E820, kindly supplied by the loader. 787 * 788 * subr_module.c says: 789 * "Consumer may safely assume that size value precedes data." 790 * ie: an int32_t immediately precedes smap. 791 */ 792 smapbase = (struct bios_smap *)preload_search_info(kmdp, MODINFO_METADATA | MODINFOMD_SMAP); 793 if (smapbase == 0) 794 smapbase = (struct bios_smap *)preload_search_info(kmdp, MODINFO_METADATA | 0x0009); /* Old value for MODINFOMD_SMAP */ 795 if (smapbase == 0) { 796 panic("No BIOS smap info from loader!"); 797 goto deep_shit; 798 } 799 smapsize = *((u_int32_t *)smapbase - 1); 800 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 801 802 for (smap = smapbase; smap < smapend; smap++) { 803 if (boothowto & RB_VERBOSE) 804 printf("SMAP type=%02x base=%016lx len=%016lx\n", 805 smap->type, smap->base, smap->length); 806 807 if (smap->type != 0x01) { 808 continue; 809 } 810 811 if (smap->length == 0) { 812next_run: 813 continue; 814 } 815 816 for (i = 0; i <= physmap_idx; i += 2) { 817 if (smap->base < physmap[i + 1]) { 818 if (boothowto & RB_VERBOSE) 819 printf( 820 "Overlapping or non-montonic memory region, ignoring second region\n"); 821 goto next_run; 822 } 823 } 824 825 if (smap->base == physmap[physmap_idx + 1]) { 826 physmap[physmap_idx + 1] += smap->length; 827 continue; 828 } 829 830 physmap_idx += 2; 831 if (physmap_idx == PHYSMAP_SIZE) { 832 printf( 833 "Too many segments in the physical address map, giving up\n"); 834 break; 835 } 836 physmap[physmap_idx] = smap->base; 837 physmap[physmap_idx + 1] = smap->base + smap->length; 838 } 839 840 /* 841 * Perform "base memory" related probes & setup based on SMAP 842 */ 843deep_shit: 844 if (basemem == 0) { 845 for (i = 0; i <= physmap_idx; i += 2) { 846 if (physmap[i] == 0x00000000) { 847 basemem = physmap[i + 1] / 1024; 848 break; 849 } 850 } 851 852 if (basemem == 0) { 853 basemem = rtcin(RTC_BASELO) + (rtcin(RTC_BASEHI) << 8); 854 } 855 856 if (basemem == 0) { 857 basemem = 640; 858 } 859 860 if (basemem > 640) { 861 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 862 basemem); 863 basemem = 640; 864 } 865 866#if 0 867 for (pa = trunc_page(basemem * 1024); 868 pa < ISA_HOLE_START; pa += PAGE_SIZE) 869 pmap_kenter(KERNBASE + pa, pa); 870#endif 871 } 872 873 if (physmap[1] != 0) 874 goto physmap_done; 875 876 /* 877 * Prefer the RTC value for extended memory. 878 */ 879 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 880 881 /* 882 * Special hack for chipsets that still remap the 384k hole when 883 * there's 16MB of memory - this really confuses people that 884 * are trying to use bus mastering ISA controllers with the 885 * "16MB limit"; they only have 16MB, but the remapping puts 886 * them beyond the limit. 887 * 888 * If extended memory is between 15-16MB (16-17MB phys address range), 889 * chop it to 15MB. 890 */ 891 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 892 extmem = 15 * 1024; 893 894 physmap[0] = 0; 895 physmap[1] = basemem * 1024; 896 physmap_idx = 2; 897 physmap[physmap_idx] = 0x100000; 898 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 899 900physmap_done: 901 /* 902 * Now, physmap contains a map of physical memory. 903 */ 904 /* 905 * Maxmem isn't the "maximum memory", it's one larger than the 906 * highest page of the physical address space. It should be 907 * called something like "Maxphyspage". We may adjust this 908 * based on ``hw.physmem'' and the results of the memory test. 909 */ 910 Maxmem = atop(physmap[physmap_idx + 1]); 911 912#ifdef MAXMEM 913 Maxmem = MAXMEM / 4; 914#endif 915 916 /* 917 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 918 * for the appropriate modifiers. This overrides MAXMEM. 919 */ 920 if ((cp = getenv("hw.physmem")) != NULL) { 921 u_int64_t AllowMem, sanity; 922 char *ep; 923 924 sanity = AllowMem = strtouq(cp, &ep, 0); 925 if ((ep != cp) && (*ep != 0)) { 926 switch(*ep) { 927 case 'g': 928 case 'G': 929 AllowMem <<= 10; 930 case 'm': 931 case 'M': 932 AllowMem <<= 10; 933 case 'k': 934 case 'K': 935 AllowMem <<= 10; 936 break; 937 default: 938 AllowMem = sanity = 0; 939 } 940 if (AllowMem < sanity) 941 AllowMem = 0; 942 } 943 if (AllowMem == 0) 944 printf("Ignoring invalid memory size of '%s'\n", cp); 945 else 946 Maxmem = atop(AllowMem); 947 freeenv(cp); 948 } 949 950 if (atop(physmap[physmap_idx + 1]) != Maxmem && 951 (boothowto & RB_VERBOSE)) 952 printf("Physical memory use set to %ldK\n", Maxmem * 4); 953 954 /* 955 * If Maxmem has been increased beyond what the system has detected, 956 * extend the last memory segment to the new limit. 957 */ 958 if (atop(physmap[physmap_idx + 1]) < Maxmem) 959 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 960 961 /* call pmap initialization to make new kernel address space */ 962 pmap_bootstrap(&first); 963 964 /* 965 * Size up each available chunk of physical memory. 966 */ 967 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 968 pa_indx = 0; 969 phys_avail[pa_indx++] = physmap[0]; 970 phys_avail[pa_indx] = physmap[0]; 971 pte = CMAP1; 972 973 /* 974 * physmap is in bytes, so when converting to page boundaries, 975 * round up the start address and round down the end address. 976 */ 977 for (i = 0; i <= physmap_idx; i += 2) { 978 vm_paddr_t end; 979 980 end = ptoa((vm_paddr_t)Maxmem); 981 if (physmap[i + 1] < end) 982 end = trunc_page(physmap[i + 1]); 983 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 984 int tmp, page_bad; 985 int *ptr = (int *)CADDR1; 986 987 /* 988 * block out kernel memory as not available. 989 */ 990 if (pa >= 0x100000 && pa < first) 991 continue; 992 993 page_bad = FALSE; 994 995 /* 996 * map page into kernel: valid, read/write,non-cacheable 997 */ 998 *pte = pa | PG_V | PG_RW | PG_N; 999 invltlb(); 1000 1001 tmp = *(int *)ptr; 1002 /* 1003 * Test for alternating 1's and 0's 1004 */ 1005 *(volatile int *)ptr = 0xaaaaaaaa; 1006 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1007 page_bad = TRUE; 1008 } 1009 /* 1010 * Test for alternating 0's and 1's 1011 */ 1012 *(volatile int *)ptr = 0x55555555; 1013 if (*(volatile int *)ptr != 0x55555555) { 1014 page_bad = TRUE; 1015 } 1016 /* 1017 * Test for all 1's 1018 */ 1019 *(volatile int *)ptr = 0xffffffff; 1020 if (*(volatile int *)ptr != 0xffffffff) { 1021 page_bad = TRUE; 1022 } 1023 /* 1024 * Test for all 0's 1025 */ 1026 *(volatile int *)ptr = 0x0; 1027 if (*(volatile int *)ptr != 0x0) { 1028 page_bad = TRUE; 1029 } 1030 /* 1031 * Restore original value. 1032 */ 1033 *(int *)ptr = tmp; 1034 1035 /* 1036 * Adjust array of valid/good pages. 1037 */ 1038 if (page_bad == TRUE) { 1039 continue; 1040 } 1041 /* 1042 * If this good page is a continuation of the 1043 * previous set of good pages, then just increase 1044 * the end pointer. Otherwise start a new chunk. 1045 * Note that "end" points one higher than end, 1046 * making the range >= start and < end. 1047 * If we're also doing a speculative memory 1048 * test and we at or past the end, bump up Maxmem 1049 * so that we keep going. The first bad page 1050 * will terminate the loop. 1051 */ 1052 if (phys_avail[pa_indx] == pa) { 1053 phys_avail[pa_indx] += PAGE_SIZE; 1054 } else { 1055 pa_indx++; 1056 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1057 printf( 1058 "Too many holes in the physical address space, giving up\n"); 1059 pa_indx--; 1060 break; 1061 } 1062 phys_avail[pa_indx++] = pa; /* start */ 1063 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1064 } 1065 physmem++; 1066 } 1067 } 1068 *pte = 0; 1069 invltlb(); 1070 1071 /* 1072 * XXX 1073 * The last chunk must contain at least one page plus the message 1074 * buffer to avoid complicating other code (message buffer address 1075 * calculation, etc.). 1076 */ 1077 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1078 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1079 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1080 phys_avail[pa_indx--] = 0; 1081 phys_avail[pa_indx--] = 0; 1082 } 1083 1084 Maxmem = atop(phys_avail[pa_indx]); 1085 1086 /* Trim off space for the message buffer. */ 1087 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1088 1089 avail_end = phys_avail[pa_indx]; 1090} 1091 1092u_int64_t 1093hammer_time(u_int64_t modulep, u_int64_t physfree) 1094{ 1095 caddr_t kmdp; 1096 int gsel_tss, off, x; 1097 struct region_descriptor r_gdt, r_idt; 1098 struct pcpu *pc; 1099 u_int64_t msr; 1100 char *env; 1101 1102 /* Turn on PTE NX (no execute) bit */ 1103 msr = rdmsr(MSR_EFER) | EFER_NXE; 1104 wrmsr(MSR_EFER, msr); 1105 1106 proc0.p_uarea = (struct user *)(physfree + KERNBASE); 1107 bzero(proc0.p_uarea, UAREA_PAGES * PAGE_SIZE); 1108 physfree += UAREA_PAGES * PAGE_SIZE; 1109 thread0.td_kstack = physfree + KERNBASE; 1110 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1111 physfree += KSTACK_PAGES * PAGE_SIZE; 1112 thread0.td_pcb = (struct pcb *) 1113 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1114 1115 atdevbase = ISA_HOLE_START + KERNBASE; 1116 1117 /* 1118 * This may be done better later if it gets more high level 1119 * components in it. If so just link td->td_proc here. 1120 */ 1121 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1122 1123 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1124 preload_bootstrap_relocate(KERNBASE); 1125 kmdp = preload_search_by_type("elf kernel"); 1126 if (kmdp == NULL) 1127 kmdp = preload_search_by_type("elf64 kernel"); 1128 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1129 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1130 1131 /* Init basic tunables, hz etc */ 1132 init_param1(); 1133 1134 /* 1135 * make gdt memory segments 1136 */ 1137 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss; 1138 1139 for (x = 0; x < NGDT; x++) { 1140 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1141 ssdtosd(&gdt_segs[x], &gdt[x]); 1142 } 1143 ssdtosyssd(&gdt_segs[GPROC0_SEL], (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1144 1145 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1146 r_gdt.rd_base = (long) gdt; 1147 lgdt(&r_gdt); 1148 pc = &__pcpu; 1149 1150 wrmsr(MSR_FSBASE, 0); /* User value */ 1151 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1152 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 1153 1154 pcpu_init(pc, 0, sizeof(struct pcpu)); 1155 PCPU_SET(prvspace, pc); 1156 PCPU_SET(curthread, &thread0); 1157 1158 /* 1159 * Initialize mutexes. 1160 * 1161 * icu_lock: in order to allow an interrupt to occur in a critical 1162 * section, to set pcpu->ipending (etc...) properly, we 1163 * must be able to get the icu lock, so it can't be 1164 * under witness. 1165 */ 1166 mutex_init(); 1167 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_RECURSE); 1168 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1169 1170 /* exceptions */ 1171 for (x = 0; x < NIDT; x++) 1172 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1173 setidt(0, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1174 setidt(1, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1175 setidt(2, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 0); 1176 setidt(3, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1177 setidt(4, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1178 setidt(5, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1179 setidt(6, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1180 setidt(7, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1181 setidt(8, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1182 setidt(9, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1183 setidt(10, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1184 setidt(11, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1185 setidt(12, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1186 setidt(13, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1187 setidt(14, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1188 setidt(15, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1189 setidt(16, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1190 setidt(17, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1191 setidt(18, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1192 setidt(19, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1193 1194 r_idt.rd_limit = sizeof(idt0) - 1; 1195 r_idt.rd_base = (long) idt; 1196 lidt(&r_idt); 1197 1198 /* 1199 * Initialize the console before we print anything out. 1200 */ 1201 cninit(); 1202 1203#ifdef DEV_ISA 1204 isa_defaultirq(); 1205#endif 1206 1207#ifdef DDB 1208 kdb_init(); 1209 if (boothowto & RB_KDB) 1210 Debugger("Boot flags requested debugger"); 1211#endif 1212 1213 identify_cpu(); /* Final stage of CPU initialization */ 1214 initializecpu(); /* Initialize CPU registers */ 1215 1216 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1217 common_tss.tss_rsp0 = thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1218 1219 /* doublefault stack space, runs on ist1 */ 1220 common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1221 1222 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1223 ltr(gsel_tss); 1224 1225 /* Set up the fast syscall stuff */ 1226 msr = rdmsr(MSR_EFER) | EFER_SCE; 1227 wrmsr(MSR_EFER, msr); 1228 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1229 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1230 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1231 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1232 wrmsr(MSR_STAR, msr); 1233 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1234 1235 getmemsize(kmdp, physfree); 1236 init_param2(physmem); 1237 1238 /* now running on new page tables, configured,and u/iom is accessible */ 1239 1240 /* Map the message buffer. */ 1241 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1242 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1243 1244 msgbufinit(msgbufp, MSGBUF_SIZE); 1245 1246 /* transfer to user mode */ 1247 1248 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1249 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1250 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1251 1252 /* setup proc 0's pcb */ 1253 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1254 thread0.td_pcb->pcb_cr3 = KPML4phys; 1255 thread0.td_frame = &proc0_tf; 1256 1257 env = getenv("kernelname"); 1258 if (env != NULL) 1259 strlcpy(kernelname, env, sizeof(kernelname)); 1260 1261 /* Location of kernel stack for locore */ 1262 return ((u_int64_t)thread0.td_pcb); 1263} 1264 1265void 1266cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1267{ 1268} 1269 1270int 1271ptrace_set_pc(struct thread *td, unsigned long addr) 1272{ 1273 td->td_frame->tf_rip = addr; 1274 return (0); 1275} 1276 1277int 1278ptrace_single_step(struct thread *td) 1279{ 1280 td->td_frame->tf_rflags |= PSL_T; 1281 return (0); 1282} 1283 1284int 1285fill_regs(struct thread *td, struct reg *regs) 1286{ 1287 struct pcb *pcb; 1288 struct trapframe *tp; 1289 1290 tp = td->td_frame; 1291 regs->r_r15 = tp->tf_r15; 1292 regs->r_r14 = tp->tf_r14; 1293 regs->r_r13 = tp->tf_r13; 1294 regs->r_r12 = tp->tf_r12; 1295 regs->r_r11 = tp->tf_r11; 1296 regs->r_r10 = tp->tf_r10; 1297 regs->r_r9 = tp->tf_r9; 1298 regs->r_r8 = tp->tf_r8; 1299 regs->r_rdi = tp->tf_rdi; 1300 regs->r_rsi = tp->tf_rsi; 1301 regs->r_rbp = tp->tf_rbp; 1302 regs->r_rbx = tp->tf_rbx; 1303 regs->r_rdx = tp->tf_rdx; 1304 regs->r_rcx = tp->tf_rcx; 1305 regs->r_rax = tp->tf_rax; 1306 regs->r_rip = tp->tf_rip; 1307 regs->r_cs = tp->tf_cs; 1308 regs->r_rflags = tp->tf_rflags; 1309 regs->r_rsp = tp->tf_rsp; 1310 regs->r_ss = tp->tf_ss; 1311 pcb = td->td_pcb; 1312 return (0); 1313} 1314 1315int 1316set_regs(struct thread *td, struct reg *regs) 1317{ 1318 struct pcb *pcb; 1319 struct trapframe *tp; 1320 1321 tp = td->td_frame; 1322 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) || 1323 !CS_SECURE(regs->r_cs)) 1324 return (EINVAL); 1325 tp->tf_r15 = regs->r_r15; 1326 tp->tf_r14 = regs->r_r14; 1327 tp->tf_r13 = regs->r_r13; 1328 tp->tf_r12 = regs->r_r12; 1329 tp->tf_r11 = regs->r_r11; 1330 tp->tf_r10 = regs->r_r10; 1331 tp->tf_r9 = regs->r_r9; 1332 tp->tf_r8 = regs->r_r8; 1333 tp->tf_rdi = regs->r_rdi; 1334 tp->tf_rsi = regs->r_rsi; 1335 tp->tf_rbp = regs->r_rbp; 1336 tp->tf_rbx = regs->r_rbx; 1337 tp->tf_rdx = regs->r_rdx; 1338 tp->tf_rcx = regs->r_rcx; 1339 tp->tf_rax = regs->r_rax; 1340 tp->tf_rip = regs->r_rip; 1341 tp->tf_cs = regs->r_cs; 1342 tp->tf_rflags = regs->r_rflags; 1343 tp->tf_rsp = regs->r_rsp; 1344 tp->tf_ss = regs->r_ss; 1345 pcb = td->td_pcb; 1346 return (0); 1347} 1348 1349/* XXX check all this stuff! */ 1350/* externalize from sv_xmm */ 1351static void 1352fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1353{ 1354 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1355 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1356 int i; 1357 1358 /* pcb -> fpregs */ 1359 bzero(fpregs, sizeof(*fpregs)); 1360 1361 /* FPU control/status */ 1362 penv_fpreg->en_cw = penv_xmm->en_cw; 1363 penv_fpreg->en_sw = penv_xmm->en_sw; 1364 penv_fpreg->en_tw = penv_xmm->en_tw; 1365 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1366 penv_fpreg->en_rip = penv_xmm->en_rip; 1367 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1368 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1369 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1370 1371 /* FPU registers */ 1372 for (i = 0; i < 8; ++i) 1373 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1374 1375 /* SSE registers */ 1376 for (i = 0; i < 16; ++i) 1377 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1378} 1379 1380/* internalize from fpregs into sv_xmm */ 1381static void 1382set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1383{ 1384 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1385 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1386 int i; 1387 1388 /* fpregs -> pcb */ 1389 /* FPU control/status */ 1390 penv_xmm->en_cw = penv_fpreg->en_cw; 1391 penv_xmm->en_sw = penv_fpreg->en_sw; 1392 penv_xmm->en_tw = penv_fpreg->en_tw; 1393 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1394 penv_xmm->en_rip = penv_fpreg->en_rip; 1395 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1396 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1397 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask; 1398 1399 /* FPU registers */ 1400 for (i = 0; i < 8; ++i) 1401 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1402 1403 /* SSE registers */ 1404 for (i = 0; i < 16; ++i) 1405 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1406} 1407 1408/* externalize from td->pcb */ 1409int 1410fill_fpregs(struct thread *td, struct fpreg *fpregs) 1411{ 1412 1413 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1414 return (0); 1415} 1416 1417/* internalize to td->pcb */ 1418int 1419set_fpregs(struct thread *td, struct fpreg *fpregs) 1420{ 1421 1422 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1423 return (0); 1424} 1425 1426/* 1427 * Get machine context. 1428 */ 1429int 1430get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 1431{ 1432 struct trapframe *tp; 1433 1434 tp = td->td_frame; 1435 1436 PROC_LOCK(curthread->td_proc); 1437 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1438 PROC_UNLOCK(curthread->td_proc); 1439 mcp->mc_r15 = tp->tf_r15; 1440 mcp->mc_r14 = tp->tf_r14; 1441 mcp->mc_r13 = tp->tf_r13; 1442 mcp->mc_r12 = tp->tf_r12; 1443 mcp->mc_r11 = tp->tf_r11; 1444 mcp->mc_r10 = tp->tf_r10; 1445 mcp->mc_r9 = tp->tf_r9; 1446 mcp->mc_r8 = tp->tf_r8; 1447 mcp->mc_rdi = tp->tf_rdi; 1448 mcp->mc_rsi = tp->tf_rsi; 1449 mcp->mc_rbp = tp->tf_rbp; 1450 mcp->mc_rbx = tp->tf_rbx; 1451 mcp->mc_rcx = tp->tf_rcx; 1452 if (clear_ret != 0) { 1453 mcp->mc_rax = 0; 1454 mcp->mc_rdx = 0; 1455 } else { 1456 mcp->mc_rax = tp->tf_rax; 1457 mcp->mc_rdx = tp->tf_rdx; 1458 } 1459 mcp->mc_rip = tp->tf_rip; 1460 mcp->mc_cs = tp->tf_cs; 1461 mcp->mc_rflags = tp->tf_rflags; 1462 mcp->mc_rsp = tp->tf_rsp; 1463 mcp->mc_ss = tp->tf_ss; 1464 mcp->mc_len = sizeof(*mcp); 1465 get_fpcontext(td, mcp); 1466 return (0); 1467} 1468 1469/* 1470 * Set machine context. 1471 * 1472 * However, we don't set any but the user modifiable flags, and we won't 1473 * touch the cs selector. 1474 */ 1475int 1476set_mcontext(struct thread *td, const mcontext_t *mcp) 1477{ 1478 struct trapframe *tp; 1479 long rflags; 1480 int ret; 1481 1482 tp = td->td_frame; 1483 if (mcp->mc_len != sizeof(*mcp)) 1484 return (EINVAL); 1485 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1486 (tp->tf_rflags & ~PSL_USERCHANGE); 1487 if ((ret = set_fpcontext(td, mcp)) == 0) { 1488 tp->tf_r15 = mcp->mc_r15; 1489 tp->tf_r14 = mcp->mc_r14; 1490 tp->tf_r13 = mcp->mc_r13; 1491 tp->tf_r12 = mcp->mc_r12; 1492 tp->tf_r11 = mcp->mc_r11; 1493 tp->tf_r10 = mcp->mc_r10; 1494 tp->tf_r9 = mcp->mc_r9; 1495 tp->tf_r8 = mcp->mc_r8; 1496 tp->tf_rdi = mcp->mc_rdi; 1497 tp->tf_rsi = mcp->mc_rsi; 1498 tp->tf_rbp = mcp->mc_rbp; 1499 tp->tf_rbx = mcp->mc_rbx; 1500 tp->tf_rdx = mcp->mc_rdx; 1501 tp->tf_rcx = mcp->mc_rcx; 1502 tp->tf_rax = mcp->mc_rax; 1503 tp->tf_rip = mcp->mc_rip; 1504 tp->tf_rflags = rflags; 1505 tp->tf_rsp = mcp->mc_rsp; 1506 tp->tf_ss = mcp->mc_ss; 1507 ret = 0; 1508 } 1509 return (ret); 1510} 1511 1512static void 1513get_fpcontext(struct thread *td, mcontext_t *mcp) 1514{ 1515 struct savefpu *addr; 1516 1517 /* 1518 * XXX mc_fpstate might be misaligned, since its declaration is not 1519 * unportabilized using __attribute__((aligned(16))) like the 1520 * declaration of struct savemm, and anyway, alignment doesn't work 1521 * for auto variables since we don't use gcc's pessimal stack 1522 * alignment. Work around this by abusing the spare fields after 1523 * mcp->mc_fpstate. 1524 * 1525 * XXX unpessimize most cases by only aligning when fxsave might be 1526 * called, although this requires knowing too much about 1527 * npxgetregs()'s internals. 1528 */ 1529 addr = (struct savefpu *)&mcp->mc_fpstate; 1530 if (td == PCPU_GET(fpcurthread) && ((uintptr_t)(void *)addr & 0xF)) { 1531 do 1532 addr = (void *)((char *)addr + 4); 1533 while ((uintptr_t)(void *)addr & 0xF); 1534 } 1535 mcp->mc_ownedfp = npxgetregs(td, addr); 1536 if (addr != (struct savefpu *)&mcp->mc_fpstate) { 1537 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 1538 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 1539 } 1540 mcp->mc_fpformat = npxformat(); 1541} 1542 1543static int 1544set_fpcontext(struct thread *td, const mcontext_t *mcp) 1545{ 1546 struct savefpu *addr; 1547 1548 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1549 return (0); 1550 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1551 return (EINVAL); 1552 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1553 /* We don't care what state is left in the FPU or PCB. */ 1554 fpstate_drop(td); 1555 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1556 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1557 /* XXX align as above. */ 1558 addr = (struct savefpu *)&mcp->mc_fpstate; 1559 if (td == PCPU_GET(fpcurthread) && 1560 ((uintptr_t)(void *)addr & 0xF)) { 1561 do 1562 addr = (void *)((char *)addr + 4); 1563 while ((uintptr_t)(void *)addr & 0xF); 1564 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 1565 } 1566 /* 1567 * XXX we violate the dubious requirement that npxsetregs() 1568 * be called with interrupts disabled. 1569 */ 1570 npxsetregs(td, addr); 1571 /* 1572 * Don't bother putting things back where they were in the 1573 * misaligned case, since we know that the caller won't use 1574 * them again. 1575 */ 1576 } else 1577 return (EINVAL); 1578 return (0); 1579} 1580 1581void 1582fpstate_drop(struct thread *td) 1583{ 1584 register_t s; 1585 1586 s = intr_disable(); 1587 if (PCPU_GET(fpcurthread) == td) 1588 npxdrop(); 1589 /* 1590 * XXX force a full drop of the npx. The above only drops it if we 1591 * owned it. 1592 * 1593 * XXX I don't much like npxgetregs()'s semantics of doing a full 1594 * drop. Dropping only to the pcb matches fnsave's behaviour. 1595 * We only need to drop to !PCB_INITDONE in sendsig(). But 1596 * sendsig() is the only caller of npxgetregs()... perhaps we just 1597 * have too many layers. 1598 */ 1599 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 1600 intr_restore(s); 1601} 1602 1603int 1604fill_dbregs(struct thread *td, struct dbreg *dbregs) 1605{ 1606 1607 return (0); 1608} 1609 1610int 1611set_dbregs(struct thread *td, struct dbreg *dbregs) 1612{ 1613 1614 return (0); 1615} 1616 1617#ifndef DDB 1618void 1619Debugger(const char *msg) 1620{ 1621 printf("Debugger(\"%s\") called.\n", msg); 1622} 1623#endif /* no DDB */ 1624 1625#ifdef DDB 1626 1627/* 1628 * Provide inb() and outb() as functions. They are normally only 1629 * available as macros calling inlined functions, thus cannot be 1630 * called inside DDB. 1631 * 1632 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1633 */ 1634 1635#undef inb 1636#undef outb 1637 1638/* silence compiler warnings */ 1639u_char inb(u_int); 1640void outb(u_int, u_char); 1641 1642u_char 1643inb(u_int port) 1644{ 1645 u_char data; 1646 /* 1647 * We use %%dx and not %1 here because i/o is done at %dx and not at 1648 * %edx, while gcc generates inferior code (movw instead of movl) 1649 * if we tell it to load (u_short) port. 1650 */ 1651 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1652 return (data); 1653} 1654 1655void 1656outb(u_int port, u_char data) 1657{ 1658 u_char al; 1659 /* 1660 * Use an unnecessary assignment to help gcc's register allocator. 1661 * This make a large difference for gcc-1.40 and a tiny difference 1662 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1663 * best results. gcc-2.6.0 can't handle this. 1664 */ 1665 al = data; 1666 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1667} 1668 1669#endif /* DDB */ 1670