machdep.c revision 104513
1/*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 * $FreeBSD: head/sys/amd64/amd64/machdep.c 104513 2002-10-05 14:36:14Z deischen $ 39 */ 40 41#include "opt_atalk.h" 42#include "opt_compat.h" 43#include "opt_cpu.h" 44#include "opt_ddb.h" 45#include "opt_inet.h" 46#include "opt_ipx.h" 47#include "opt_isa.h" 48#include "opt_maxmem.h" 49#include "opt_msgbuf.h" 50#include "opt_npx.h" 51#include "opt_perfmon.h" 52#include "opt_kstack_pages.h" 53 54#include <sys/param.h> 55#include <sys/systm.h> 56#include <sys/sysproto.h> 57#include <sys/signalvar.h> 58#include <sys/imgact.h> 59#include <sys/kernel.h> 60#include <sys/ktr.h> 61#include <sys/linker.h> 62#include <sys/lock.h> 63#include <sys/malloc.h> 64#include <sys/mutex.h> 65#include <sys/pcpu.h> 66#include <sys/proc.h> 67#include <sys/bio.h> 68#include <sys/buf.h> 69#include <sys/reboot.h> 70#include <sys/callout.h> 71#include <sys/msgbuf.h> 72#include <sys/sysent.h> 73#include <sys/sysctl.h> 74#include <sys/ucontext.h> 75#include <sys/vmmeter.h> 76#include <sys/bus.h> 77#include <sys/eventhandler.h> 78 79#include <vm/vm.h> 80#include <vm/vm_param.h> 81#include <vm/vm_kern.h> 82#include <vm/vm_object.h> 83#include <vm/vm_page.h> 84#include <vm/vm_map.h> 85#include <vm/vm_pager.h> 86#include <vm/vm_extern.h> 87 88#include <sys/user.h> 89#include <sys/exec.h> 90#include <sys/cons.h> 91 92#include <ddb/ddb.h> 93 94#include <net/netisr.h> 95 96#include <machine/cpu.h> 97#include <machine/cputypes.h> 98#include <machine/reg.h> 99#include <machine/clock.h> 100#include <machine/specialreg.h> 101#include <machine/bootinfo.h> 102#include <machine/md_var.h> 103#include <machine/pc/bios.h> 104#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 105#include <machine/proc.h> 106#ifdef PERFMON 107#include <machine/perfmon.h> 108#endif 109#ifdef SMP 110#include <machine/privatespace.h> 111#include <machine/smp.h> 112#endif 113 114#include <i386/isa/icu.h> 115#include <i386/isa/intr_machdep.h> 116#include <isa/rtc.h> 117#include <machine/vm86.h> 118#include <sys/ptrace.h> 119#include <machine/sigframe.h> 120 121extern void init386(int first); 122extern void dblfault_handler(void); 123 124extern void printcpuinfo(void); /* XXX header file */ 125extern void earlysetcpuclass(void); /* same header file */ 126extern void finishidentcpu(void); 127extern void panicifcpuunsupported(void); 128extern void initializecpu(void); 129 130#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 131#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 132 133#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) 134#define CPU_ENABLE_SSE 135#endif 136#if defined(CPU_DISABLE_SSE) 137#undef CPU_ENABLE_SSE 138#endif 139 140static void cpu_startup(void *); 141static void fpstate_drop(struct thread *td); 142static void get_fpcontext(struct thread *td, mcontext_t *mcp); 143static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 144#ifdef CPU_ENABLE_SSE 145static void set_fpregs_xmm(struct save87 *, struct savexmm *); 146static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 147#endif /* CPU_ENABLE_SSE */ 148SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 149 150int _udatasel, _ucodesel; 151u_int atdevbase; 152 153#if defined(SWTCH_OPTIM_STATS) 154extern int swtch_optim_stats; 155SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats, 156 CTLFLAG_RD, &swtch_optim_stats, 0, ""); 157SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count, 158 CTLFLAG_RD, &tlb_flush_count, 0, ""); 159#endif 160 161long physmem = 0; 162int cold = 1; 163 164#ifdef COMPAT_43 165static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code); 166#endif 167 168static int 169sysctl_hw_physmem(SYSCTL_HANDLER_ARGS) 170{ 171 u_long val; 172 173 val = ctob(physmem); 174 return (sysctl_handle_long(oidp, &val, 0, req)); 175} 176 177SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG | CTLFLAG_RD, 178 0, 0, sysctl_hw_physmem, "LU", ""); 179 180static int 181sysctl_hw_usermem(SYSCTL_HANDLER_ARGS) 182{ 183 u_long val; 184 185 val = ctob(physmem - cnt.v_wire_count); 186 return (sysctl_handle_long(oidp, &val, 0, req)); 187} 188 189SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_ULONG | CTLFLAG_RD, 190 0, 0, sysctl_hw_usermem, "LU", ""); 191 192static int 193sysctl_hw_availpages(SYSCTL_HANDLER_ARGS) 194{ 195 u_long val; 196 197 val = i386_btop(avail_end - avail_start); 198 return (sysctl_handle_long(oidp, &val, 0, req)); 199} 200 201SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_ULONG | CTLFLAG_RD, 202 0, 0, sysctl_hw_availpages, "LU", ""); 203 204long Maxmem = 0; 205 206vm_offset_t phys_avail[10]; 207 208/* must be 2 less so 0 0 can signal end of chunks */ 209#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 210 211struct kva_md_info kmi; 212 213static struct trapframe proc0_tf; 214#ifndef SMP 215static struct pcpu __pcpu; 216#endif 217 218struct mtx icu_lock; 219 220static void 221cpu_startup(dummy) 222 void *dummy; 223{ 224 /* 225 * Good {morning,afternoon,evening,night}. 226 */ 227 earlysetcpuclass(); 228 startrtclock(); 229 printcpuinfo(); 230 panicifcpuunsupported(); 231#ifdef PERFMON 232 perfmon_init(); 233#endif 234 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), 235 ptoa(Maxmem) / 1024); 236 /* 237 * Display any holes after the first chunk of extended memory. 238 */ 239 if (bootverbose) { 240 int indx; 241 242 printf("Physical memory chunk(s):\n"); 243 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 244 unsigned int size1; 245 246 size1 = phys_avail[indx + 1] - phys_avail[indx]; 247 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n", 248 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 249 size1 / PAGE_SIZE); 250 } 251 } 252 253 vm_ksubmap_init(&kmi); 254 255 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count), 256 ptoa(cnt.v_free_count) / 1024); 257 258 /* 259 * Set up buffers, so they can be used to read disk labels. 260 */ 261 bufinit(); 262 vm_pager_bufferinit(); 263 264#ifndef SMP 265 /* For SMP, we delay the cpu_setregs() until after SMP startup. */ 266 cpu_setregs(); 267#endif 268} 269 270/* 271 * Send an interrupt to process. 272 * 273 * Stack is set up to allow sigcode stored 274 * at top to call routine, followed by kcall 275 * to sigreturn routine below. After sigreturn 276 * resets the signal mask, the stack, and the 277 * frame pointer, it returns to the user 278 * specified pc, psl. 279 */ 280#ifdef COMPAT_43 281static void 282osendsig(catcher, sig, mask, code) 283 sig_t catcher; 284 int sig; 285 sigset_t *mask; 286 u_long code; 287{ 288 struct osigframe sf; 289 struct osigframe *fp; 290 struct proc *p; 291 struct thread *td; 292 struct sigacts *psp; 293 struct trapframe *regs; 294 int oonstack; 295 296 td = curthread; 297 p = td->td_proc; 298 PROC_LOCK_ASSERT(p, MA_OWNED); 299 psp = p->p_sigacts; 300 regs = td->td_frame; 301 oonstack = sigonstack(regs->tf_esp); 302 303 /* Allocate space for the signal handler context. */ 304 if ((p->p_flag & P_ALTSTACK) && !oonstack && 305 SIGISMEMBER(psp->ps_sigonstack, sig)) { 306 fp = (struct osigframe *)(p->p_sigstk.ss_sp + 307 p->p_sigstk.ss_size - sizeof(struct osigframe)); 308#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 309 p->p_sigstk.ss_flags |= SS_ONSTACK; 310#endif 311 } else 312 fp = (struct osigframe *)regs->tf_esp - 1; 313 PROC_UNLOCK(p); 314 315 /* Translate the signal if appropriate. */ 316 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 317 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 318 319 /* Build the argument list for the signal handler. */ 320 sf.sf_signum = sig; 321 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 322 PROC_LOCK(p); 323 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 324 /* Signal handler installed with SA_SIGINFO. */ 325 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 326 sf.sf_siginfo.si_signo = sig; 327 sf.sf_siginfo.si_code = code; 328 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 329 } else { 330 /* Old FreeBSD-style arguments. */ 331 sf.sf_arg2 = code; 332 sf.sf_addr = regs->tf_err; 333 sf.sf_ahu.sf_handler = catcher; 334 } 335 PROC_UNLOCK(p); 336 337 /* Save most if not all of trap frame. */ 338 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 339 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 340 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 341 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 342 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 343 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 344 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 345 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 346 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 347 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 348 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 349 sf.sf_siginfo.si_sc.sc_gs = rgs(); 350 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 351 352 /* Build the signal context to be used by osigreturn(). */ 353 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 354 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 355 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 356 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 357 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 358 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 359 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 360 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 361 362 /* 363 * If we're a vm86 process, we want to save the segment registers. 364 * We also change eflags to be our emulated eflags, not the actual 365 * eflags. 366 */ 367 if (regs->tf_eflags & PSL_VM) { 368 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 369 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 370 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 371 372 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 373 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 374 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 375 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 376 377 if (vm86->vm86_has_vme == 0) 378 sf.sf_siginfo.si_sc.sc_ps = 379 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 380 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 381 382 /* See sendsig() for comments. */ 383 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 384 } 385 386 /* 387 * Copy the sigframe out to the user's stack. 388 */ 389 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 390#ifdef DEBUG 391 printf("process %ld has trashed its stack\n", (long)p->p_pid); 392#endif 393 PROC_LOCK(p); 394 sigexit(td, SIGILL); 395 } 396 397 regs->tf_esp = (int)fp; 398 regs->tf_eip = PS_STRINGS - szosigcode; 399 regs->tf_eflags &= ~PSL_T; 400 regs->tf_cs = _ucodesel; 401 regs->tf_ds = _udatasel; 402 regs->tf_es = _udatasel; 403 regs->tf_fs = _udatasel; 404 load_gs(_udatasel); 405 regs->tf_ss = _udatasel; 406 PROC_LOCK(p); 407} 408#endif /* COMPAT_43 */ 409 410void 411sendsig(catcher, sig, mask, code) 412 sig_t catcher; 413 int sig; 414 sigset_t *mask; 415 u_long code; 416{ 417 struct sigframe sf; 418 struct proc *p; 419 struct thread *td; 420 struct sigacts *psp; 421 struct trapframe *regs; 422 struct sigframe *sfp; 423 int oonstack; 424 425 td = curthread; 426 p = td->td_proc; 427 PROC_LOCK_ASSERT(p, MA_OWNED); 428 psp = p->p_sigacts; 429#ifdef COMPAT_43 430 if (SIGISMEMBER(psp->ps_osigset, sig)) { 431 osendsig(catcher, sig, mask, code); 432 return; 433 } 434#endif 435 regs = td->td_frame; 436 oonstack = sigonstack(regs->tf_esp); 437 438 /* Save user context. */ 439 bzero(&sf, sizeof(sf)); 440 sf.sf_uc.uc_sigmask = *mask; 441 sf.sf_uc.uc_stack = p->p_sigstk; 442 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 443 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 444 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 445 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 446 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 447 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 448 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 449 fpstate_drop(td); 450 451 /* Allocate space for the signal handler context. */ 452 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 453 SIGISMEMBER(psp->ps_sigonstack, sig)) { 454 sfp = (struct sigframe *)(p->p_sigstk.ss_sp + 455 p->p_sigstk.ss_size - sizeof(struct sigframe)); 456#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 457 p->p_sigstk.ss_flags |= SS_ONSTACK; 458#endif 459 } else 460 sfp = (struct sigframe *)regs->tf_esp - 1; 461 PROC_UNLOCK(p); 462 463 /* Translate the signal if appropriate. */ 464 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 465 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 466 467 /* Build the argument list for the signal handler. */ 468 sf.sf_signum = sig; 469 sf.sf_ucontext = (register_t)&sfp->sf_uc; 470 PROC_LOCK(p); 471 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { 472 /* Signal handler installed with SA_SIGINFO. */ 473 sf.sf_siginfo = (register_t)&sfp->sf_si; 474 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 475 476 /* Fill in POSIX parts */ 477 sf.sf_si.si_signo = sig; 478 sf.sf_si.si_code = code; 479 sf.sf_si.si_addr = (void *)regs->tf_err; 480 sf.sf_si.si_pid = p->p_pid; 481 sf.sf_si.si_uid = p->p_ucred->cr_uid; 482 } else { 483 /* Old FreeBSD-style arguments. */ 484 sf.sf_siginfo = code; 485 sf.sf_addr = regs->tf_err; 486 sf.sf_ahu.sf_handler = catcher; 487 } 488 PROC_UNLOCK(p); 489 490 /* 491 * If we're a vm86 process, we want to save the segment registers. 492 * We also change eflags to be our emulated eflags, not the actual 493 * eflags. 494 */ 495 if (regs->tf_eflags & PSL_VM) { 496 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 497 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 498 499 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 500 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 501 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 502 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 503 504 if (vm86->vm86_has_vme == 0) 505 sf.sf_uc.uc_mcontext.mc_eflags = 506 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 507 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 508 509 /* 510 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 511 * syscalls made by the signal handler. This just avoids 512 * wasting time for our lazy fixup of such faults. PSL_NT 513 * does nothing in vm86 mode, but vm86 programs can set it 514 * almost legitimately in probes for old cpu types. 515 */ 516 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 517 } 518 519 /* 520 * Copy the sigframe out to the user's stack. 521 */ 522 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 523#ifdef DEBUG 524 printf("process %ld has trashed its stack\n", (long)p->p_pid); 525#endif 526 PROC_LOCK(p); 527 sigexit(td, SIGILL); 528 } 529 530 regs->tf_esp = (int)sfp; 531 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 532 regs->tf_eflags &= ~PSL_T; 533 regs->tf_cs = _ucodesel; 534 regs->tf_ds = _udatasel; 535 regs->tf_es = _udatasel; 536 regs->tf_fs = _udatasel; 537 regs->tf_ss = _udatasel; 538 PROC_LOCK(p); 539} 540 541/* 542 * System call to cleanup state after a signal 543 * has been taken. Reset signal mask and 544 * stack state from context left by sendsig (above). 545 * Return to previous pc and psl as specified by 546 * context left by sendsig. Check carefully to 547 * make sure that the user has not modified the 548 * state to gain improper privileges. 549 * 550 * MPSAFE 551 */ 552int 553osigreturn(td, uap) 554 struct thread *td; 555 struct osigreturn_args /* { 556 struct osigcontext *sigcntxp; 557 } */ *uap; 558{ 559#ifdef COMPAT_43 560 struct osigcontext sc; 561 struct trapframe *regs; 562 struct osigcontext *scp; 563 struct proc *p = td->td_proc; 564 int eflags, error; 565 566 regs = td->td_frame; 567 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 568 if (error != 0) 569 return (error); 570 scp = ≻ 571 eflags = scp->sc_ps; 572 if (eflags & PSL_VM) { 573 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 574 struct vm86_kernel *vm86; 575 576 /* 577 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 578 * set up the vm86 area, and we can't enter vm86 mode. 579 */ 580 if (td->td_pcb->pcb_ext == 0) 581 return (EINVAL); 582 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 583 if (vm86->vm86_inited == 0) 584 return (EINVAL); 585 586 /* Go back to user mode if both flags are set. */ 587 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 588 trapsignal(p, SIGBUS, 0); 589 590 if (vm86->vm86_has_vme) { 591 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 592 (eflags & VME_USERCHANGE) | PSL_VM; 593 } else { 594 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 595 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 596 (eflags & VM_USERCHANGE) | PSL_VM; 597 } 598 tf->tf_vm86_ds = scp->sc_ds; 599 tf->tf_vm86_es = scp->sc_es; 600 tf->tf_vm86_fs = scp->sc_fs; 601 tf->tf_vm86_gs = scp->sc_gs; 602 tf->tf_ds = _udatasel; 603 tf->tf_es = _udatasel; 604 tf->tf_fs = _udatasel; 605 } else { 606 /* 607 * Don't allow users to change privileged or reserved flags. 608 */ 609 /* 610 * XXX do allow users to change the privileged flag PSL_RF. 611 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 612 * should sometimes set it there too. tf_eflags is kept in 613 * the signal context during signal handling and there is no 614 * other place to remember it, so the PSL_RF bit may be 615 * corrupted by the signal handler without us knowing. 616 * Corruption of the PSL_RF bit at worst causes one more or 617 * one less debugger trap, so allowing it is fairly harmless. 618 */ 619 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 620 return (EINVAL); 621 } 622 623 /* 624 * Don't allow users to load a valid privileged %cs. Let the 625 * hardware check for invalid selectors, excess privilege in 626 * other selectors, invalid %eip's and invalid %esp's. 627 */ 628 if (!CS_SECURE(scp->sc_cs)) { 629 trapsignal(p, SIGBUS, T_PROTFLT); 630 return (EINVAL); 631 } 632 regs->tf_ds = scp->sc_ds; 633 regs->tf_es = scp->sc_es; 634 regs->tf_fs = scp->sc_fs; 635 } 636 637 /* Restore remaining registers. */ 638 regs->tf_eax = scp->sc_eax; 639 regs->tf_ebx = scp->sc_ebx; 640 regs->tf_ecx = scp->sc_ecx; 641 regs->tf_edx = scp->sc_edx; 642 regs->tf_esi = scp->sc_esi; 643 regs->tf_edi = scp->sc_edi; 644 regs->tf_cs = scp->sc_cs; 645 regs->tf_ss = scp->sc_ss; 646 regs->tf_isp = scp->sc_isp; 647 regs->tf_ebp = scp->sc_fp; 648 regs->tf_esp = scp->sc_sp; 649 regs->tf_eip = scp->sc_pc; 650 regs->tf_eflags = eflags; 651 652 PROC_LOCK(p); 653#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 654 if (scp->sc_onstack & 1) 655 p->p_sigstk.ss_flags |= SS_ONSTACK; 656 else 657 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 658#endif 659 SIGSETOLD(p->p_sigmask, scp->sc_mask); 660 SIG_CANTMASK(p->p_sigmask); 661 signotify(p); 662 PROC_UNLOCK(p); 663 return (EJUSTRETURN); 664#else /* !COMPAT_43 */ 665 return (ENOSYS); 666#endif /* COMPAT_43 */ 667} 668 669/* 670 * MPSAFE 671 */ 672int 673sigreturn(td, uap) 674 struct thread *td; 675 struct sigreturn_args /* { 676 const __ucontext *sigcntxp; 677 } */ *uap; 678{ 679 ucontext_t uc; 680 struct proc *p = td->td_proc; 681 struct trapframe *regs; 682 const ucontext_t *ucp; 683 int cs, eflags, error, ret; 684 685 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 686 if (error != 0) 687 return (error); 688 ucp = &uc; 689 regs = td->td_frame; 690 eflags = ucp->uc_mcontext.mc_eflags; 691 if (eflags & PSL_VM) { 692 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 693 struct vm86_kernel *vm86; 694 695 /* 696 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 697 * set up the vm86 area, and we can't enter vm86 mode. 698 */ 699 if (td->td_pcb->pcb_ext == 0) 700 return (EINVAL); 701 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 702 if (vm86->vm86_inited == 0) 703 return (EINVAL); 704 705 /* Go back to user mode if both flags are set. */ 706 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 707 trapsignal(p, SIGBUS, 0); 708 709 if (vm86->vm86_has_vme) { 710 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 711 (eflags & VME_USERCHANGE) | PSL_VM; 712 } else { 713 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 714 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 715 (eflags & VM_USERCHANGE) | PSL_VM; 716 } 717 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 718 tf->tf_eflags = eflags; 719 tf->tf_vm86_ds = tf->tf_ds; 720 tf->tf_vm86_es = tf->tf_es; 721 tf->tf_vm86_fs = tf->tf_fs; 722 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 723 tf->tf_ds = _udatasel; 724 tf->tf_es = _udatasel; 725 tf->tf_fs = _udatasel; 726 } else { 727 /* 728 * Don't allow users to change privileged or reserved flags. 729 */ 730 /* 731 * XXX do allow users to change the privileged flag PSL_RF. 732 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 733 * should sometimes set it there too. tf_eflags is kept in 734 * the signal context during signal handling and there is no 735 * other place to remember it, so the PSL_RF bit may be 736 * corrupted by the signal handler without us knowing. 737 * Corruption of the PSL_RF bit at worst causes one more or 738 * one less debugger trap, so allowing it is fairly harmless. 739 */ 740 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 741 printf("sigreturn: eflags = 0x%x\n", eflags); 742 return (EINVAL); 743 } 744 745 /* 746 * Don't allow users to load a valid privileged %cs. Let the 747 * hardware check for invalid selectors, excess privilege in 748 * other selectors, invalid %eip's and invalid %esp's. 749 */ 750 cs = ucp->uc_mcontext.mc_cs; 751 if (!CS_SECURE(cs)) { 752 printf("sigreturn: cs = 0x%x\n", cs); 753 trapsignal(p, SIGBUS, T_PROTFLT); 754 return (EINVAL); 755 } 756 757 ret = set_fpcontext(td, &ucp->uc_mcontext); 758 if (ret != 0) 759 return (ret); 760 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 761 } 762 763 PROC_LOCK(p); 764#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 765 if (ucp->uc_mcontext.mc_onstack & 1) 766 p->p_sigstk.ss_flags |= SS_ONSTACK; 767 else 768 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 769#endif 770 771 p->p_sigmask = ucp->uc_sigmask; 772 SIG_CANTMASK(p->p_sigmask); 773 signotify(p); 774 PROC_UNLOCK(p); 775 return (EJUSTRETURN); 776} 777 778/* 779 * Machine dependent boot() routine 780 * 781 * I haven't seen anything to put here yet 782 * Possibly some stuff might be grafted back here from boot() 783 */ 784void 785cpu_boot(int howto) 786{ 787} 788 789/* 790 * Shutdown the CPU as much as possible 791 */ 792void 793cpu_halt(void) 794{ 795 for (;;) 796 __asm__ ("hlt"); 797} 798 799/* 800 * Hook to idle the CPU when possible. In the SMP case we default to 801 * off because a halted cpu will not currently pick up a new thread in the 802 * run queue until the next timer tick. If turned on this will result in 803 * approximately a 4.2% loss in real time performance in buildworld tests 804 * (but improves user and sys times oddly enough), and saves approximately 805 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 806 * 807 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 808 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 809 * Then we can have our cake and eat it too. 810 */ 811#ifdef SMP 812static int cpu_idle_hlt = 0; 813#else 814static int cpu_idle_hlt = 1; 815#endif 816SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 817 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 818 819/* 820 * Note that we have to be careful here to avoid a race between checking 821 * kserunnable() and actually halting. If we don't do this, we may waste 822 * the time between calling hlt and the next interrupt even though there 823 * is a runnable process. 824 */ 825void 826cpu_idle(void) 827{ 828 if (cpu_idle_hlt) { 829 disable_intr(); 830 if (kserunnable()) { 831 enable_intr(); 832 } else { 833 /* 834 * we must absolutely guarentee that hlt is the 835 * absolute next instruction after sti or we 836 * introduce a timing window. 837 */ 838 __asm __volatile("sti; hlt"); 839 } 840 } 841} 842 843/* 844 * Clear registers on exec 845 */ 846void 847exec_setregs(td, entry, stack, ps_strings) 848 struct thread *td; 849 u_long entry; 850 u_long stack; 851 u_long ps_strings; 852{ 853 struct trapframe *regs = td->td_frame; 854 struct pcb *pcb = td->td_pcb; 855 856 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 857 pcb->pcb_gs = _udatasel; 858 load_gs(_udatasel); 859 860 if (td->td_proc->p_md.md_ldt) 861 user_ldt_free(td); 862 863 bzero((char *)regs, sizeof(struct trapframe)); 864 regs->tf_eip = entry; 865 regs->tf_esp = stack; 866 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 867 regs->tf_ss = _udatasel; 868 regs->tf_ds = _udatasel; 869 regs->tf_es = _udatasel; 870 regs->tf_fs = _udatasel; 871 regs->tf_cs = _ucodesel; 872 873 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 874 regs->tf_ebx = ps_strings; 875 876 /* 877 * Reset the hardware debug registers if they were in use. 878 * They won't have any meaning for the newly exec'd process. 879 */ 880 if (pcb->pcb_flags & PCB_DBREGS) { 881 pcb->pcb_dr0 = 0; 882 pcb->pcb_dr1 = 0; 883 pcb->pcb_dr2 = 0; 884 pcb->pcb_dr3 = 0; 885 pcb->pcb_dr6 = 0; 886 pcb->pcb_dr7 = 0; 887 if (pcb == PCPU_GET(curpcb)) { 888 /* 889 * Clear the debug registers on the running 890 * CPU, otherwise they will end up affecting 891 * the next process we switch to. 892 */ 893 reset_dbregs(); 894 } 895 pcb->pcb_flags &= ~PCB_DBREGS; 896 } 897 898 /* 899 * Initialize the math emulator (if any) for the current process. 900 * Actually, just clear the bit that says that the emulator has 901 * been initialized. Initialization is delayed until the process 902 * traps to the emulator (if it is done at all) mainly because 903 * emulators don't provide an entry point for initialization. 904 */ 905 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 906 907 /* 908 * Arrange to trap the next npx or `fwait' instruction (see npx.c 909 * for why fwait must be trapped at least if there is an npx or an 910 * emulator). This is mainly to handle the case where npx0 is not 911 * configured, since the npx routines normally set up the trap 912 * otherwise. It should be done only at boot time, but doing it 913 * here allows modifying `npx_exists' for testing the emulator on 914 * systems with an npx. 915 */ 916 load_cr0(rcr0() | CR0_MP | CR0_TS); 917 918 /* Initialize the npx (if any) for the current process. */ 919 /* 920 * XXX the above load_cr0() also initializes it and is a layering 921 * violation if NPX is configured. It drops the npx partially 922 * and this would be fatal if we were interrupted now, and decided 923 * to force the state to the pcb, and checked the invariant 924 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 925 * ALL of this can happen except the check. The check used to 926 * happen and be fatal later when we didn't complete the drop 927 * before returning to user mode. This should be fixed properly 928 * soon. 929 */ 930 fpstate_drop(td); 931 932 /* 933 * XXX - Linux emulator 934 * Make sure sure edx is 0x0 on entry. Linux binaries depend 935 * on it. 936 */ 937 td->td_retval[1] = 0; 938} 939 940void 941cpu_setregs(void) 942{ 943 unsigned int cr0; 944 945 cr0 = rcr0(); 946#ifdef SMP 947 cr0 |= CR0_NE; /* Done by npxinit() */ 948#endif 949 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 950#ifndef I386_CPU 951 cr0 |= CR0_WP | CR0_AM; 952#endif 953 load_cr0(cr0); 954 load_gs(_udatasel); 955} 956 957static int 958sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 959{ 960 int error; 961 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 962 req); 963 if (!error && req->newptr) 964 resettodr(); 965 return (error); 966} 967 968SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 969 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 970 971SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 972 CTLFLAG_RW, &disable_rtc_set, 0, ""); 973 974SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 975 CTLFLAG_RD, &bootinfo, bootinfo, ""); 976 977SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 978 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 979 980u_long bootdev; /* not a dev_t - encoding is different */ 981SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 982 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)"); 983 984/* 985 * Initialize 386 and configure to run kernel 986 */ 987 988/* 989 * Initialize segments & interrupt table 990 */ 991 992int _default_ldt; 993union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 994static struct gate_descriptor idt0[NIDT]; 995struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 996union descriptor ldt[NLDT]; /* local descriptor table */ 997#ifdef SMP 998/* table descriptors - used to load tables by microp */ 999struct region_descriptor r_gdt, r_idt; 1000#endif 1001 1002int private_tss; /* flag indicating private tss */ 1003 1004#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1005extern int has_f00f_bug; 1006#endif 1007 1008static struct i386tss dblfault_tss; 1009static char dblfault_stack[PAGE_SIZE]; 1010 1011extern struct user *proc0uarea; 1012extern vm_offset_t proc0kstack; 1013 1014 1015/* software prototypes -- in more palatable form */ 1016struct soft_segment_descriptor gdt_segs[] = { 1017/* GNULL_SEL 0 Null Descriptor */ 1018{ 0x0, /* segment base address */ 1019 0x0, /* length */ 1020 0, /* segment type */ 1021 0, /* segment descriptor priority level */ 1022 0, /* segment descriptor present */ 1023 0, 0, 1024 0, /* default 32 vs 16 bit size */ 1025 0 /* limit granularity (byte/page units)*/ }, 1026/* GCODE_SEL 1 Code Descriptor for kernel */ 1027{ 0x0, /* segment base address */ 1028 0xfffff, /* length - all address space */ 1029 SDT_MEMERA, /* segment type */ 1030 0, /* segment descriptor priority level */ 1031 1, /* segment descriptor present */ 1032 0, 0, 1033 1, /* default 32 vs 16 bit size */ 1034 1 /* limit granularity (byte/page units)*/ }, 1035/* GDATA_SEL 2 Data Descriptor for kernel */ 1036{ 0x0, /* segment base address */ 1037 0xfffff, /* length - all address space */ 1038 SDT_MEMRWA, /* segment type */ 1039 0, /* segment descriptor priority level */ 1040 1, /* segment descriptor present */ 1041 0, 0, 1042 1, /* default 32 vs 16 bit size */ 1043 1 /* limit granularity (byte/page units)*/ }, 1044/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 1045{ 0x0, /* segment base address */ 1046 0xfffff, /* length - all address space */ 1047 SDT_MEMRWA, /* segment type */ 1048 0, /* segment descriptor priority level */ 1049 1, /* segment descriptor present */ 1050 0, 0, 1051 1, /* default 32 vs 16 bit size */ 1052 1 /* limit granularity (byte/page units)*/ }, 1053/* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 1054{ 1055 0x0, /* segment base address */ 1056 sizeof(struct i386tss)-1,/* length - all address space */ 1057 SDT_SYS386TSS, /* segment type */ 1058 0, /* segment descriptor priority level */ 1059 1, /* segment descriptor present */ 1060 0, 0, 1061 0, /* unused - default 32 vs 16 bit size */ 1062 0 /* limit granularity (byte/page units)*/ }, 1063/* GLDT_SEL 5 LDT Descriptor */ 1064{ (int) ldt, /* segment base address */ 1065 sizeof(ldt)-1, /* length - all address space */ 1066 SDT_SYSLDT, /* segment type */ 1067 SEL_UPL, /* segment descriptor priority level */ 1068 1, /* segment descriptor present */ 1069 0, 0, 1070 0, /* unused - default 32 vs 16 bit size */ 1071 0 /* limit granularity (byte/page units)*/ }, 1072/* GUSERLDT_SEL 6 User LDT Descriptor per process */ 1073{ (int) ldt, /* segment base address */ 1074 (512 * sizeof(union descriptor)-1), /* length */ 1075 SDT_SYSLDT, /* segment type */ 1076 0, /* segment descriptor priority level */ 1077 1, /* segment descriptor present */ 1078 0, 0, 1079 0, /* unused - default 32 vs 16 bit size */ 1080 0 /* limit granularity (byte/page units)*/ }, 1081/* GTGATE_SEL 7 Null Descriptor - Placeholder */ 1082{ 0x0, /* segment base address */ 1083 0x0, /* length - all address space */ 1084 0, /* segment type */ 1085 0, /* segment descriptor priority level */ 1086 0, /* segment descriptor present */ 1087 0, 0, 1088 0, /* default 32 vs 16 bit size */ 1089 0 /* limit granularity (byte/page units)*/ }, 1090/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1091{ 0x400, /* segment base address */ 1092 0xfffff, /* length */ 1093 SDT_MEMRWA, /* segment type */ 1094 0, /* segment descriptor priority level */ 1095 1, /* segment descriptor present */ 1096 0, 0, 1097 1, /* default 32 vs 16 bit size */ 1098 1 /* limit granularity (byte/page units)*/ }, 1099/* GPANIC_SEL 9 Panic Tss Descriptor */ 1100{ (int) &dblfault_tss, /* segment base address */ 1101 sizeof(struct i386tss)-1,/* length - all address space */ 1102 SDT_SYS386TSS, /* segment type */ 1103 0, /* segment descriptor priority level */ 1104 1, /* segment descriptor present */ 1105 0, 0, 1106 0, /* unused - default 32 vs 16 bit size */ 1107 0 /* limit granularity (byte/page units)*/ }, 1108/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */ 1109{ 0, /* segment base address (overwritten) */ 1110 0xfffff, /* length */ 1111 SDT_MEMERA, /* segment type */ 1112 0, /* segment descriptor priority level */ 1113 1, /* segment descriptor present */ 1114 0, 0, 1115 0, /* default 32 vs 16 bit size */ 1116 1 /* limit granularity (byte/page units)*/ }, 1117/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */ 1118{ 0, /* segment base address (overwritten) */ 1119 0xfffff, /* length */ 1120 SDT_MEMERA, /* segment type */ 1121 0, /* segment descriptor priority level */ 1122 1, /* segment descriptor present */ 1123 0, 0, 1124 0, /* default 32 vs 16 bit size */ 1125 1 /* limit granularity (byte/page units)*/ }, 1126/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */ 1127{ 0, /* segment base address (overwritten) */ 1128 0xfffff, /* length */ 1129 SDT_MEMRWA, /* segment type */ 1130 0, /* segment descriptor priority level */ 1131 1, /* segment descriptor present */ 1132 0, 0, 1133 1, /* default 32 vs 16 bit size */ 1134 1 /* limit granularity (byte/page units)*/ }, 1135/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */ 1136{ 0, /* segment base address (overwritten) */ 1137 0xfffff, /* length */ 1138 SDT_MEMRWA, /* segment type */ 1139 0, /* segment descriptor priority level */ 1140 1, /* segment descriptor present */ 1141 0, 0, 1142 0, /* default 32 vs 16 bit size */ 1143 1 /* limit granularity (byte/page units)*/ }, 1144/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */ 1145{ 0, /* segment base address (overwritten) */ 1146 0xfffff, /* length */ 1147 SDT_MEMRWA, /* segment type */ 1148 0, /* segment descriptor priority level */ 1149 1, /* segment descriptor present */ 1150 0, 0, 1151 0, /* default 32 vs 16 bit size */ 1152 1 /* limit granularity (byte/page units)*/ }, 1153}; 1154 1155static struct soft_segment_descriptor ldt_segs[] = { 1156 /* Null Descriptor - overwritten by call gate */ 1157{ 0x0, /* segment base address */ 1158 0x0, /* length - all address space */ 1159 0, /* segment type */ 1160 0, /* segment descriptor priority level */ 1161 0, /* segment descriptor present */ 1162 0, 0, 1163 0, /* default 32 vs 16 bit size */ 1164 0 /* limit granularity (byte/page units)*/ }, 1165 /* Null Descriptor - overwritten by call gate */ 1166{ 0x0, /* segment base address */ 1167 0x0, /* length - all address space */ 1168 0, /* segment type */ 1169 0, /* segment descriptor priority level */ 1170 0, /* segment descriptor present */ 1171 0, 0, 1172 0, /* default 32 vs 16 bit size */ 1173 0 /* limit granularity (byte/page units)*/ }, 1174 /* Null Descriptor - overwritten by call gate */ 1175{ 0x0, /* segment base address */ 1176 0x0, /* length - all address space */ 1177 0, /* segment type */ 1178 0, /* segment descriptor priority level */ 1179 0, /* segment descriptor present */ 1180 0, 0, 1181 0, /* default 32 vs 16 bit size */ 1182 0 /* limit granularity (byte/page units)*/ }, 1183 /* Code Descriptor for user */ 1184{ 0x0, /* segment base address */ 1185 0xfffff, /* length - all address space */ 1186 SDT_MEMERA, /* segment type */ 1187 SEL_UPL, /* segment descriptor priority level */ 1188 1, /* segment descriptor present */ 1189 0, 0, 1190 1, /* default 32 vs 16 bit size */ 1191 1 /* limit granularity (byte/page units)*/ }, 1192 /* Null Descriptor - overwritten by call gate */ 1193{ 0x0, /* segment base address */ 1194 0x0, /* length - all address space */ 1195 0, /* segment type */ 1196 0, /* segment descriptor priority level */ 1197 0, /* segment descriptor present */ 1198 0, 0, 1199 0, /* default 32 vs 16 bit size */ 1200 0 /* limit granularity (byte/page units)*/ }, 1201 /* Data Descriptor for user */ 1202{ 0x0, /* segment base address */ 1203 0xfffff, /* length - all address space */ 1204 SDT_MEMRWA, /* segment type */ 1205 SEL_UPL, /* segment descriptor priority level */ 1206 1, /* segment descriptor present */ 1207 0, 0, 1208 1, /* default 32 vs 16 bit size */ 1209 1 /* limit granularity (byte/page units)*/ }, 1210}; 1211 1212void 1213setidt(idx, func, typ, dpl, selec) 1214 int idx; 1215 inthand_t *func; 1216 int typ; 1217 int dpl; 1218 int selec; 1219{ 1220 struct gate_descriptor *ip; 1221 1222 ip = idt + idx; 1223 ip->gd_looffset = (int)func; 1224 ip->gd_selector = selec; 1225 ip->gd_stkcpy = 0; 1226 ip->gd_xx = 0; 1227 ip->gd_type = typ; 1228 ip->gd_dpl = dpl; 1229 ip->gd_p = 1; 1230 ip->gd_hioffset = ((int)func)>>16 ; 1231} 1232 1233#define IDTVEC(name) __CONCAT(X,name) 1234 1235extern inthand_t 1236 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1237 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1238 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1239 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1240 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1241 1242void 1243sdtossd(sd, ssd) 1244 struct segment_descriptor *sd; 1245 struct soft_segment_descriptor *ssd; 1246{ 1247 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1248 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1249 ssd->ssd_type = sd->sd_type; 1250 ssd->ssd_dpl = sd->sd_dpl; 1251 ssd->ssd_p = sd->sd_p; 1252 ssd->ssd_def32 = sd->sd_def32; 1253 ssd->ssd_gran = sd->sd_gran; 1254} 1255 1256#define PHYSMAP_SIZE (2 * 8) 1257 1258/* 1259 * Populate the (physmap) array with base/bound pairs describing the 1260 * available physical memory in the system, then test this memory and 1261 * build the phys_avail array describing the actually-available memory. 1262 * 1263 * If we cannot accurately determine the physical memory map, then use 1264 * value from the 0xE801 call, and failing that, the RTC. 1265 * 1266 * Total memory size may be set by the kernel environment variable 1267 * hw.physmem or the compile-time define MAXMEM. 1268 */ 1269static void 1270getmemsize(int first) 1271{ 1272 int i, physmap_idx, pa_indx; 1273 u_int basemem, extmem; 1274 struct vm86frame vmf; 1275 struct vm86context vmc; 1276 vm_offset_t pa, physmap[PHYSMAP_SIZE]; 1277 pt_entry_t *pte; 1278 char *cp; 1279 struct bios_smap *smap; 1280 1281 bzero(&vmf, sizeof(struct vm86frame)); 1282 bzero(physmap, sizeof(physmap)); 1283 1284 /* 1285 * Perform "base memory" related probes & setup 1286 */ 1287 vm86_intcall(0x12, &vmf); 1288 basemem = vmf.vmf_ax; 1289 if (basemem > 640) { 1290 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1291 basemem); 1292 basemem = 640; 1293 } 1294 1295 /* 1296 * XXX if biosbasemem is now < 640, there is a `hole' 1297 * between the end of base memory and the start of 1298 * ISA memory. The hole may be empty or it may 1299 * contain BIOS code or data. Map it read/write so 1300 * that the BIOS can write to it. (Memory from 0 to 1301 * the physical end of the kernel is mapped read-only 1302 * to begin with and then parts of it are remapped. 1303 * The parts that aren't remapped form holes that 1304 * remain read-only and are unused by the kernel. 1305 * The base memory area is below the physical end of 1306 * the kernel and right now forms a read-only hole. 1307 * The part of it from PAGE_SIZE to 1308 * (trunc_page(biosbasemem * 1024) - 1) will be 1309 * remapped and used by the kernel later.) 1310 * 1311 * This code is similar to the code used in 1312 * pmap_mapdev, but since no memory needs to be 1313 * allocated we simply change the mapping. 1314 */ 1315 for (pa = trunc_page(basemem * 1024); 1316 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1317 pmap_kenter(KERNBASE + pa, pa); 1318 1319 /* 1320 * if basemem != 640, map pages r/w into vm86 page table so 1321 * that the bios can scribble on it. 1322 */ 1323 pte = (pt_entry_t *)vm86paddr; 1324 for (i = basemem / 4; i < 160; i++) 1325 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1326 1327 /* 1328 * map page 1 R/W into the kernel page table so we can use it 1329 * as a buffer. The kernel will unmap this page later. 1330 */ 1331 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1); 1332 1333 /* 1334 * get memory map with INT 15:E820 1335 */ 1336 vmc.npages = 0; 1337 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1338 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1339 1340 physmap_idx = 0; 1341 vmf.vmf_ebx = 0; 1342 do { 1343 vmf.vmf_eax = 0xE820; 1344 vmf.vmf_edx = SMAP_SIG; 1345 vmf.vmf_ecx = sizeof(struct bios_smap); 1346 i = vm86_datacall(0x15, &vmf, &vmc); 1347 if (i || vmf.vmf_eax != SMAP_SIG) 1348 break; 1349 if (boothowto & RB_VERBOSE) 1350 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n", 1351 smap->type, 1352 *(u_int32_t *)((char *)&smap->base + 4), 1353 (u_int32_t)smap->base, 1354 *(u_int32_t *)((char *)&smap->length + 4), 1355 (u_int32_t)smap->length); 1356 1357 if (smap->type != 0x01) 1358 goto next_run; 1359 1360 if (smap->length == 0) 1361 goto next_run; 1362 1363 if (smap->base >= 0xffffffff) { 1364 printf("%uK of memory above 4GB ignored\n", 1365 (u_int)(smap->length / 1024)); 1366 goto next_run; 1367 } 1368 1369 for (i = 0; i <= physmap_idx; i += 2) { 1370 if (smap->base < physmap[i + 1]) { 1371 if (boothowto & RB_VERBOSE) 1372 printf( 1373 "Overlapping or non-montonic memory region, ignoring second region\n"); 1374 goto next_run; 1375 } 1376 } 1377 1378 if (smap->base == physmap[physmap_idx + 1]) { 1379 physmap[physmap_idx + 1] += smap->length; 1380 goto next_run; 1381 } 1382 1383 physmap_idx += 2; 1384 if (physmap_idx == PHYSMAP_SIZE) { 1385 printf( 1386 "Too many segments in the physical address map, giving up\n"); 1387 break; 1388 } 1389 physmap[physmap_idx] = smap->base; 1390 physmap[physmap_idx + 1] = smap->base + smap->length; 1391next_run: ; 1392 } while (vmf.vmf_ebx != 0); 1393 1394 if (physmap[1] != 0) 1395 goto physmap_done; 1396 1397 /* 1398 * If we failed above, try memory map with INT 15:E801 1399 */ 1400 vmf.vmf_ax = 0xE801; 1401 if (vm86_intcall(0x15, &vmf) == 0) { 1402 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1403 } else { 1404#if 0 1405 vmf.vmf_ah = 0x88; 1406 vm86_intcall(0x15, &vmf); 1407 extmem = vmf.vmf_ax; 1408#else 1409 /* 1410 * Prefer the RTC value for extended memory. 1411 */ 1412 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1413#endif 1414 } 1415 1416 /* 1417 * Special hack for chipsets that still remap the 384k hole when 1418 * there's 16MB of memory - this really confuses people that 1419 * are trying to use bus mastering ISA controllers with the 1420 * "16MB limit"; they only have 16MB, but the remapping puts 1421 * them beyond the limit. 1422 * 1423 * If extended memory is between 15-16MB (16-17MB phys address range), 1424 * chop it to 15MB. 1425 */ 1426 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1427 extmem = 15 * 1024; 1428 1429 physmap[0] = 0; 1430 physmap[1] = basemem * 1024; 1431 physmap_idx = 2; 1432 physmap[physmap_idx] = 0x100000; 1433 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1434 1435physmap_done: 1436 /* 1437 * Now, physmap contains a map of physical memory. 1438 */ 1439 1440#ifdef SMP 1441 /* make hole for AP bootstrap code */ 1442 physmap[1] = mp_bootaddress(physmap[1] / 1024); 1443 1444 /* look for the MP hardware - needed for apic addresses */ 1445 i386_mp_probe(); 1446#endif 1447 1448 /* 1449 * Maxmem isn't the "maximum memory", it's one larger than the 1450 * highest page of the physical address space. It should be 1451 * called something like "Maxphyspage". We may adjust this 1452 * based on ``hw.physmem'' and the results of the memory test. 1453 */ 1454 Maxmem = atop(physmap[physmap_idx + 1]); 1455 1456#ifdef MAXMEM 1457 Maxmem = MAXMEM / 4; 1458#endif 1459 1460 /* 1461 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 1462 * for the appropriate modifiers. This overrides MAXMEM. 1463 */ 1464 if ((cp = getenv("hw.physmem")) != NULL) { 1465 u_int64_t AllowMem, sanity; 1466 char *ep; 1467 1468 sanity = AllowMem = strtouq(cp, &ep, 0); 1469 if ((ep != cp) && (*ep != 0)) { 1470 switch(*ep) { 1471 case 'g': 1472 case 'G': 1473 AllowMem <<= 10; 1474 case 'm': 1475 case 'M': 1476 AllowMem <<= 10; 1477 case 'k': 1478 case 'K': 1479 AllowMem <<= 10; 1480 break; 1481 default: 1482 AllowMem = sanity = 0; 1483 } 1484 if (AllowMem < sanity) 1485 AllowMem = 0; 1486 } 1487 if (AllowMem == 0) 1488 printf("Ignoring invalid memory size of '%s'\n", cp); 1489 else 1490 Maxmem = atop(AllowMem); 1491 freeenv(cp); 1492 } 1493 1494 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1495 (boothowto & RB_VERBOSE)) 1496 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1497 1498 /* 1499 * If Maxmem has been increased beyond what the system has detected, 1500 * extend the last memory segment to the new limit. 1501 */ 1502 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1503 physmap[physmap_idx + 1] = ptoa(Maxmem); 1504 1505 /* call pmap initialization to make new kernel address space */ 1506 pmap_bootstrap(first, 0); 1507 1508 /* 1509 * Size up each available chunk of physical memory. 1510 */ 1511 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1512 pa_indx = 0; 1513 phys_avail[pa_indx++] = physmap[0]; 1514 phys_avail[pa_indx] = physmap[0]; 1515 pte = CMAP1; 1516 1517 /* 1518 * physmap is in bytes, so when converting to page boundaries, 1519 * round up the start address and round down the end address. 1520 */ 1521 for (i = 0; i <= physmap_idx; i += 2) { 1522 vm_offset_t end; 1523 1524 end = ptoa(Maxmem); 1525 if (physmap[i + 1] < end) 1526 end = trunc_page(physmap[i + 1]); 1527 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1528 int tmp, page_bad; 1529 int *ptr = (int *)CADDR1; 1530 1531 /* 1532 * block out kernel memory as not available. 1533 */ 1534 if (pa >= 0x100000 && pa < first) 1535 continue; 1536 1537 page_bad = FALSE; 1538 1539 /* 1540 * map page into kernel: valid, read/write,non-cacheable 1541 */ 1542 *pte = pa | PG_V | PG_RW | PG_N; 1543 invltlb(); 1544 1545 tmp = *(int *)ptr; 1546 /* 1547 * Test for alternating 1's and 0's 1548 */ 1549 *(volatile int *)ptr = 0xaaaaaaaa; 1550 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1551 page_bad = TRUE; 1552 } 1553 /* 1554 * Test for alternating 0's and 1's 1555 */ 1556 *(volatile int *)ptr = 0x55555555; 1557 if (*(volatile int *)ptr != 0x55555555) { 1558 page_bad = TRUE; 1559 } 1560 /* 1561 * Test for all 1's 1562 */ 1563 *(volatile int *)ptr = 0xffffffff; 1564 if (*(volatile int *)ptr != 0xffffffff) { 1565 page_bad = TRUE; 1566 } 1567 /* 1568 * Test for all 0's 1569 */ 1570 *(volatile int *)ptr = 0x0; 1571 if (*(volatile int *)ptr != 0x0) { 1572 page_bad = TRUE; 1573 } 1574 /* 1575 * Restore original value. 1576 */ 1577 *(int *)ptr = tmp; 1578 1579 /* 1580 * Adjust array of valid/good pages. 1581 */ 1582 if (page_bad == TRUE) { 1583 continue; 1584 } 1585 /* 1586 * If this good page is a continuation of the 1587 * previous set of good pages, then just increase 1588 * the end pointer. Otherwise start a new chunk. 1589 * Note that "end" points one higher than end, 1590 * making the range >= start and < end. 1591 * If we're also doing a speculative memory 1592 * test and we at or past the end, bump up Maxmem 1593 * so that we keep going. The first bad page 1594 * will terminate the loop. 1595 */ 1596 if (phys_avail[pa_indx] == pa) { 1597 phys_avail[pa_indx] += PAGE_SIZE; 1598 } else { 1599 pa_indx++; 1600 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1601 printf( 1602 "Too many holes in the physical address space, giving up\n"); 1603 pa_indx--; 1604 break; 1605 } 1606 phys_avail[pa_indx++] = pa; /* start */ 1607 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1608 } 1609 physmem++; 1610 } 1611 } 1612 *pte = 0; 1613 invltlb(); 1614 1615 /* 1616 * XXX 1617 * The last chunk must contain at least one page plus the message 1618 * buffer to avoid complicating other code (message buffer address 1619 * calculation, etc.). 1620 */ 1621 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1622 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1623 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1624 phys_avail[pa_indx--] = 0; 1625 phys_avail[pa_indx--] = 0; 1626 } 1627 1628 Maxmem = atop(phys_avail[pa_indx]); 1629 1630 /* Trim off space for the message buffer. */ 1631 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1632 1633 avail_end = phys_avail[pa_indx]; 1634} 1635 1636void 1637init386(first) 1638 int first; 1639{ 1640 struct gate_descriptor *gdp; 1641 int gsel_tss, metadata_missing, off, x; 1642#ifndef SMP 1643 /* table descriptors - used to load tables by microp */ 1644 struct region_descriptor r_gdt, r_idt; 1645#endif 1646 struct pcpu *pc; 1647 1648 proc0.p_uarea = proc0uarea; 1649 thread0.td_kstack = proc0kstack; 1650 thread0.td_pcb = (struct pcb *) 1651 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1652 atdevbase = ISA_HOLE_START + KERNBASE; 1653 1654 /* 1655 * This may be done better later if it gets more high level 1656 * components in it. If so just link td->td_proc here. 1657 */ 1658 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1659 1660 metadata_missing = 0; 1661 if (bootinfo.bi_modulep) { 1662 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1663 preload_bootstrap_relocate(KERNBASE); 1664 } else { 1665 metadata_missing = 1; 1666 } 1667 if (envmode == 1) 1668 kern_envp = static_env; 1669 else if (bootinfo.bi_envp) 1670 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1671 1672 /* Init basic tunables, hz etc */ 1673 init_param1(); 1674 1675 /* 1676 * make gdt memory segments, the code segment goes up to end of the 1677 * page with etext in it, the data segment goes to the end of 1678 * the address space 1679 */ 1680 /* 1681 * XXX text protection is temporarily (?) disabled. The limit was 1682 * i386_btop(round_page(etext)) - 1. 1683 */ 1684 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1685 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1686#ifdef SMP 1687 pc = &SMP_prvspace[0].pcpu; 1688 gdt_segs[GPRIV_SEL].ssd_limit = 1689 atop(sizeof(struct privatespace) - 1); 1690#else 1691 pc = &__pcpu; 1692 gdt_segs[GPRIV_SEL].ssd_limit = 1693 atop(sizeof(struct pcpu) - 1); 1694#endif 1695 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1696 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1697 1698 for (x = 0; x < NGDT; x++) { 1699#ifdef BDE_DEBUGGER 1700 /* avoid overwriting db entries with APM ones */ 1701 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL) 1702 continue; 1703#endif 1704 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1705 } 1706 1707 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1708 r_gdt.rd_base = (int) gdt; 1709 lgdt(&r_gdt); 1710 1711 pcpu_init(pc, 0, sizeof(struct pcpu)); 1712 PCPU_SET(prvspace, pc); 1713 PCPU_SET(curthread, &thread0); 1714 1715 /* 1716 * Initialize mutexes. 1717 * 1718 * icu_lock: in order to allow an interrupt to occur in a critical 1719 * section, to set pcpu->ipending (etc...) properly, we 1720 * must be able to get the icu lock, so it can't be 1721 * under witness. 1722 */ 1723 mutex_init(); 1724 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_RECURSE); 1725 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1726 1727 /* make ldt memory segments */ 1728 /* 1729 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 1730 * should be spelled ...MAX_USER... 1731 */ 1732 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1733 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 1734 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1735 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1736 1737 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1738 lldt(_default_ldt); 1739 PCPU_SET(currentldt, _default_ldt); 1740 1741 /* exceptions */ 1742 for (x = 0; x < NIDT; x++) 1743 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 1744 GSEL(GCODE_SEL, SEL_KPL)); 1745 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 1746 GSEL(GCODE_SEL, SEL_KPL)); 1747 setidt(1, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 1748 GSEL(GCODE_SEL, SEL_KPL)); 1749 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, 1750 GSEL(GCODE_SEL, SEL_KPL)); 1751 setidt(3, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 1752 GSEL(GCODE_SEL, SEL_KPL)); 1753 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 1754 GSEL(GCODE_SEL, SEL_KPL)); 1755 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 1756 GSEL(GCODE_SEL, SEL_KPL)); 1757 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 1758 GSEL(GCODE_SEL, SEL_KPL)); 1759 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 1760 , GSEL(GCODE_SEL, SEL_KPL)); 1761 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 1762 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 1763 GSEL(GCODE_SEL, SEL_KPL)); 1764 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 1765 GSEL(GCODE_SEL, SEL_KPL)); 1766 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 1767 GSEL(GCODE_SEL, SEL_KPL)); 1768 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 1769 GSEL(GCODE_SEL, SEL_KPL)); 1770 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 1771 GSEL(GCODE_SEL, SEL_KPL)); 1772 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 1773 GSEL(GCODE_SEL, SEL_KPL)); 1774 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 1775 GSEL(GCODE_SEL, SEL_KPL)); 1776 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 1777 GSEL(GCODE_SEL, SEL_KPL)); 1778 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 1779 GSEL(GCODE_SEL, SEL_KPL)); 1780 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 1781 GSEL(GCODE_SEL, SEL_KPL)); 1782 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 1783 GSEL(GCODE_SEL, SEL_KPL)); 1784 setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 1785 GSEL(GCODE_SEL, SEL_KPL)); 1786 1787 r_idt.rd_limit = sizeof(idt0) - 1; 1788 r_idt.rd_base = (int) idt; 1789 lidt(&r_idt); 1790 1791 /* 1792 * Initialize the console before we print anything out. 1793 */ 1794 cninit(); 1795 1796 if (metadata_missing) 1797 printf("WARNING: loader(8) metadata is missing!\n"); 1798 1799#ifdef DEV_ISA 1800 isa_defaultirq(); 1801#endif 1802 1803#ifdef DDB 1804 kdb_init(); 1805 if (boothowto & RB_KDB) 1806 Debugger("Boot flags requested debugger"); 1807#endif 1808 1809 finishidentcpu(); /* Final stage of CPU initialization */ 1810 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 1811 GSEL(GCODE_SEL, SEL_KPL)); 1812 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 1813 GSEL(GCODE_SEL, SEL_KPL)); 1814 initializecpu(); /* Initialize CPU registers */ 1815 1816 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1817 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 1818 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 1819 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 1820 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 1821 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1822 private_tss = 0; 1823 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 1824 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 1825 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 1826 ltr(gsel_tss); 1827 1828 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 1829 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 1830 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 1831 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 1832 dblfault_tss.tss_cr3 = (int)IdlePTD; 1833 dblfault_tss.tss_eip = (int)dblfault_handler; 1834 dblfault_tss.tss_eflags = PSL_KERNEL; 1835 dblfault_tss.tss_ds = dblfault_tss.tss_es = 1836 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 1837 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 1838 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 1839 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 1840 1841 vm86_initialize(); 1842 getmemsize(first); 1843 init_param2(physmem); 1844 1845 /* now running on new page tables, configured,and u/iom is accessible */ 1846 1847 /* Map the message buffer. */ 1848 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1849 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1850 1851 msgbufinit(msgbufp, MSGBUF_SIZE); 1852 1853 /* make a call gate to reenter kernel with */ 1854 gdp = &ldt[LSYS5CALLS_SEL].gd; 1855 1856 x = (int) &IDTVEC(lcall_syscall); 1857 gdp->gd_looffset = x; 1858 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 1859 gdp->gd_stkcpy = 1; 1860 gdp->gd_type = SDT_SYS386CGT; 1861 gdp->gd_dpl = SEL_UPL; 1862 gdp->gd_p = 1; 1863 gdp->gd_hioffset = x >> 16; 1864 1865 /* XXX does this work? */ 1866 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1867 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 1868 1869 /* transfer to user mode */ 1870 1871 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 1872 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 1873 1874 /* setup proc 0's pcb */ 1875 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1876 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 1877 thread0.td_pcb->pcb_ext = 0; 1878 thread0.td_frame = &proc0_tf; 1879} 1880 1881void 1882cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1883{ 1884} 1885 1886#if defined(I586_CPU) && !defined(NO_F00F_HACK) 1887static void f00f_hack(void *unused); 1888SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 1889 1890static void 1891f00f_hack(void *unused) { 1892 struct gate_descriptor *new_idt; 1893#ifndef SMP 1894 struct region_descriptor r_idt; 1895#endif 1896 vm_offset_t tmp; 1897 1898 if (!has_f00f_bug) 1899 return; 1900 1901 GIANT_REQUIRED; 1902 1903 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 1904 1905 r_idt.rd_limit = sizeof(idt0) - 1; 1906 1907 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 1908 if (tmp == 0) 1909 panic("kmem_alloc returned 0"); 1910 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0) 1911 panic("kmem_alloc returned non-page-aligned memory"); 1912 /* Put the first seven entries in the lower page */ 1913 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8)); 1914 bcopy(idt, new_idt, sizeof(idt0)); 1915 r_idt.rd_base = (int)new_idt; 1916 lidt(&r_idt); 1917 idt = new_idt; 1918 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 1919 VM_PROT_READ, FALSE) != KERN_SUCCESS) 1920 panic("vm_map_protect failed"); 1921 return; 1922} 1923#endif /* defined(I586_CPU) && !NO_F00F_HACK */ 1924 1925int 1926ptrace_set_pc(struct thread *td, unsigned long addr) 1927{ 1928 td->td_frame->tf_eip = addr; 1929 return (0); 1930} 1931 1932int 1933ptrace_single_step(struct thread *td) 1934{ 1935 td->td_frame->tf_eflags |= PSL_T; 1936 return (0); 1937} 1938 1939int 1940fill_regs(struct thread *td, struct reg *regs) 1941{ 1942 struct pcb *pcb; 1943 struct trapframe *tp; 1944 1945 tp = td->td_frame; 1946 regs->r_fs = tp->tf_fs; 1947 regs->r_es = tp->tf_es; 1948 regs->r_ds = tp->tf_ds; 1949 regs->r_edi = tp->tf_edi; 1950 regs->r_esi = tp->tf_esi; 1951 regs->r_ebp = tp->tf_ebp; 1952 regs->r_ebx = tp->tf_ebx; 1953 regs->r_edx = tp->tf_edx; 1954 regs->r_ecx = tp->tf_ecx; 1955 regs->r_eax = tp->tf_eax; 1956 regs->r_eip = tp->tf_eip; 1957 regs->r_cs = tp->tf_cs; 1958 regs->r_eflags = tp->tf_eflags; 1959 regs->r_esp = tp->tf_esp; 1960 regs->r_ss = tp->tf_ss; 1961 pcb = td->td_pcb; 1962 regs->r_gs = pcb->pcb_gs; 1963 return (0); 1964} 1965 1966int 1967set_regs(struct thread *td, struct reg *regs) 1968{ 1969 struct pcb *pcb; 1970 struct trapframe *tp; 1971 1972 tp = td->td_frame; 1973 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 1974 !CS_SECURE(regs->r_cs)) 1975 return (EINVAL); 1976 tp->tf_fs = regs->r_fs; 1977 tp->tf_es = regs->r_es; 1978 tp->tf_ds = regs->r_ds; 1979 tp->tf_edi = regs->r_edi; 1980 tp->tf_esi = regs->r_esi; 1981 tp->tf_ebp = regs->r_ebp; 1982 tp->tf_ebx = regs->r_ebx; 1983 tp->tf_edx = regs->r_edx; 1984 tp->tf_ecx = regs->r_ecx; 1985 tp->tf_eax = regs->r_eax; 1986 tp->tf_eip = regs->r_eip; 1987 tp->tf_cs = regs->r_cs; 1988 tp->tf_eflags = regs->r_eflags; 1989 tp->tf_esp = regs->r_esp; 1990 tp->tf_ss = regs->r_ss; 1991 pcb = td->td_pcb; 1992 pcb->pcb_gs = regs->r_gs; 1993 return (0); 1994} 1995 1996#ifdef CPU_ENABLE_SSE 1997static void 1998fill_fpregs_xmm(sv_xmm, sv_87) 1999 struct savexmm *sv_xmm; 2000 struct save87 *sv_87; 2001{ 2002 register struct env87 *penv_87 = &sv_87->sv_env; 2003 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2004 int i; 2005 2006 bzero(sv_87, sizeof(*sv_87)); 2007 2008 /* FPU control/status */ 2009 penv_87->en_cw = penv_xmm->en_cw; 2010 penv_87->en_sw = penv_xmm->en_sw; 2011 penv_87->en_tw = penv_xmm->en_tw; 2012 penv_87->en_fip = penv_xmm->en_fip; 2013 penv_87->en_fcs = penv_xmm->en_fcs; 2014 penv_87->en_opcode = penv_xmm->en_opcode; 2015 penv_87->en_foo = penv_xmm->en_foo; 2016 penv_87->en_fos = penv_xmm->en_fos; 2017 2018 /* FPU registers */ 2019 for (i = 0; i < 8; ++i) 2020 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2021} 2022 2023static void 2024set_fpregs_xmm(sv_87, sv_xmm) 2025 struct save87 *sv_87; 2026 struct savexmm *sv_xmm; 2027{ 2028 register struct env87 *penv_87 = &sv_87->sv_env; 2029 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2030 int i; 2031 2032 /* FPU control/status */ 2033 penv_xmm->en_cw = penv_87->en_cw; 2034 penv_xmm->en_sw = penv_87->en_sw; 2035 penv_xmm->en_tw = penv_87->en_tw; 2036 penv_xmm->en_fip = penv_87->en_fip; 2037 penv_xmm->en_fcs = penv_87->en_fcs; 2038 penv_xmm->en_opcode = penv_87->en_opcode; 2039 penv_xmm->en_foo = penv_87->en_foo; 2040 penv_xmm->en_fos = penv_87->en_fos; 2041 2042 /* FPU registers */ 2043 for (i = 0; i < 8; ++i) 2044 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2045} 2046#endif /* CPU_ENABLE_SSE */ 2047 2048int 2049fill_fpregs(struct thread *td, struct fpreg *fpregs) 2050{ 2051#ifdef CPU_ENABLE_SSE 2052 if (cpu_fxsr) { 2053 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2054 (struct save87 *)fpregs); 2055 return (0); 2056 } 2057#endif /* CPU_ENABLE_SSE */ 2058 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2059 return (0); 2060} 2061 2062int 2063set_fpregs(struct thread *td, struct fpreg *fpregs) 2064{ 2065#ifdef CPU_ENABLE_SSE 2066 if (cpu_fxsr) { 2067 set_fpregs_xmm((struct save87 *)fpregs, 2068 &td->td_pcb->pcb_save.sv_xmm); 2069 return (0); 2070 } 2071#endif /* CPU_ENABLE_SSE */ 2072 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2073 return (0); 2074} 2075 2076/* 2077 * Get machine context. 2078 */ 2079void 2080get_mcontext(struct thread *td, mcontext_t *mcp) 2081{ 2082 struct trapframe *tp; 2083 2084 tp = td->td_frame; 2085 2086 mcp->mc_onstack = sigonstack(tp->tf_esp); 2087 mcp->mc_gs = td->td_pcb->pcb_gs; 2088 mcp->mc_fs = tp->tf_fs; 2089 mcp->mc_es = tp->tf_es; 2090 mcp->mc_ds = tp->tf_ds; 2091 mcp->mc_edi = tp->tf_edi; 2092 mcp->mc_esi = tp->tf_esi; 2093 mcp->mc_ebp = tp->tf_ebp; 2094 mcp->mc_isp = tp->tf_isp; 2095 mcp->mc_ebx = tp->tf_ebx; 2096 mcp->mc_edx = tp->tf_edx; 2097 mcp->mc_ecx = tp->tf_ecx; 2098 mcp->mc_eax = tp->tf_eax; 2099 mcp->mc_eip = tp->tf_eip; 2100 mcp->mc_cs = tp->tf_cs; 2101 mcp->mc_eflags = tp->tf_eflags; 2102 mcp->mc_esp = tp->tf_esp; 2103 mcp->mc_ss = tp->tf_ss; 2104 mcp->mc_len = sizeof(*mcp); 2105 get_fpcontext(td, mcp); 2106} 2107 2108/* 2109 * Set machine context. 2110 * 2111 * However, we don't set any but the user modifiable flags, and we won't 2112 * touch the cs selector. 2113 */ 2114int 2115set_mcontext(struct thread *td, const mcontext_t *mcp) 2116{ 2117 struct trapframe *tp; 2118 int eflags, ret; 2119 2120 tp = td->td_frame; 2121 if (mcp->mc_len != sizeof(*mcp)) 2122 return (EINVAL); 2123 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2124 (tp->tf_eflags & ~PSL_USERCHANGE); 2125 if ((ret = set_fpcontext(td, mcp)) == 0) { 2126 tp->tf_fs = mcp->mc_fs; 2127 tp->tf_es = mcp->mc_es; 2128 tp->tf_ds = mcp->mc_ds; 2129 tp->tf_edi = mcp->mc_edi; 2130 tp->tf_esi = mcp->mc_esi; 2131 tp->tf_ebp = mcp->mc_ebp; 2132 tp->tf_ebx = mcp->mc_ebx; 2133 tp->tf_edx = mcp->mc_edx; 2134 tp->tf_ecx = mcp->mc_ecx; 2135 tp->tf_eax = mcp->mc_eax; 2136 tp->tf_eip = mcp->mc_eip; 2137 tp->tf_eflags = eflags; 2138 tp->tf_esp = mcp->mc_esp; 2139 tp->tf_ss = mcp->mc_ss; 2140 td->td_pcb->pcb_gs = mcp->mc_gs; 2141 ret = 0; 2142 } 2143 return (ret); 2144} 2145 2146static void 2147get_fpcontext(struct thread *td, mcontext_t *mcp) 2148{ 2149#ifndef DEV_NPX 2150 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2151 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2152#else /* DEV_NPX */ 2153 union savefpu *addr; 2154 2155 /* 2156 * XXX mc_fpstate might be misaligned, since its declaration is not 2157 * unportabilized using __attribute__((aligned(16))) like the 2158 * declaration of struct savemm, and anyway, alignment doesn't work 2159 * for auto variables since we don't use gcc's pessimal stack 2160 * alignment. Work around this by abusing the spare fields after 2161 * mcp->mc_fpstate. 2162 * 2163 * XXX unpessimize most cases by only aligning when fxsave might be 2164 * called, although this requires knowing too much about 2165 * npxgetregs()'s internals. 2166 */ 2167 addr = (union savefpu *)&mcp->mc_fpstate; 2168 if (td == PCPU_GET(fpcurthread) && 2169#ifdef CPU_ENABLE_SSE 2170 cpu_fxsr && 2171#endif 2172 ((uintptr_t)(void *)addr & 0xF)) { 2173 do 2174 addr = (void *)((char *)addr + 4); 2175 while ((uintptr_t)(void *)addr & 0xF); 2176 } 2177 mcp->mc_ownedfp = npxgetregs(td, addr); 2178 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2179 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2180 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2181 } 2182 bcopy(&mcp->mc_fpstate, &td->td_pcb->pcb_save, sizeof(mcp->mc_fpstate)); 2183 mcp->mc_fpformat = npxformat(); 2184#endif /* !DEV_NPX */ 2185} 2186 2187static int 2188set_fpcontext(struct thread *td, const mcontext_t *mcp) 2189{ 2190 union savefpu *addr; 2191 2192 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2193 return (0); 2194 if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2195 /* We don't care what state is left in the FPU or PCB. */ 2196 fpstate_drop(td); 2197 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2198 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2199 /* XXX align as above. */ 2200 addr = (union savefpu *)&mcp->mc_fpstate; 2201 if (td == PCPU_GET(fpcurthread) && 2202#ifdef CPU_ENABLE_SSE 2203 cpu_fxsr && 2204#endif 2205 ((uintptr_t)(void *)addr & 0xF)) { 2206 do 2207 addr = (void *)((char *)addr + 4); 2208 while ((uintptr_t)(void *)addr & 0xF); 2209 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2210 } 2211#ifdef DEV_NPX 2212 /* 2213 * XXX we violate the dubious requirement that npxsetregs() 2214 * be called with interrupts disabled. 2215 */ 2216 npxsetregs(td, addr); 2217 /* 2218 * Don't bother putting things back where they were in the 2219 * misaligned case, since we know that the caller won't use 2220 * them again. 2221 */ 2222 } else { 2223 /* 2224 * There is no valid FPU state in *mcp, so use the saved 2225 * state in the PCB if there is one. XXX the test for 2226 * whether there is one seems to be quite broken. We 2227 * forcibly drop the state in sendsig(). 2228 */ 2229 if ((td->td_pcb->pcb_flags & PCB_NPXINITDONE) != 0) 2230 npxsetregs(td, &td->td_pcb->pcb_save); 2231#endif 2232#if !defined(COMPAT_FREEBSD4) && !defined(COMPAT_43) 2233 return (EINVAL); 2234#endif 2235 } 2236 return (0); 2237} 2238 2239static void 2240fpstate_drop(struct thread *td) 2241{ 2242 register_t s; 2243 2244 s = intr_disable(); 2245#ifdef DEV_NPX 2246 if (PCPU_GET(fpcurthread) == td) 2247 npxdrop(); 2248#endif 2249 /* 2250 * XXX force a full drop of the npx. The above only drops it if we 2251 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2252 * 2253 * XXX I don't much like npxgetregs()'s semantics of doing a full 2254 * drop. Dropping only to the pcb matches fnsave's behaviour. 2255 * We only need to drop to !PCB_INITDONE in sendsig(). But 2256 * sendsig() is the only caller of npxgetregs()... perhaps we just 2257 * have too many layers. 2258 */ 2259 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2260 intr_restore(s); 2261} 2262 2263int 2264fill_dbregs(struct thread *td, struct dbreg *dbregs) 2265{ 2266 struct pcb *pcb; 2267 2268 if (td == NULL) { 2269 dbregs->dr0 = rdr0(); 2270 dbregs->dr1 = rdr1(); 2271 dbregs->dr2 = rdr2(); 2272 dbregs->dr3 = rdr3(); 2273 dbregs->dr4 = rdr4(); 2274 dbregs->dr5 = rdr5(); 2275 dbregs->dr6 = rdr6(); 2276 dbregs->dr7 = rdr7(); 2277 } else { 2278 pcb = td->td_pcb; 2279 dbregs->dr0 = pcb->pcb_dr0; 2280 dbregs->dr1 = pcb->pcb_dr1; 2281 dbregs->dr2 = pcb->pcb_dr2; 2282 dbregs->dr3 = pcb->pcb_dr3; 2283 dbregs->dr4 = 0; 2284 dbregs->dr5 = 0; 2285 dbregs->dr6 = pcb->pcb_dr6; 2286 dbregs->dr7 = pcb->pcb_dr7; 2287 } 2288 return (0); 2289} 2290 2291int 2292set_dbregs(struct thread *td, struct dbreg *dbregs) 2293{ 2294 struct pcb *pcb; 2295 int i; 2296 u_int32_t mask1, mask2; 2297 2298 if (td == NULL) { 2299 load_dr0(dbregs->dr0); 2300 load_dr1(dbregs->dr1); 2301 load_dr2(dbregs->dr2); 2302 load_dr3(dbregs->dr3); 2303 load_dr4(dbregs->dr4); 2304 load_dr5(dbregs->dr5); 2305 load_dr6(dbregs->dr6); 2306 load_dr7(dbregs->dr7); 2307 } else { 2308 /* 2309 * Don't let an illegal value for dr7 get set. Specifically, 2310 * check for undefined settings. Setting these bit patterns 2311 * result in undefined behaviour and can lead to an unexpected 2312 * TRCTRAP. 2313 */ 2314 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2315 i++, mask1 <<= 2, mask2 <<= 2) 2316 if ((dbregs->dr7 & mask1) == mask2) 2317 return (EINVAL); 2318 2319 pcb = td->td_pcb; 2320 2321 /* 2322 * Don't let a process set a breakpoint that is not within the 2323 * process's address space. If a process could do this, it 2324 * could halt the system by setting a breakpoint in the kernel 2325 * (if ddb was enabled). Thus, we need to check to make sure 2326 * that no breakpoints are being enabled for addresses outside 2327 * process's address space, unless, perhaps, we were called by 2328 * uid 0. 2329 * 2330 * XXX - what about when the watched area of the user's 2331 * address space is written into from within the kernel 2332 * ... wouldn't that still cause a breakpoint to be generated 2333 * from within kernel mode? 2334 */ 2335 2336 if (suser(td) != 0) { 2337 if (dbregs->dr7 & 0x3) { 2338 /* dr0 is enabled */ 2339 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS) 2340 return (EINVAL); 2341 } 2342 2343 if (dbregs->dr7 & (0x3<<2)) { 2344 /* dr1 is enabled */ 2345 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS) 2346 return (EINVAL); 2347 } 2348 2349 if (dbregs->dr7 & (0x3<<4)) { 2350 /* dr2 is enabled */ 2351 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS) 2352 return (EINVAL); 2353 } 2354 2355 if (dbregs->dr7 & (0x3<<6)) { 2356 /* dr3 is enabled */ 2357 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS) 2358 return (EINVAL); 2359 } 2360 } 2361 2362 pcb->pcb_dr0 = dbregs->dr0; 2363 pcb->pcb_dr1 = dbregs->dr1; 2364 pcb->pcb_dr2 = dbregs->dr2; 2365 pcb->pcb_dr3 = dbregs->dr3; 2366 pcb->pcb_dr6 = dbregs->dr6; 2367 pcb->pcb_dr7 = dbregs->dr7; 2368 2369 pcb->pcb_flags |= PCB_DBREGS; 2370 } 2371 2372 return (0); 2373} 2374 2375/* 2376 * Return > 0 if a hardware breakpoint has been hit, and the 2377 * breakpoint was in user space. Return 0, otherwise. 2378 */ 2379int 2380user_dbreg_trap(void) 2381{ 2382 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2383 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2384 int nbp; /* number of breakpoints that triggered */ 2385 caddr_t addr[4]; /* breakpoint addresses */ 2386 int i; 2387 2388 dr7 = rdr7(); 2389 if ((dr7 & 0x000000ff) == 0) { 2390 /* 2391 * all GE and LE bits in the dr7 register are zero, 2392 * thus the trap couldn't have been caused by the 2393 * hardware debug registers 2394 */ 2395 return 0; 2396 } 2397 2398 nbp = 0; 2399 dr6 = rdr6(); 2400 bp = dr6 & 0x0000000f; 2401 2402 if (!bp) { 2403 /* 2404 * None of the breakpoint bits are set meaning this 2405 * trap was not caused by any of the debug registers 2406 */ 2407 return 0; 2408 } 2409 2410 /* 2411 * at least one of the breakpoints were hit, check to see 2412 * which ones and if any of them are user space addresses 2413 */ 2414 2415 if (bp & 0x01) { 2416 addr[nbp++] = (caddr_t)rdr0(); 2417 } 2418 if (bp & 0x02) { 2419 addr[nbp++] = (caddr_t)rdr1(); 2420 } 2421 if (bp & 0x04) { 2422 addr[nbp++] = (caddr_t)rdr2(); 2423 } 2424 if (bp & 0x08) { 2425 addr[nbp++] = (caddr_t)rdr3(); 2426 } 2427 2428 for (i=0; i<nbp; i++) { 2429 if (addr[i] < 2430 (caddr_t)VM_MAXUSER_ADDRESS) { 2431 /* 2432 * addr[i] is in user space 2433 */ 2434 return nbp; 2435 } 2436 } 2437 2438 /* 2439 * None of the breakpoints are in user space. 2440 */ 2441 return 0; 2442} 2443 2444 2445#ifndef DDB 2446void 2447Debugger(const char *msg) 2448{ 2449 printf("Debugger(\"%s\") called.\n", msg); 2450} 2451#endif /* no DDB */ 2452 2453#ifdef DDB 2454 2455/* 2456 * Provide inb() and outb() as functions. They are normally only 2457 * available as macros calling inlined functions, thus cannot be 2458 * called inside DDB. 2459 * 2460 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2461 */ 2462 2463#undef inb 2464#undef outb 2465 2466/* silence compiler warnings */ 2467u_char inb(u_int); 2468void outb(u_int, u_char); 2469 2470u_char 2471inb(u_int port) 2472{ 2473 u_char data; 2474 /* 2475 * We use %%dx and not %1 here because i/o is done at %dx and not at 2476 * %edx, while gcc generates inferior code (movw instead of movl) 2477 * if we tell it to load (u_short) port. 2478 */ 2479 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2480 return (data); 2481} 2482 2483void 2484outb(u_int port, u_char data) 2485{ 2486 u_char al; 2487 /* 2488 * Use an unnecessary assignment to help gcc's register allocator. 2489 * This make a large difference for gcc-1.40 and a tiny difference 2490 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2491 * best results. gcc-2.6.0 can't handle this. 2492 */ 2493 al = data; 2494 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2495} 2496 2497#endif /* DDB */ 2498