fpu.c revision 6664
1/*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.19 1995/02/17 19:38:13 bde Exp $ 36 */ 37 38#include "npx.h" 39#if NNPX > 0 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/conf.h> 44#include <sys/file.h> 45#include <sys/proc.h> 46#include <sys/devconf.h> 47#include <sys/ioctl.h> 48#include <sys/syslog.h> 49#include <sys/signalvar.h> 50 51#include <machine/cpu.h> 52#include <machine/pcb.h> 53#include <machine/trap.h> 54#include <machine/clock.h> 55#include <machine/specialreg.h> 56 57#include <i386/isa/icu.h> 58#include <i386/isa/isa_device.h> 59#include <i386/isa/isa.h> 60 61/* 62 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 63 */ 64 65#ifdef __GNUC__ 66 67#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 68#define fnclex() __asm("fnclex") 69#define fninit() __asm("fninit") 70#define fnop() __asm("fnop") 71#define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr))) 72#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr))) 73#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr))) 74#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 75#define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 76#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 77 : : "n" (CR0_TS) : "ax") 78#define stop_emulating() __asm("clts") 79 80#else /* not __GNUC__ */ 81 82void fldcw __P((caddr_t addr)); 83void fnclex __P((void)); 84void fninit __P((void)); 85void fnop __P((void)); 86void fnsave __P((caddr_t addr)); 87void fnstcw __P((caddr_t addr)); 88void fnstsw __P((caddr_t addr)); 89void fp_divide_by_0 __P((void)); 90void frstor __P((caddr_t addr)); 91void start_emulating __P((void)); 92void stop_emulating __P((void)); 93 94#endif /* __GNUC__ */ 95 96typedef u_char bool_t; 97 98static int npxattach __P((struct isa_device *dvp)); 99static int npxprobe __P((struct isa_device *dvp)); 100static int npxprobe1 __P((struct isa_device *dvp)); 101 102struct isa_driver npxdriver = { 103 npxprobe, npxattach, "npx", 104}; 105 106int hw_float; /* XXX currently just alias for npx_exists */ 107u_int npx0_imask = SWI_CLOCK_MASK; 108struct proc *npxproc; 109 110static bool_t npx_ex16; 111static bool_t npx_exists; 112static struct gate_descriptor npx_idt_probeintr; 113static int npx_intrno; 114static volatile u_int npx_intrs_while_probing; 115static bool_t npx_irq13; 116static volatile u_int npx_traps_while_probing; 117 118/* 119 * Special interrupt handlers. Someday intr0-intr15 will be used to count 120 * interrupts. We'll still need a special exception 16 handler. The busy 121 * latch stuff in probeintr() can be moved to npxprobe(). 122 */ 123inthand_t probeintr; 124asm 125(" 126 .text 127_probeintr: 128 ss 129 incl _npx_intrs_while_probing 130 pushl %eax 131 movb $0x20,%al # EOI (asm in strings loses cpp features) 132 outb %al,$0xa0 # IO_ICU2 133 outb %al,$0x20 # IO_ICU1 134 movb $0,%al 135 outb %al,$0xf0 # clear BUSY# latch 136 popl %eax 137 iret 138"); 139 140inthand_t probetrap; 141asm 142(" 143 .text 144_probetrap: 145 ss 146 incl _npx_traps_while_probing 147 fnclex 148 iret 149"); 150 151/* 152 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 153 * whether the device exists or not (XXX should be elsewhere). Set flags 154 * to tell npxattach() what to do. Modify device struct if npx doesn't 155 * need to use interrupts. Return 1 if device exists. 156 */ 157static int 158npxprobe(dvp) 159 struct isa_device *dvp; 160{ 161 int result; 162 u_long save_eflags; 163 u_char save_icu1_mask; 164 u_char save_icu2_mask; 165 struct gate_descriptor save_idt_npxintr; 166 struct gate_descriptor save_idt_npxtrap; 167 /* 168 * This routine is now just a wrapper for npxprobe1(), to install 169 * special npx interrupt and trap handlers, to enable npx interrupts 170 * and to disable other interrupts. Someday isa_configure() will 171 * install suitable handlers and run with interrupts enabled so we 172 * won't need to do so much here. 173 */ 174 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 175 save_eflags = read_eflags(); 176 disable_intr(); 177 save_icu1_mask = inb(IO_ICU1 + 1); 178 save_icu2_mask = inb(IO_ICU2 + 1); 179 save_idt_npxintr = idt[npx_intrno]; 180 save_idt_npxtrap = idt[16]; 181 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 182 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 183 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL); 184 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL); 185 npx_idt_probeintr = idt[npx_intrno]; 186 enable_intr(); 187 result = npxprobe1(dvp); 188 disable_intr(); 189 outb(IO_ICU1 + 1, save_icu1_mask); 190 outb(IO_ICU2 + 1, save_icu2_mask); 191 idt[npx_intrno] = save_idt_npxintr; 192 idt[16] = save_idt_npxtrap; 193 write_eflags(save_eflags); 194 return (result); 195} 196 197static int 198npxprobe1(dvp) 199 struct isa_device *dvp; 200{ 201 u_short control; 202 u_short status; 203 204 /* 205 * Partially reset the coprocessor, if any. Some BIOS's don't reset 206 * it after a warm boot. 207 */ 208 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 209 outb(0xf0, 0); /* clear BUSY# latch */ 210 /* 211 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 212 * instructions. We must set the CR0_MP bit and use the CR0_TS 213 * bit to control the trap, because setting the CR0_EM bit does 214 * not cause WAIT instructions to trap. It's important to trap 215 * WAIT instructions - otherwise the "wait" variants of no-wait 216 * control instructions would degenerate to the "no-wait" variants 217 * after FP context switches but work correctly otherwise. It's 218 * particularly important to trap WAITs when there is no NPX - 219 * otherwise the "wait" variants would always degenerate. 220 * 221 * Try setting CR0_NE to get correct error reporting on 486DX's. 222 * Setting it should fail or do nothing on lesser processors. 223 */ 224 load_cr0(rcr0() | CR0_MP | CR0_NE); 225 /* 226 * But don't trap while we're probing. 227 */ 228 stop_emulating(); 229 /* 230 * Finish resetting the coprocessor, if any. If there is an error 231 * pending, then we may get a bogus IRQ13, but probeintr() will handle 232 * it OK. Bogus halts have never been observed, but we enabled 233 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 234 */ 235 fninit(); 236 /* 237 * Don't use fwait here because it might hang. 238 * Don't use fnop here because it usually hangs if there is no FPU. 239 */ 240 DELAY(1000); /* wait for any IRQ13 */ 241#ifdef DIAGNOSTIC 242 if (npx_intrs_while_probing != 0) 243 printf("fninit caused %u bogus npx interrupt(s)\n", 244 npx_intrs_while_probing); 245 if (npx_traps_while_probing != 0) 246 printf("fninit caused %u bogus npx trap(s)\n", 247 npx_traps_while_probing); 248#endif 249 /* 250 * Check for a status of mostly zero. 251 */ 252 status = 0x5a5a; 253 fnstsw(&status); 254 if ((status & 0xb8ff) == 0) { 255 /* 256 * Good, now check for a proper control word. 257 */ 258 control = 0x5a5a; 259 fnstcw(&control); 260 if ((control & 0x1f3f) == 0x033f) { 261 hw_float = npx_exists = 1; 262 /* 263 * We have an npx, now divide by 0 to see if exception 264 * 16 works. 265 */ 266 control &= ~(1 << 2); /* enable divide by 0 trap */ 267 fldcw(&control); 268 npx_traps_while_probing = npx_intrs_while_probing = 0; 269 fp_divide_by_0(); 270 if (npx_traps_while_probing != 0) { 271 /* 272 * Good, exception 16 works. 273 */ 274 npx_ex16 = 1; 275 dvp->id_irq = 0; /* zap the interrupt */ 276 /* 277 * special return value to flag that we do not 278 * actually use any I/O registers 279 */ 280 return (-1); 281 } 282 if (npx_intrs_while_probing != 0) { 283 /* 284 * Bad, we are stuck with IRQ13. 285 */ 286 npx_irq13 = 1; 287 /* 288 * npxattach would be too late to set npx0_imask. 289 */ 290 npx0_imask |= dvp->id_irq; 291 return (IO_NPXSIZE); 292 } 293 /* 294 * Worse, even IRQ13 is broken. Use emulator. 295 */ 296 } 297 } 298 /* 299 * Probe failed, but we want to get to npxattach to initialize the 300 * emulator and say that it has been installed. XXX handle devices 301 * that aren't really devices better. 302 */ 303 dvp->id_irq = 0; 304 /* 305 * special return value to flag that we do not 306 * actually use any I/O registers 307 */ 308 return (-1); 309} 310 311static struct kern_devconf kdc_npx[NNPX] = { { 312 0, 0, 0, /* filled in by dev_attach */ 313 "npx", 0, { MDDT_ISA, 0 }, 314 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 315 &kdc_isa0, /* parent */ 316 0, /* parentdata */ 317 DC_BUSY, 318 "Floating-point unit" 319} }; 320 321static inline void 322npx_registerdev(struct isa_device *id) 323{ 324 int unit; 325 326 unit = id->id_unit; 327 if (unit != 0) 328 kdc_npx[unit] = kdc_npx[0]; 329 kdc_npx[unit].kdc_unit = unit; 330 kdc_npx[unit].kdc_isa = id; 331 dev_attach(&kdc_npx[unit]); 332} 333 334/* 335 * Attach routine - announce which it is, and wire into system 336 */ 337int 338npxattach(dvp) 339 struct isa_device *dvp; 340{ 341 printf("npx%d: ", dvp->id_unit); 342 if (npx_ex16) 343 printf("INT 16 interface\n"); 344 else if (npx_irq13) 345 ; /* higher level has printed "irq 13" */ 346#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 347 else if (npx_exists) { 348 printf("error reporting broken; using 387 emulator\n"); 349 npx_exists = 0; 350 } else 351 printf("387 emulator\n"); 352#else 353 else 354 printf("no 387 emulator in kernel!\n"); 355#endif 356 npxinit(__INITIAL_NPXCW__); 357 if (npx_exists) 358 npx_registerdev(dvp); 359 return (1); /* XXX unused */ 360} 361 362/* 363 * Initialize floating point unit. 364 */ 365void 366npxinit(control) 367 u_short control; 368{ 369 struct save87 dummy; 370 371 if (!npx_exists) 372 return; 373 /* 374 * fninit has the same h/w bugs as fnsave. Use the detoxified 375 * fnsave to throw away any junk in the fpu. npxsave() initializes 376 * the fpu and sets npxproc = NULL as important side effects. 377 */ 378 npxsave(&dummy); 379 stop_emulating(); 380 fldcw(&control); 381 if (curpcb != NULL) 382 fnsave(&curpcb->pcb_savefpu); 383 start_emulating(); 384} 385 386/* 387 * Free coprocessor (if we have it). 388 */ 389void 390npxexit(p) 391 struct proc *p; 392{ 393 394 if (p == npxproc) 395 npxsave(&curpcb->pcb_savefpu); 396 if (npx_exists) { 397 u_int masked_exceptions; 398 399 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 400 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 401 /* 402 * Overflow, divde by 0, and invalid operand would have 403 * caused a trap in 1.1.5. 404 */ 405 if (masked_exceptions & 0x0d) 406 log(LOG_ERR, 407 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 408 p->p_pid, p->p_comm, masked_exceptions); 409 } 410} 411 412/* 413 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 414 * 415 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 416 * depend on longjmp() restoring a usable state. Restoring the state 417 * or examining it might fail if we didn't clear exceptions. 418 * 419 * XXX there is no standard way to tell SIGFPE handlers about the error 420 * state. The old interface: 421 * 422 * void handler(int sig, int code, struct sigcontext *scp); 423 * 424 * is broken because it is non-ANSI and because the FP state is not in 425 * struct sigcontext. 426 * 427 * XXX the FP state is not preserved across signal handlers. So signal 428 * handlers cannot afford to do FP unless they preserve the state or 429 * longjmp() out. Both preserving the state and longjmp()ing may be 430 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 431 * solution for signals other than SIGFPE. 432 */ 433void 434npxintr(frame) 435 struct intrframe frame; 436{ 437 int code; 438 439 if (npxproc == NULL || !npx_exists) { 440 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 441 npxproc, curproc, npx_exists); 442 panic("npxintr from nowhere"); 443 } 444 if (npxproc != curproc) { 445 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 446 npxproc, curproc, npx_exists); 447 panic("npxintr from non-current process"); 448 } 449 450 outb(0xf0, 0); 451 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 452 fnclex(); 453 fnop(); 454 455 /* 456 * Pass exception to process. 457 */ 458 if (ISPL(frame.if_cs) == SEL_UPL) { 459 /* 460 * Interrupt is essentially a trap, so we can afford to call 461 * the SIGFPE handler (if any) as soon as the interrupt 462 * returns. 463 * 464 * XXX little or nothing is gained from this, and plenty is 465 * lost - the interrupt frame has to contain the trap frame 466 * (this is otherwise only necessary for the rescheduling trap 467 * in doreti, and the frame for that could easily be set up 468 * just before it is used). 469 */ 470 curproc->p_md.md_regs = (int *)&frame.if_es; 471#ifdef notyet 472 /* 473 * Encode the appropriate code for detailed information on 474 * this exception. 475 */ 476 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 477#else 478 code = 0; /* XXX */ 479#endif 480 trapsignal(curproc, SIGFPE, code); 481 } else { 482 /* 483 * Nested interrupt. These losers occur when: 484 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 485 * o immediately after an fnsave or frstor of an 486 * error state. 487 * o a couple of 386 instructions after 488 * "fstpl _memvar" causes a stack overflow. 489 * These are especially nasty when combined with a 490 * trace trap. 491 * o an IRQ13 occurs at the same time as another higher- 492 * priority interrupt. 493 * 494 * Treat them like a true async interrupt. 495 */ 496 psignal(curproc, SIGFPE); 497 } 498} 499 500/* 501 * Implement device not available (DNA) exception 502 * 503 * It would be better to switch FP context here (if curproc != npxproc) 504 * and not necessarily for every context switch, but it is too hard to 505 * access foreign pcb's. 506 */ 507int 508npxdna() 509{ 510 if (!npx_exists) 511 return (0); 512 if (npxproc != NULL) { 513 printf("npxdna: npxproc = %p, curproc = %p\n", 514 npxproc, curproc); 515 panic("npxdna"); 516 } 517 stop_emulating(); 518 /* 519 * Record new context early in case frstor causes an IRQ13. 520 */ 521 npxproc = curproc; 522 curpcb->pcb_savefpu.sv_ex_sw = 0; 523 /* 524 * The following frstor may cause an IRQ13 when the state being 525 * restored has a pending error. The error will appear to have been 526 * triggered by the current (npx) user instruction even when that 527 * instruction is a no-wait instruction that should not trigger an 528 * error (e.g., fnclex). On at least one 486 system all of the 529 * no-wait instructions are broken the same as frstor, so our 530 * treatment does not amplify the breakage. On at least one 531 * 386/Cyrix 387 system, fnclex works correctly while frstor and 532 * fnsave are broken, so our treatment breaks fnclex if it is the 533 * first FPU instruction after a context switch. 534 */ 535 frstor(&curpcb->pcb_savefpu); 536 537 return (1); 538} 539 540/* 541 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 542 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 543 * any IRQ13 to be handled immediately, and then ignore it. This routine is 544 * often called at splhigh so it must not use many system services. In 545 * particular, it's much easier to install a special handler than to 546 * guarantee that it's safe to use npxintr() and its supporting code. 547 */ 548void 549npxsave(addr) 550 struct save87 *addr; 551{ 552 u_char icu1_mask; 553 u_char icu2_mask; 554 u_char old_icu1_mask; 555 u_char old_icu2_mask; 556 struct gate_descriptor save_idt_npxintr; 557 558 disable_intr(); 559 old_icu1_mask = inb(IO_ICU1 + 1); 560 old_icu2_mask = inb(IO_ICU2 + 1); 561 save_idt_npxintr = idt[npx_intrno]; 562 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 563 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 564 idt[npx_intrno] = npx_idt_probeintr; 565 enable_intr(); 566 stop_emulating(); 567 fnsave(addr); 568 fnop(); 569 start_emulating(); 570 npxproc = NULL; 571 disable_intr(); 572 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 573 icu2_mask = inb(IO_ICU2 + 1); 574 outb(IO_ICU1 + 1, 575 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 576 outb(IO_ICU2 + 1, 577 (icu2_mask & ~(npx0_imask >> 8)) 578 | (old_icu2_mask & (npx0_imask >> 8))); 579 idt[npx_intrno] = save_idt_npxintr; 580 enable_intr(); /* back to usual state */ 581} 582 583#endif /* NNPX > 0 */ 584