fpu.c revision 33362
1/*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.56 1998/02/12 21:41:10 bde Exp $ 36 */ 37 38#include "npx.h" 39#if NNPX > 0 40 41#include "opt_debug_npx.h" 42#include "opt_math_emulate.h" 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/kernel.h> 47#include <sys/malloc.h> 48#include <sys/sysctl.h> 49#include <sys/conf.h> 50#include <sys/proc.h> 51#ifdef NPX_DEBUG 52#include <sys/syslog.h> 53#endif 54#include <sys/signalvar.h> 55 56#ifndef SMP 57#include <machine/asmacros.h> 58#endif 59#include <machine/cputypes.h> 60#include <machine/frame.h> 61#include <machine/ipl.h> 62#ifndef SMP 63#include <machine/md_var.h> 64#endif 65#include <machine/pcb.h> 66#include <machine/psl.h> 67#ifndef SMP 68#include <machine/clock.h> 69#endif 70#include <machine/specialreg.h> 71#include <machine/segments.h> 72 73#ifndef SMP 74#include <i386/isa/icu.h> 75#include <i386/isa/intr_machdep.h> 76#include <i386/isa/isa.h> 77#endif 78#include <i386/isa/isa_device.h> 79 80/* 81 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 82 */ 83 84/* Configuration flags. */ 85#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 86#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 87#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 88 89/* XXX - should be in header file. */ 90extern void (*bcopy_vector) __P((const void *from, void *to, size_t len)); 91extern void (*ovbcopy_vector) __P((const void *from, void *to, size_t len)); 92extern int (*copyin_vector) __P((const void *udaddr, void *kaddr, size_t len)); 93extern int (*copyout_vector) __P((const void *kaddr, void *udaddr, size_t len)); 94 95void i586_bcopy __P((const void *from, void *to, size_t len)); 96void i586_bzero __P((void *buf, size_t len)); 97int i586_copyin __P((const void *udaddr, void *kaddr, size_t len)); 98int i586_copyout __P((const void *kaddr, void *udaddr, size_t len)); 99 100#ifdef __GNUC__ 101 102#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 103#define fnclex() __asm("fnclex") 104#define fninit() __asm("fninit") 105#define fnop() __asm("fnop") 106#define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr))) 107#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr))) 108#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr))) 109#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 110#define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 111#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 112 : : "n" (CR0_TS) : "ax") 113#define stop_emulating() __asm("clts") 114 115#else /* not __GNUC__ */ 116 117void fldcw __P((caddr_t addr)); 118void fnclex __P((void)); 119void fninit __P((void)); 120void fnop __P((void)); 121void fnsave __P((caddr_t addr)); 122void fnstcw __P((caddr_t addr)); 123void fnstsw __P((caddr_t addr)); 124void fp_divide_by_0 __P((void)); 125void frstor __P((caddr_t addr)); 126void start_emulating __P((void)); 127void stop_emulating __P((void)); 128 129#endif /* __GNUC__ */ 130 131typedef u_char bool_t; 132 133static int npxattach __P((struct isa_device *dvp)); 134static int npxprobe __P((struct isa_device *dvp)); 135static int npxprobe1 __P((struct isa_device *dvp)); 136static long timezero __P((const char *funcname, 137 void (*func)(void *buf, size_t len))); 138 139struct isa_driver npxdriver = { 140 npxprobe, npxattach, "npx", 141}; 142 143int hw_float; /* XXX currently just alias for npx_exists */ 144 145SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 146 CTLFLAG_RD, &hw_float, 0, 147 "Floatingpoint instructions executed in hardware"); 148 149static u_int npx0_imask = SWI_CLOCK_MASK; 150 151#ifndef SMP /* XXX per-cpu on smp */ 152struct proc *npxproc; 153#endif 154 155static bool_t npx_ex16; 156static bool_t npx_exists; 157static struct gate_descriptor npx_idt_probeintr; 158static int npx_intrno; 159static volatile u_int npx_intrs_while_probing; 160static bool_t npx_irq13; 161static volatile u_int npx_traps_while_probing; 162 163#ifndef SMP 164/* 165 * Special interrupt handlers. Someday intr0-intr15 will be used to count 166 * interrupts. We'll still need a special exception 16 handler. The busy 167 * latch stuff in probeintr() can be moved to npxprobe(). 168 */ 169inthand_t probeintr; 170 171asm 172(" 173 .text 174 .p2align 2,0x90 175" __XSTRING(CNAME(probeintr)) ": 176 ss 177 incl " __XSTRING(CNAME(npx_intrs_while_probing)) " 178 pushl %eax 179 movb $0x20,%al # EOI (asm in strings loses cpp features) 180 outb %al,$0xa0 # IO_ICU2 181 outb %al,$0x20 # IO_ICU1 182 movb $0,%al 183 outb %al,$0xf0 # clear BUSY# latch 184 popl %eax 185 iret 186"); 187 188inthand_t probetrap; 189asm 190(" 191 .text 192 .p2align 2,0x90 193" __XSTRING(CNAME(probetrap)) ": 194 ss 195 incl " __XSTRING(CNAME(npx_traps_while_probing)) " 196 fnclex 197 iret 198"); 199#endif /* SMP */ 200 201 202/* 203 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 204 * whether the device exists or not (XXX should be elsewhere). Set flags 205 * to tell npxattach() what to do. Modify device struct if npx doesn't 206 * need to use interrupts. Return 1 if device exists. 207 */ 208static int 209npxprobe(dvp) 210 struct isa_device *dvp; 211{ 212#ifdef SMP 213 214 return npxprobe1(dvp); 215 216#else /* SMP */ 217 218 int result; 219 u_long save_eflags; 220 u_char save_icu1_mask; 221 u_char save_icu2_mask; 222 struct gate_descriptor save_idt_npxintr; 223 struct gate_descriptor save_idt_npxtrap; 224 /* 225 * This routine is now just a wrapper for npxprobe1(), to install 226 * special npx interrupt and trap handlers, to enable npx interrupts 227 * and to disable other interrupts. Someday isa_configure() will 228 * install suitable handlers and run with interrupts enabled so we 229 * won't need to do so much here. 230 */ 231 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 232 save_eflags = read_eflags(); 233 disable_intr(); 234 save_icu1_mask = inb(IO_ICU1 + 1); 235 save_icu2_mask = inb(IO_ICU2 + 1); 236 save_idt_npxintr = idt[npx_intrno]; 237 save_idt_npxtrap = idt[16]; 238 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 239 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 240 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 241 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 242 npx_idt_probeintr = idt[npx_intrno]; 243 enable_intr(); 244 result = npxprobe1(dvp); 245 disable_intr(); 246 outb(IO_ICU1 + 1, save_icu1_mask); 247 outb(IO_ICU2 + 1, save_icu2_mask); 248 idt[npx_intrno] = save_idt_npxintr; 249 idt[16] = save_idt_npxtrap; 250 write_eflags(save_eflags); 251 return (result); 252 253#endif /* SMP */ 254} 255 256static int 257npxprobe1(dvp) 258 struct isa_device *dvp; 259{ 260 u_short control; 261 u_short status; 262 263 /* 264 * Partially reset the coprocessor, if any. Some BIOS's don't reset 265 * it after a warm boot. 266 */ 267 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 268 outb(0xf0, 0); /* clear BUSY# latch */ 269 /* 270 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 271 * instructions. We must set the CR0_MP bit and use the CR0_TS 272 * bit to control the trap, because setting the CR0_EM bit does 273 * not cause WAIT instructions to trap. It's important to trap 274 * WAIT instructions - otherwise the "wait" variants of no-wait 275 * control instructions would degenerate to the "no-wait" variants 276 * after FP context switches but work correctly otherwise. It's 277 * particularly important to trap WAITs when there is no NPX - 278 * otherwise the "wait" variants would always degenerate. 279 * 280 * Try setting CR0_NE to get correct error reporting on 486DX's. 281 * Setting it should fail or do nothing on lesser processors. 282 */ 283 load_cr0(rcr0() | CR0_MP | CR0_NE); 284 /* 285 * But don't trap while we're probing. 286 */ 287 stop_emulating(); 288 /* 289 * Finish resetting the coprocessor, if any. If there is an error 290 * pending, then we may get a bogus IRQ13, but probeintr() will handle 291 * it OK. Bogus halts have never been observed, but we enabled 292 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 293 */ 294 fninit(); 295 296#ifdef SMP 297 298 /* 299 * Exception 16 MUST work for SMP. 300 */ 301 npx_irq13 = 0; 302 npx_ex16 = hw_float = npx_exists = 1; 303 dvp->id_irq = 0; /* zap the interrupt */ 304 /* 305 * special return value to flag that we do not 306 * actually use any I/O registers 307 */ 308 return (-1); 309 310#else /* SMP */ 311 312 /* 313 * Don't use fwait here because it might hang. 314 * Don't use fnop here because it usually hangs if there is no FPU. 315 */ 316 DELAY(1000); /* wait for any IRQ13 */ 317#ifdef DIAGNOSTIC 318 if (npx_intrs_while_probing != 0) 319 printf("fninit caused %u bogus npx interrupt(s)\n", 320 npx_intrs_while_probing); 321 if (npx_traps_while_probing != 0) 322 printf("fninit caused %u bogus npx trap(s)\n", 323 npx_traps_while_probing); 324#endif 325 /* 326 * Check for a status of mostly zero. 327 */ 328 status = 0x5a5a; 329 fnstsw(&status); 330 if ((status & 0xb8ff) == 0) { 331 /* 332 * Good, now check for a proper control word. 333 */ 334 control = 0x5a5a; 335 fnstcw(&control); 336 if ((control & 0x1f3f) == 0x033f) { 337 hw_float = npx_exists = 1; 338 /* 339 * We have an npx, now divide by 0 to see if exception 340 * 16 works. 341 */ 342 control &= ~(1 << 2); /* enable divide by 0 trap */ 343 fldcw(&control); 344 npx_traps_while_probing = npx_intrs_while_probing = 0; 345 fp_divide_by_0(); 346 if (npx_traps_while_probing != 0) { 347 /* 348 * Good, exception 16 works. 349 */ 350 npx_ex16 = 1; 351 dvp->id_irq = 0; /* zap the interrupt */ 352 /* 353 * special return value to flag that we do not 354 * actually use any I/O registers 355 */ 356 return (-1); 357 } 358 if (npx_intrs_while_probing != 0) { 359 /* 360 * Bad, we are stuck with IRQ13. 361 */ 362 npx_irq13 = 1; 363 /* 364 * npxattach would be too late to set npx0_imask. 365 */ 366 npx0_imask |= dvp->id_irq; 367 return (IO_NPXSIZE); 368 } 369 /* 370 * Worse, even IRQ13 is broken. Use emulator. 371 */ 372 } 373 } 374 /* 375 * Probe failed, but we want to get to npxattach to initialize the 376 * emulator and say that it has been installed. XXX handle devices 377 * that aren't really devices better. 378 */ 379 dvp->id_irq = 0; 380 /* 381 * special return value to flag that we do not 382 * actually use any I/O registers 383 */ 384 return (-1); 385 386#endif /* SMP */ 387} 388 389/* 390 * Attach routine - announce which it is, and wire into system 391 */ 392int 393npxattach(dvp) 394 struct isa_device *dvp; 395{ 396 /* The caller has printed "irq 13" for the npx_irq13 case. */ 397 if (!npx_irq13) { 398 printf("npx%d: ", dvp->id_unit); 399 if (npx_ex16) 400 printf("INT 16 interface\n"); 401#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 402 else if (npx_exists) { 403 printf("error reporting broken; using 387 emulator\n"); 404 hw_float = npx_exists = 0; 405 } else 406 printf("387 emulator\n"); 407#else 408 else 409 printf("no 387 emulator in kernel!\n"); 410#endif 411 } 412 npxinit(__INITIAL_NPXCW__); 413 414#ifdef I586_CPU 415 if (cpu_class == CPUCLASS_586 && npx_ex16 && 416 timezero("i586_bzero()", i586_bzero) < 417 timezero("bzero()", bzero) * 4 / 5) { 418 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 419 bcopy_vector = i586_bcopy; 420 ovbcopy_vector = i586_bcopy; 421 } 422 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 423 bzero = i586_bzero; 424 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 425 copyin_vector = i586_copyin; 426 copyout_vector = i586_copyout; 427 } 428 } 429#endif 430 431 return (1); /* XXX unused */ 432} 433 434/* 435 * Initialize floating point unit. 436 */ 437void 438npxinit(control) 439 u_short control; 440{ 441 struct save87 dummy; 442 443 if (!npx_exists) 444 return; 445 /* 446 * fninit has the same h/w bugs as fnsave. Use the detoxified 447 * fnsave to throw away any junk in the fpu. npxsave() initializes 448 * the fpu and sets npxproc = NULL as important side effects. 449 */ 450 npxsave(&dummy); 451 stop_emulating(); 452 fldcw(&control); 453 if (curpcb != NULL) 454 fnsave(&curpcb->pcb_savefpu); 455 start_emulating(); 456} 457 458/* 459 * Free coprocessor (if we have it). 460 */ 461void 462npxexit(p) 463 struct proc *p; 464{ 465 466 if (p == npxproc) 467 npxsave(&curpcb->pcb_savefpu); 468#ifdef NPX_DEBUG 469 if (npx_exists) { 470 u_int masked_exceptions; 471 472 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 473 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 474 /* 475 * Log exceptions that would have trapped with the old 476 * control word (overflow, divide by 0, and invalid operand). 477 */ 478 if (masked_exceptions & 0x0d) 479 log(LOG_ERR, 480 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 481 p->p_pid, p->p_comm, masked_exceptions); 482 } 483#endif 484} 485 486/* 487 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 488 * 489 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 490 * depend on longjmp() restoring a usable state. Restoring the state 491 * or examining it might fail if we didn't clear exceptions. 492 * 493 * XXX there is no standard way to tell SIGFPE handlers about the error 494 * state. The old interface: 495 * 496 * void handler(int sig, int code, struct sigcontext *scp); 497 * 498 * is broken because it is non-ANSI and because the FP state is not in 499 * struct sigcontext. 500 * 501 * XXX the FP state is not preserved across signal handlers. So signal 502 * handlers cannot afford to do FP unless they preserve the state or 503 * longjmp() out. Both preserving the state and longjmp()ing may be 504 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 505 * solution for signals other than SIGFPE. 506 */ 507void 508npxintr(unit) 509 int unit; 510{ 511 int code; 512 struct intrframe *frame; 513 514 if (npxproc == NULL || !npx_exists) { 515 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 516 npxproc, curproc, npx_exists); 517 panic("npxintr from nowhere"); 518 } 519 if (npxproc != curproc) { 520 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 521 npxproc, curproc, npx_exists); 522 panic("npxintr from non-current process"); 523 } 524 525 outb(0xf0, 0); 526 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 527 fnclex(); 528 529 /* 530 * Pass exception to process. 531 */ 532 frame = (struct intrframe *)&unit; /* XXX */ 533 if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) { 534 /* 535 * Interrupt is essentially a trap, so we can afford to call 536 * the SIGFPE handler (if any) as soon as the interrupt 537 * returns. 538 * 539 * XXX little or nothing is gained from this, and plenty is 540 * lost - the interrupt frame has to contain the trap frame 541 * (this is otherwise only necessary for the rescheduling trap 542 * in doreti, and the frame for that could easily be set up 543 * just before it is used). 544 */ 545 curproc->p_md.md_regs = (struct trapframe *)&frame->if_es; 546#ifdef notyet 547 /* 548 * Encode the appropriate code for detailed information on 549 * this exception. 550 */ 551 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 552#else 553 code = 0; /* XXX */ 554#endif 555 trapsignal(curproc, SIGFPE, code); 556 } else { 557 /* 558 * Nested interrupt. These losers occur when: 559 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 560 * o immediately after an fnsave or frstor of an 561 * error state. 562 * o a couple of 386 instructions after 563 * "fstpl _memvar" causes a stack overflow. 564 * These are especially nasty when combined with a 565 * trace trap. 566 * o an IRQ13 occurs at the same time as another higher- 567 * priority interrupt. 568 * 569 * Treat them like a true async interrupt. 570 */ 571 psignal(curproc, SIGFPE); 572 } 573} 574 575/* 576 * Implement device not available (DNA) exception 577 * 578 * It would be better to switch FP context here (if curproc != npxproc) 579 * and not necessarily for every context switch, but it is too hard to 580 * access foreign pcb's. 581 */ 582int 583npxdna() 584{ 585 if (!npx_exists) 586 return (0); 587 if (npxproc != NULL) { 588 printf("npxdna: npxproc = %p, curproc = %p\n", 589 npxproc, curproc); 590 panic("npxdna"); 591 } 592 stop_emulating(); 593 /* 594 * Record new context early in case frstor causes an IRQ13. 595 */ 596 npxproc = curproc; 597 curpcb->pcb_savefpu.sv_ex_sw = 0; 598 /* 599 * The following frstor may cause an IRQ13 when the state being 600 * restored has a pending error. The error will appear to have been 601 * triggered by the current (npx) user instruction even when that 602 * instruction is a no-wait instruction that should not trigger an 603 * error (e.g., fnclex). On at least one 486 system all of the 604 * no-wait instructions are broken the same as frstor, so our 605 * treatment does not amplify the breakage. On at least one 606 * 386/Cyrix 387 system, fnclex works correctly while frstor and 607 * fnsave are broken, so our treatment breaks fnclex if it is the 608 * first FPU instruction after a context switch. 609 */ 610 frstor(&curpcb->pcb_savefpu); 611 612 return (1); 613} 614 615/* 616 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 617 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 618 * any IRQ13 to be handled immediately, and then ignore it. This routine is 619 * often called at splhigh so it must not use many system services. In 620 * particular, it's much easier to install a special handler than to 621 * guarantee that it's safe to use npxintr() and its supporting code. 622 */ 623void 624npxsave(addr) 625 struct save87 *addr; 626{ 627#ifdef SMP 628 629 stop_emulating(); 630 fnsave(addr); 631 /* fnop(); */ 632 start_emulating(); 633 npxproc = NULL; 634 635#else /* SMP */ 636 637 u_char icu1_mask; 638 u_char icu2_mask; 639 u_char old_icu1_mask; 640 u_char old_icu2_mask; 641 struct gate_descriptor save_idt_npxintr; 642 643 disable_intr(); 644 old_icu1_mask = inb(IO_ICU1 + 1); 645 old_icu2_mask = inb(IO_ICU2 + 1); 646 save_idt_npxintr = idt[npx_intrno]; 647 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 648 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 649 idt[npx_intrno] = npx_idt_probeintr; 650 enable_intr(); 651 stop_emulating(); 652 fnsave(addr); 653 fnop(); 654 start_emulating(); 655 npxproc = NULL; 656 disable_intr(); 657 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 658 icu2_mask = inb(IO_ICU2 + 1); 659 outb(IO_ICU1 + 1, 660 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 661 outb(IO_ICU2 + 1, 662 (icu2_mask & ~(npx0_imask >> 8)) 663 | (old_icu2_mask & (npx0_imask >> 8))); 664 idt[npx_intrno] = save_idt_npxintr; 665 enable_intr(); /* back to usual state */ 666 667#endif /* SMP */ 668} 669 670#ifdef I586_CPU 671static long 672timezero(funcname, func) 673 const char *funcname; 674 void (*func) __P((void *buf, size_t len)); 675 676{ 677 void *buf; 678#define BUFSIZE 1000000 679 long usec; 680 struct timeval finish, start; 681 682 buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT); 683 if (buf == NULL) 684 return (BUFSIZE); 685 microtime(&start); 686 (*func)(buf, BUFSIZE); 687 microtime(&finish); 688 usec = 1000000 * (finish.tv_sec - start.tv_sec) + 689 finish.tv_usec - start.tv_usec; 690 if (usec <= 0) 691 usec = 1; 692 if (bootverbose) 693 printf("%s bandwidth = %ld bytes/sec\n", 694 funcname, (long)(BUFSIZE * 1000000ll / usec)); 695 free(buf, M_TEMP); 696 return (usec); 697} 698#endif /* I586_CPU */ 699 700#endif /* NNPX > 0 */ 701