fpu.c revision 32929
1/*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.54 1997/11/18 11:32:31 bde Exp $ 36 */ 37 38#include "npx.h" 39#if NNPX > 0 40 41#include "opt_debug_npx.h" 42#include "opt_math_emulate.h" 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/kernel.h> 47#include <sys/sysctl.h> 48#include <sys/conf.h> 49#include <sys/proc.h> 50#ifdef NPX_DEBUG 51#include <sys/syslog.h> 52#endif 53#include <sys/signalvar.h> 54 55#ifndef SMP 56#include <machine/asmacros.h> 57#endif 58#include <machine/cputypes.h> 59#include <machine/frame.h> 60#include <machine/ipl.h> 61#ifndef SMP 62#include <machine/md_var.h> 63#endif 64#include <machine/pcb.h> 65#include <machine/psl.h> 66#ifndef SMP 67#include <machine/clock.h> 68#endif 69#include <machine/specialreg.h> 70#include <machine/segments.h> 71 72#ifndef SMP 73#include <i386/isa/icu.h> 74#include <i386/isa/intr_machdep.h> 75#include <i386/isa/isa.h> 76#endif 77#include <i386/isa/isa_device.h> 78 79/* 80 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 81 */ 82 83/* Configuration flags. */ 84#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 85#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 86#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 87 88/* XXX - should be in header file. */ 89extern void (*bcopy_vector) __P((const void *from, void *to, size_t len)); 90extern void (*ovbcopy_vector) __P((const void *from, void *to, size_t len)); 91extern int (*copyin_vector) __P((const void *udaddr, void *kaddr, size_t len)); 92extern int (*copyout_vector) __P((const void *kaddr, void *udaddr, size_t len)); 93 94void i586_bcopy __P((const void *from, void *to, size_t len)); 95void i586_bzero __P((void *buf, size_t len)); 96int i586_copyin __P((const void *udaddr, void *kaddr, size_t len)); 97int i586_copyout __P((const void *kaddr, void *udaddr, size_t len)); 98 99#ifdef __GNUC__ 100 101#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 102#define fnclex() __asm("fnclex") 103#define fninit() __asm("fninit") 104#define fnop() __asm("fnop") 105#define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr))) 106#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr))) 107#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr))) 108#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 109#define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 110#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 111 : : "n" (CR0_TS) : "ax") 112#define stop_emulating() __asm("clts") 113 114#else /* not __GNUC__ */ 115 116void fldcw __P((caddr_t addr)); 117void fnclex __P((void)); 118void fninit __P((void)); 119void fnop __P((void)); 120void fnsave __P((caddr_t addr)); 121void fnstcw __P((caddr_t addr)); 122void fnstsw __P((caddr_t addr)); 123void fp_divide_by_0 __P((void)); 124void frstor __P((caddr_t addr)); 125void start_emulating __P((void)); 126void stop_emulating __P((void)); 127 128#endif /* __GNUC__ */ 129 130typedef u_char bool_t; 131 132static int npxattach __P((struct isa_device *dvp)); 133static int npxprobe __P((struct isa_device *dvp)); 134static int npxprobe1 __P((struct isa_device *dvp)); 135 136struct isa_driver npxdriver = { 137 npxprobe, npxattach, "npx", 138}; 139 140int hw_float; /* XXX currently just alias for npx_exists */ 141 142SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 143 CTLFLAG_RD, &hw_float, 0, 144 "Floatingpoint instructions executed in hardware"); 145 146static u_int npx0_imask = SWI_CLOCK_MASK; 147 148#ifndef SMP /* XXX per-cpu on smp */ 149struct proc *npxproc; 150#endif 151 152static bool_t npx_ex16; 153static bool_t npx_exists; 154static struct gate_descriptor npx_idt_probeintr; 155static int npx_intrno; 156static volatile u_int npx_intrs_while_probing; 157static bool_t npx_irq13; 158static volatile u_int npx_traps_while_probing; 159 160#ifndef SMP 161/* 162 * Special interrupt handlers. Someday intr0-intr15 will be used to count 163 * interrupts. We'll still need a special exception 16 handler. The busy 164 * latch stuff in probeintr() can be moved to npxprobe(). 165 */ 166inthand_t probeintr; 167 168asm 169(" 170 .text 171 .p2align 2,0x90 172" __XSTRING(CNAME(probeintr)) ": 173 ss 174 incl " __XSTRING(CNAME(npx_intrs_while_probing)) " 175 pushl %eax 176 movb $0x20,%al # EOI (asm in strings loses cpp features) 177 outb %al,$0xa0 # IO_ICU2 178 outb %al,$0x20 # IO_ICU1 179 movb $0,%al 180 outb %al,$0xf0 # clear BUSY# latch 181 popl %eax 182 iret 183"); 184 185inthand_t probetrap; 186asm 187(" 188 .text 189 .p2align 2,0x90 190" __XSTRING(CNAME(probetrap)) ": 191 ss 192 incl " __XSTRING(CNAME(npx_traps_while_probing)) " 193 fnclex 194 iret 195"); 196#endif /* SMP */ 197 198 199/* 200 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 201 * whether the device exists or not (XXX should be elsewhere). Set flags 202 * to tell npxattach() what to do. Modify device struct if npx doesn't 203 * need to use interrupts. Return 1 if device exists. 204 */ 205static int 206npxprobe(dvp) 207 struct isa_device *dvp; 208{ 209#ifdef SMP 210 211 return npxprobe1(dvp); 212 213#else /* SMP */ 214 215 int result; 216 u_long save_eflags; 217 u_char save_icu1_mask; 218 u_char save_icu2_mask; 219 struct gate_descriptor save_idt_npxintr; 220 struct gate_descriptor save_idt_npxtrap; 221 /* 222 * This routine is now just a wrapper for npxprobe1(), to install 223 * special npx interrupt and trap handlers, to enable npx interrupts 224 * and to disable other interrupts. Someday isa_configure() will 225 * install suitable handlers and run with interrupts enabled so we 226 * won't need to do so much here. 227 */ 228 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 229 save_eflags = read_eflags(); 230 disable_intr(); 231 save_icu1_mask = inb(IO_ICU1 + 1); 232 save_icu2_mask = inb(IO_ICU2 + 1); 233 save_idt_npxintr = idt[npx_intrno]; 234 save_idt_npxtrap = idt[16]; 235 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 236 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 237 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 238 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 239 npx_idt_probeintr = idt[npx_intrno]; 240 enable_intr(); 241 result = npxprobe1(dvp); 242 disable_intr(); 243 outb(IO_ICU1 + 1, save_icu1_mask); 244 outb(IO_ICU2 + 1, save_icu2_mask); 245 idt[npx_intrno] = save_idt_npxintr; 246 idt[16] = save_idt_npxtrap; 247 write_eflags(save_eflags); 248 return (result); 249 250#endif /* SMP */ 251} 252 253static int 254npxprobe1(dvp) 255 struct isa_device *dvp; 256{ 257 u_short control; 258 u_short status; 259 260 /* 261 * Partially reset the coprocessor, if any. Some BIOS's don't reset 262 * it after a warm boot. 263 */ 264 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 265 outb(0xf0, 0); /* clear BUSY# latch */ 266 /* 267 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 268 * instructions. We must set the CR0_MP bit and use the CR0_TS 269 * bit to control the trap, because setting the CR0_EM bit does 270 * not cause WAIT instructions to trap. It's important to trap 271 * WAIT instructions - otherwise the "wait" variants of no-wait 272 * control instructions would degenerate to the "no-wait" variants 273 * after FP context switches but work correctly otherwise. It's 274 * particularly important to trap WAITs when there is no NPX - 275 * otherwise the "wait" variants would always degenerate. 276 * 277 * Try setting CR0_NE to get correct error reporting on 486DX's. 278 * Setting it should fail or do nothing on lesser processors. 279 */ 280 load_cr0(rcr0() | CR0_MP | CR0_NE); 281 /* 282 * But don't trap while we're probing. 283 */ 284 stop_emulating(); 285 /* 286 * Finish resetting the coprocessor, if any. If there is an error 287 * pending, then we may get a bogus IRQ13, but probeintr() will handle 288 * it OK. Bogus halts have never been observed, but we enabled 289 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 290 */ 291 fninit(); 292 293#ifdef SMP 294 295 /* 296 * Exception 16 MUST work for SMP. 297 */ 298 npx_irq13 = 0; 299 npx_ex16 = hw_float = npx_exists = 1; 300 dvp->id_irq = 0; /* zap the interrupt */ 301 /* 302 * special return value to flag that we do not 303 * actually use any I/O registers 304 */ 305 return (-1); 306 307#else /* SMP */ 308 309 /* 310 * Don't use fwait here because it might hang. 311 * Don't use fnop here because it usually hangs if there is no FPU. 312 */ 313 DELAY(1000); /* wait for any IRQ13 */ 314#ifdef DIAGNOSTIC 315 if (npx_intrs_while_probing != 0) 316 printf("fninit caused %u bogus npx interrupt(s)\n", 317 npx_intrs_while_probing); 318 if (npx_traps_while_probing != 0) 319 printf("fninit caused %u bogus npx trap(s)\n", 320 npx_traps_while_probing); 321#endif 322 /* 323 * Check for a status of mostly zero. 324 */ 325 status = 0x5a5a; 326 fnstsw(&status); 327 if ((status & 0xb8ff) == 0) { 328 /* 329 * Good, now check for a proper control word. 330 */ 331 control = 0x5a5a; 332 fnstcw(&control); 333 if ((control & 0x1f3f) == 0x033f) { 334 hw_float = npx_exists = 1; 335 /* 336 * We have an npx, now divide by 0 to see if exception 337 * 16 works. 338 */ 339 control &= ~(1 << 2); /* enable divide by 0 trap */ 340 fldcw(&control); 341 npx_traps_while_probing = npx_intrs_while_probing = 0; 342 fp_divide_by_0(); 343 if (npx_traps_while_probing != 0) { 344 /* 345 * Good, exception 16 works. 346 */ 347 npx_ex16 = 1; 348 dvp->id_irq = 0; /* zap the interrupt */ 349 /* 350 * special return value to flag that we do not 351 * actually use any I/O registers 352 */ 353 return (-1); 354 } 355 if (npx_intrs_while_probing != 0) { 356 /* 357 * Bad, we are stuck with IRQ13. 358 */ 359 npx_irq13 = 1; 360 /* 361 * npxattach would be too late to set npx0_imask. 362 */ 363 npx0_imask |= dvp->id_irq; 364 return (IO_NPXSIZE); 365 } 366 /* 367 * Worse, even IRQ13 is broken. Use emulator. 368 */ 369 } 370 } 371 /* 372 * Probe failed, but we want to get to npxattach to initialize the 373 * emulator and say that it has been installed. XXX handle devices 374 * that aren't really devices better. 375 */ 376 dvp->id_irq = 0; 377 /* 378 * special return value to flag that we do not 379 * actually use any I/O registers 380 */ 381 return (-1); 382 383#endif /* SMP */ 384} 385 386/* 387 * Attach routine - announce which it is, and wire into system 388 */ 389int 390npxattach(dvp) 391 struct isa_device *dvp; 392{ 393 /* The caller has printed "irq 13" for the npx_irq13 case. */ 394 if (!npx_irq13) { 395 printf("npx%d: ", dvp->id_unit); 396 if (npx_ex16) 397 printf("INT 16 interface\n"); 398#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 399 else if (npx_exists) { 400 printf("error reporting broken; using 387 emulator\n"); 401 hw_float = npx_exists = 0; 402 } else 403 printf("387 emulator\n"); 404#else 405 else 406 printf("no 387 emulator in kernel!\n"); 407#endif 408 } 409 npxinit(__INITIAL_NPXCW__); 410 411#if defined(I586_CPU) 412 if (cpu_class == CPUCLASS_586 && npx_ex16) { 413 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 414 bcopy_vector = i586_bcopy; 415 ovbcopy_vector = i586_bcopy; 416 } 417 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 418 bzero = i586_bzero; 419 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 420 copyin_vector = i586_copyin; 421 copyout_vector = i586_copyout; 422 } 423 } 424#endif 425 426 return (1); /* XXX unused */ 427} 428 429/* 430 * Initialize floating point unit. 431 */ 432void 433npxinit(control) 434 u_short control; 435{ 436 struct save87 dummy; 437 438 if (!npx_exists) 439 return; 440 /* 441 * fninit has the same h/w bugs as fnsave. Use the detoxified 442 * fnsave to throw away any junk in the fpu. npxsave() initializes 443 * the fpu and sets npxproc = NULL as important side effects. 444 */ 445 npxsave(&dummy); 446 stop_emulating(); 447 fldcw(&control); 448 if (curpcb != NULL) 449 fnsave(&curpcb->pcb_savefpu); 450 start_emulating(); 451} 452 453/* 454 * Free coprocessor (if we have it). 455 */ 456void 457npxexit(p) 458 struct proc *p; 459{ 460 461 if (p == npxproc) 462 npxsave(&curpcb->pcb_savefpu); 463#ifdef NPX_DEBUG 464 if (npx_exists) { 465 u_int masked_exceptions; 466 467 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 468 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 469 /* 470 * Log exceptions that would have trapped with the old 471 * control word (overflow, divide by 0, and invalid operand). 472 */ 473 if (masked_exceptions & 0x0d) 474 log(LOG_ERR, 475 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 476 p->p_pid, p->p_comm, masked_exceptions); 477 } 478#endif 479} 480 481/* 482 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 483 * 484 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 485 * depend on longjmp() restoring a usable state. Restoring the state 486 * or examining it might fail if we didn't clear exceptions. 487 * 488 * XXX there is no standard way to tell SIGFPE handlers about the error 489 * state. The old interface: 490 * 491 * void handler(int sig, int code, struct sigcontext *scp); 492 * 493 * is broken because it is non-ANSI and because the FP state is not in 494 * struct sigcontext. 495 * 496 * XXX the FP state is not preserved across signal handlers. So signal 497 * handlers cannot afford to do FP unless they preserve the state or 498 * longjmp() out. Both preserving the state and longjmp()ing may be 499 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 500 * solution for signals other than SIGFPE. 501 */ 502void 503npxintr(unit) 504 int unit; 505{ 506 int code; 507 struct intrframe *frame; 508 509 if (npxproc == NULL || !npx_exists) { 510 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 511 npxproc, curproc, npx_exists); 512 panic("npxintr from nowhere"); 513 } 514 if (npxproc != curproc) { 515 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 516 npxproc, curproc, npx_exists); 517 panic("npxintr from non-current process"); 518 } 519 520 outb(0xf0, 0); 521 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 522 fnclex(); 523 fnop(); 524 525 /* 526 * Pass exception to process. 527 */ 528 frame = (struct intrframe *)&unit; /* XXX */ 529 if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) { 530 /* 531 * Interrupt is essentially a trap, so we can afford to call 532 * the SIGFPE handler (if any) as soon as the interrupt 533 * returns. 534 * 535 * XXX little or nothing is gained from this, and plenty is 536 * lost - the interrupt frame has to contain the trap frame 537 * (this is otherwise only necessary for the rescheduling trap 538 * in doreti, and the frame for that could easily be set up 539 * just before it is used). 540 */ 541 curproc->p_md.md_regs = (struct trapframe *)&frame->if_es; 542#ifdef notyet 543 /* 544 * Encode the appropriate code for detailed information on 545 * this exception. 546 */ 547 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 548#else 549 code = 0; /* XXX */ 550#endif 551 trapsignal(curproc, SIGFPE, code); 552 } else { 553 /* 554 * Nested interrupt. These losers occur when: 555 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 556 * o immediately after an fnsave or frstor of an 557 * error state. 558 * o a couple of 386 instructions after 559 * "fstpl _memvar" causes a stack overflow. 560 * These are especially nasty when combined with a 561 * trace trap. 562 * o an IRQ13 occurs at the same time as another higher- 563 * priority interrupt. 564 * 565 * Treat them like a true async interrupt. 566 */ 567 psignal(curproc, SIGFPE); 568 } 569} 570 571/* 572 * Implement device not available (DNA) exception 573 * 574 * It would be better to switch FP context here (if curproc != npxproc) 575 * and not necessarily for every context switch, but it is too hard to 576 * access foreign pcb's. 577 */ 578int 579npxdna() 580{ 581 if (!npx_exists) 582 return (0); 583 if (npxproc != NULL) { 584 printf("npxdna: npxproc = %p, curproc = %p\n", 585 npxproc, curproc); 586 panic("npxdna"); 587 } 588 stop_emulating(); 589 /* 590 * Record new context early in case frstor causes an IRQ13. 591 */ 592 npxproc = curproc; 593 curpcb->pcb_savefpu.sv_ex_sw = 0; 594 /* 595 * The following frstor may cause an IRQ13 when the state being 596 * restored has a pending error. The error will appear to have been 597 * triggered by the current (npx) user instruction even when that 598 * instruction is a no-wait instruction that should not trigger an 599 * error (e.g., fnclex). On at least one 486 system all of the 600 * no-wait instructions are broken the same as frstor, so our 601 * treatment does not amplify the breakage. On at least one 602 * 386/Cyrix 387 system, fnclex works correctly while frstor and 603 * fnsave are broken, so our treatment breaks fnclex if it is the 604 * first FPU instruction after a context switch. 605 */ 606 frstor(&curpcb->pcb_savefpu); 607 608 return (1); 609} 610 611/* 612 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 613 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 614 * any IRQ13 to be handled immediately, and then ignore it. This routine is 615 * often called at splhigh so it must not use many system services. In 616 * particular, it's much easier to install a special handler than to 617 * guarantee that it's safe to use npxintr() and its supporting code. 618 */ 619void 620npxsave(addr) 621 struct save87 *addr; 622{ 623#ifdef SMP 624 625 stop_emulating(); 626 fnsave(addr); 627 /* fnop(); */ 628 start_emulating(); 629 npxproc = NULL; 630 631#else /* SMP */ 632 633 u_char icu1_mask; 634 u_char icu2_mask; 635 u_char old_icu1_mask; 636 u_char old_icu2_mask; 637 struct gate_descriptor save_idt_npxintr; 638 639 disable_intr(); 640 old_icu1_mask = inb(IO_ICU1 + 1); 641 old_icu2_mask = inb(IO_ICU2 + 1); 642 save_idt_npxintr = idt[npx_intrno]; 643 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 644 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 645 idt[npx_intrno] = npx_idt_probeintr; 646 enable_intr(); 647 stop_emulating(); 648 fnsave(addr); 649 fnop(); 650 start_emulating(); 651 npxproc = NULL; 652 disable_intr(); 653 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 654 icu2_mask = inb(IO_ICU2 + 1); 655 outb(IO_ICU1 + 1, 656 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 657 outb(IO_ICU2 + 1, 658 (icu2_mask & ~(npx0_imask >> 8)) 659 | (old_icu2_mask & (npx0_imask >> 8))); 660 idt[npx_intrno] = save_idt_npxintr; 661 enable_intr(); /* back to usual state */ 662 663#endif /* SMP */ 664} 665 666#endif /* NNPX > 0 */ 667