acpi_wakecode.S revision 210777
1189903Sjkim/*-
2189903Sjkim * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
3189903Sjkim * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
4189903Sjkim * Copyright (c) 2003 Peter Wemm
5210777Sjkim * Copyright (c) 2008-2010 Jung-uk Kim <jkim@FreeBSD.org>
6189903Sjkim * All rights reserved.
7189903Sjkim *
8189903Sjkim * Redistribution and use in source and binary forms, with or without
9189903Sjkim * modification, are permitted provided that the following conditions
10189903Sjkim * are met:
11189903Sjkim * 1. Redistributions of source code must retain the above copyright
12189903Sjkim *    notice, this list of conditions and the following disclaimer.
13189903Sjkim * 2. Redistributions in binary form must reproduce the above copyright
14189903Sjkim *    notice, this list of conditions and the following disclaimer in the
15189903Sjkim *    documentation and/or other materials provided with the distribution.
16189903Sjkim *
17189903Sjkim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18189903Sjkim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19189903Sjkim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20189903Sjkim * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21189903Sjkim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22189903Sjkim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23189903Sjkim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24189903Sjkim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25189903Sjkim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26189903Sjkim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27189903Sjkim * SUCH DAMAGE.
28189903Sjkim *
29189903Sjkim * $FreeBSD: head/sys/amd64/acpica/acpi_wakecode.S 210777 2010-08-02 17:35:00Z jkim $
30189903Sjkim */
31189903Sjkim
32189903Sjkim#include <machine/asmacros.h>
33189903Sjkim#include <machine/specialreg.h>
34189903Sjkim
35189903Sjkim#include "assym.s"
36189903Sjkim
37189903Sjkim/*
38189903Sjkim * Resume entry point for real mode.
39189903Sjkim *
40189903Sjkim * If XFirmwareWakingVector is zero and FirmwareWakingVector is non-zero
41189903Sjkim * in FACS, the BIOS enters here in real mode after POST with CS set to
42189903Sjkim * (FirmwareWakingVector >> 4) and IP set to (FirmwareWakingVector & 0xf).
43189903Sjkim * Depending on the previous sleep state, we may need to initialize more
44189903Sjkim * of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk).
45189903Sjkim *
46189903Sjkim * Note: If XFirmwareWakingVector is non-zero, it should disable address
47189903Sjkim * translation/paging and interrupts, load all segment registers with
48189903Sjkim * a flat 4 GB address space, and set EFLAGS.IF to zero.  Currently
49189903Sjkim * this mode is not supported by this code.
50189903Sjkim */
51189903Sjkim
52189903Sjkim	.data				/* So we can modify it */
53189903Sjkim
54189903Sjkim	ALIGN_TEXT
55197863Sjkim	.code16
56189903Sjkimwakeup_start:
57189903Sjkim	/*
58189903Sjkim	 * Set up segment registers for real mode, a small stack for
59189903Sjkim	 * any calls we make, and clear any flags.
60189903Sjkim	 */
61189903Sjkim	cli				/* make sure no interrupts */
62189903Sjkim	mov	%cs, %ax		/* copy %cs to %ds.  Remember these */
63189903Sjkim	mov	%ax, %ds		/* are offsets rather than selectors */
64189903Sjkim	mov	%ax, %ss
65197863Sjkim	movw	$PAGE_SIZE, %sp
66190341Sjkim	xorw	%ax, %ax
67190341Sjkim	pushw	%ax
68189903Sjkim	popfw
69189903Sjkim
70189903Sjkim	/* To debug resume hangs, beep the speaker if the user requested. */
71190341Sjkim	testb	$~0, resume_beep - wakeup_start
72190341Sjkim	jz	1f
73190341Sjkim	movb	$0, resume_beep - wakeup_start
74189903Sjkim	movb	$0xc0, %al
75189903Sjkim	outb	%al, $0x42
76189903Sjkim	movb	$0x04, %al
77189903Sjkim	outb	%al, $0x42
78189903Sjkim	inb	$0x61, %al
79189903Sjkim	orb	$0x3, %al
80189903Sjkim	outb	%al, $0x61
81189903Sjkim1:
82189903Sjkim
83189903Sjkim	/* Re-initialize video BIOS if the reset_video tunable is set. */
84190341Sjkim	testb	$~0, reset_video - wakeup_start
85190341Sjkim	jz	1f
86190341Sjkim	movb	$0, reset_video - wakeup_start
87189903Sjkim	lcall	$0xc000, $3
88189903Sjkim
89198422Sjkim	/* When we reach here, int 0x10 should be ready.  Hide cursor. */
90198422Sjkim	movb	$0x01, %ah
91198422Sjkim	movb	$0x20, %ch
92198422Sjkim	int	$0x10
93198422Sjkim
94190341Sjkim	/* Re-start in case the previous BIOS call clobbers them. */
95190341Sjkim	jmp	wakeup_start
96189903Sjkim1:
97189903Sjkim
98189903Sjkim	/*
99189903Sjkim	 * Find relocation base and patch the gdt descript and ljmp targets
100189903Sjkim	 */
101189903Sjkim	xorl	%ebx, %ebx
102189903Sjkim	mov	%cs, %bx
103189903Sjkim	sall	$4, %ebx		/* %ebx is now our relocation base */
104189903Sjkim
105189903Sjkim	/*
106189903Sjkim	 * Load the descriptor table pointer.  We'll need it when running
107189903Sjkim	 * in 16-bit protected mode.
108189903Sjkim	 */
109189903Sjkim	lgdtl	bootgdtdesc - wakeup_start
110189903Sjkim
111189903Sjkim	/* Enable protected mode */
112189903Sjkim	movl	$CR0_PE, %eax
113189903Sjkim	mov	%eax, %cr0
114189903Sjkim
115189903Sjkim	/*
116189903Sjkim	 * Now execute a far jump to turn on protected mode.  This
117189903Sjkim	 * causes the segment registers to turn into selectors and causes
118189903Sjkim	 * %cs to be loaded from the gdt.
119189903Sjkim	 *
120189903Sjkim	 * The following instruction is:
121189903Sjkim	 * ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start
122189903Sjkim	 * but gas cannot assemble that.  And besides, we patch the targets
123189903Sjkim	 * in early startup and its a little clearer what we are patching.
124189903Sjkim	 */
125189903Sjkimwakeup_sw32:
126189903Sjkim	.byte	0x66			/* size override to 32 bits */
127189903Sjkim	.byte	0xea			/* opcode for far jump */
128189903Sjkim	.long	wakeup_32 - wakeup_start /* offset in segment */
129189903Sjkim	.word	bootcode32 - bootgdt	/* index in gdt for 32 bit code */
130189903Sjkim
131189903Sjkim	/*
132189903Sjkim	 * At this point, we are running in 32 bit legacy protected mode.
133189903Sjkim	 */
134197863Sjkim	ALIGN_TEXT
135189903Sjkim	.code32
136189903Sjkimwakeup_32:
137189903Sjkim
138189903Sjkim	mov	$bootdata32 - bootgdt, %eax
139189903Sjkim	mov	%ax, %ds
140189903Sjkim
141189903Sjkim	/* Turn on the PAE and PSE bits for when paging is enabled */
142189903Sjkim	mov	%cr4, %eax
143189903Sjkim	orl	$(CR4_PAE | CR4_PSE), %eax
144189903Sjkim	mov	%eax, %cr4
145189903Sjkim
146189903Sjkim	/*
147189903Sjkim	 * Enable EFER.LME so that we get long mode when all the prereqs are
148189903Sjkim	 * in place.  In this case, it turns on when CR0_PG is finally enabled.
149189903Sjkim	 * Pick up a few other EFER bits that we'll use need we're here.
150189903Sjkim	 */
151189903Sjkim	movl	$MSR_EFER, %ecx
152189903Sjkim	rdmsr
153189903Sjkim	orl	$EFER_LME | EFER_SCE, %eax
154189903Sjkim	wrmsr
155189903Sjkim
156189903Sjkim	/*
157189903Sjkim	 * Point to the embedded page tables for startup.  Note that this
158189903Sjkim	 * only gets accessed after we're actually in 64 bit mode, however
159189903Sjkim	 * we can only set the bottom 32 bits of %cr3 in this state.  This
160189903Sjkim	 * means we are required to use a temporary page table that is below
161189903Sjkim	 * the 4GB limit.  %ebx is still our relocation base.  We could just
162189903Sjkim	 * subtract 3 * PAGE_SIZE, but that would be too easy.
163189903Sjkim	 */
164189903Sjkim	leal	wakeup_pagetables - wakeup_start(%ebx), %eax
165189903Sjkim	movl	(%eax), %eax
166189903Sjkim	mov	%eax, %cr3
167189903Sjkim
168189903Sjkim	/*
169189903Sjkim	 * Finally, switch to long bit mode by enabling paging.  We have
170189903Sjkim	 * to be very careful here because all the segmentation disappears
171189903Sjkim	 * out from underneath us.  The spec says we can depend on the
172189903Sjkim	 * subsequent pipelined branch to execute, but *only if* everthing
173189903Sjkim	 * is still identity mapped.  If any mappings change, the pipeline
174189903Sjkim	 * will flush.
175189903Sjkim	 */
176189903Sjkim	mov	%cr0, %eax
177189903Sjkim	orl	$CR0_PG, %eax
178189903Sjkim	mov	%eax, %cr0
179189903Sjkim
180189903Sjkim	/*
181189903Sjkim	 * At this point paging is enabled, and we are in "compatability" mode.
182189903Sjkim	 * We do another far jump to reload %cs with the 64 bit selector.
183189903Sjkim	 * %cr3 points to a 4-level page table page.
184189903Sjkim	 * We cannot yet jump all the way to the kernel because we can only
185189903Sjkim	 * specify a 32 bit linear address.  So, yet another trampoline.
186189903Sjkim	 *
187189903Sjkim	 * The following instruction is:
188189903Sjkim	 * ljmp $bootcode64 - bootgdt, $wakeup_64 - wakeup_start
189189903Sjkim	 * but gas cannot assemble that.  And besides, we patch the targets
190189903Sjkim	 * in early startup and its a little clearer what we are patching.
191189903Sjkim	 */
192189903Sjkimwakeup_sw64:
193189903Sjkim	.byte	0xea			/* opcode for far jump */
194189903Sjkim	.long	wakeup_64 - wakeup_start /* offset in segment */
195189903Sjkim	.word	bootcode64 - bootgdt	/* index in gdt for 64 bit code */
196189903Sjkim
197189903Sjkim	/*
198189903Sjkim	 * Yeehar!  We're running in 64-bit mode!  We can mostly ignore our
199189903Sjkim	 * segment registers, and get on with it.
200189903Sjkim	 * Note that we are running at the correct virtual address, but with
201189903Sjkim	 * a 1:1 1GB mirrored mapping over entire address space.  We had better
202189903Sjkim	 * switch to a real %cr3 promptly so that we can get to the direct map
203189903Sjkim	 * space. Remember that jmp is relative and that we've been relocated,
204189903Sjkim	 * so use an indirect jump.
205189903Sjkim	 */
206190341Sjkim	ALIGN_TEXT
207189903Sjkim	.code64
208189903Sjkimwakeup_64:
209189903Sjkim	mov	$bootdata64 - bootgdt, %eax
210189903Sjkim	mov	%ax, %ds
211189903Sjkim
212189903Sjkim	/* Restore arguments and return. */
213189903Sjkim	movq	wakeup_ctx - wakeup_start(%rbx), %rdi
214189903Sjkim	movq	wakeup_kpml4 - wakeup_start(%rbx), %rsi
215189903Sjkim	movq	wakeup_retaddr - wakeup_start(%rbx), %rax
216189903Sjkim	jmp	*%rax
217189903Sjkim
218190341Sjkim	.data
219190341Sjkim
220190341Sjkimresume_beep:
221190341Sjkim	.byte	0
222190341Sjkimreset_video:
223190341Sjkim	.byte	0
224190341Sjkim
225189903Sjkim	ALIGN_DATA
226189903Sjkimbootgdt:
227189903Sjkim	.long	0x00000000
228189903Sjkim	.long	0x00000000
229190635Sjkim	.long	0x00000000
230190635Sjkim	.long	0x00000000
231190635Sjkim	.long	0x00000000
232190635Sjkim	.long	0x00000000
233190635Sjkim	.long	0x00000000
234190635Sjkim	.long	0x00000000
235189903Sjkim
236189903Sjkimbootcode64:
237189903Sjkim	.long	0x0000ffff
238189903Sjkim	.long	0x00af9b00
239189903Sjkim
240189903Sjkimbootdata64:
241189903Sjkim	.long	0x0000ffff
242189903Sjkim	.long	0x00af9300
243189903Sjkim
244189903Sjkimbootcode32:
245189903Sjkim	.long	0x0000ffff
246189903Sjkim	.long	0x00cf9b00
247189903Sjkim
248189903Sjkimbootdata32:
249189903Sjkim	.long	0x0000ffff
250189903Sjkim	.long	0x00cf9300
251189903Sjkimbootgdtend:
252189903Sjkim
253189903Sjkimwakeup_pagetables:
254189903Sjkim	.long	0
255189903Sjkim
256189903Sjkimbootgdtdesc:
257189903Sjkim	.word	bootgdtend - bootgdt	/* Length */
258189903Sjkim	.long	bootgdt - wakeup_start	/* Offset plus %ds << 4 */
259189903Sjkim
260189903Sjkim	ALIGN_DATA
261189903Sjkimwakeup_retaddr:
262189903Sjkim	.quad	0
263189903Sjkimwakeup_kpml4:
264189903Sjkim	.quad	0
265189903Sjkim
266189903Sjkimwakeup_ctx:
267189903Sjkim	.quad	0
268210777Sjkimwakeup_pcb:
269189903Sjkim	.quad	0
270189903Sjkimwakeup_gdt:
271189903Sjkim	.word	0
272189903Sjkim	.quad	0
273190635Sjkim
274190635Sjkim	ALIGN_DATA
275189903Sjkimwakeup_efer:
276189903Sjkim	.quad	0
277189903Sjkimwakeup_pat:
278189903Sjkim	.quad	0
279189903Sjkimwakeup_star:
280189903Sjkim	.quad	0
281189903Sjkimwakeup_lstar:
282189903Sjkim	.quad	0
283189903Sjkimwakeup_cstar:
284189903Sjkim	.quad	0
285189903Sjkimwakeup_sfmask:
286189903Sjkim	.quad	0
287189903Sjkimwakeup_cpu:
288189903Sjkim	.long	0
289189903Sjkimdummy:
290