loader.ldscript revision 329145
1/*- 2 * Copyright (c) 2011-2014 Robert N. M. Watson 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: stable/11/stand/mips/beri/loader/loader.ldscript 329099 2018-02-10 04:37:44Z kevans $ 31 */ 32 33INCLUDE ../common/common.ldscript 34 35/* 36 * Location where loader will execute. 37 */ 38__loader_base__ = 0x20000; 39__loader_base_vaddr__ = __mips64_xkphys_cached__ + __loader_base__; 40 41/* 42 * Highest address the loader is allowed to use below the kernel. 43 */ 44__loader_end__ = 0x100000; 45__loader_end_vaddr__ = __mips64_xkphys_cached__ + __loader_end__; 46 47OUTPUT_ARCH(mips) 48ENTRY(start) 49SECTIONS 50{ 51 /* 52 * We rely on boot2 having (a) configured a stack, and (b) loaded us 53 * to an appropriate bit of physical/virtual memory such that no 54 * self-relocating code is required here. 55 */ 56 . = __loader_base_vaddr__; 57 . += SIZEOF_HEADERS; 58 59 .text ALIGN(0x10): { 60 start.o(.text*) 61 *(EXCLUDE_FILE (start.o) .text*) 62 *(.rodata*) 63 64 __start_set_Xcommand_set = .; 65 KEEP(*(set_Xcommand_set)) 66 __stop_set_Xcommand_set = .; 67 68 __start_set_Xficl_compile_set = .; 69 KEEP(*(set_Xficl_compile_set)) 70 __stop_set_Xficl_compile_set = .; 71 } 72 .data ALIGN(0x10): { *(.data*)} 73 .bss ALIGN(0x10): { *(.bss*) } 74 75 __heap = ALIGN(0x8); /* 64-bit aligned heap pointer */ 76 __data_end = .; 77 __boot_loader_len__ = . - __loader_base_vaddr__; 78 __bss_start = ADDR(.bss); 79 __bss_end = ALIGN(__bss_start + SIZEOF(.bss), 0x8); 80 81 __heap_start = .; 82 __heap_end = __loader_end_vaddr__; 83 __heap_len = __heap_end - __heap_start; 84} 85