start.S revision 329145 
1/*-
2 * Copyright (c) 2013-2014 Robert N. M. Watson
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: stable/11/stand/mips/beri/boot2/start.S 262197 2014-02-18 23:18:32Z rwatson $
31 */
32
33.set mips64
34.set noreorder
35.set nobopt
36.set noat
37
38/*
39 * Save arguments from the BERI firmware for use in C-land, and jump into
40 * main.  Assume that registers/stack/etc are sufficiently initialised to get
41 * going.  Notice that we use only temporaries while relocating, as we want to
42 * retain argument registers to pass in to main().
43 *
44 * Note slightly surprising structure: boot2 is linked for a specific address,
45 * but we may start running the code somewhere else (e.g., in DRAM as inserted
46 * with JTAG, or in flash).  The starting assembly is therefore PIC, but the
47 * main body of the code is not PIC.
48 */
49
50
51		.text
52		.global start
53		.ent start
54start:
55
56		/*
57		 * Zero BSS.  Run from cached memory as this will speed up
58		 * code execution noticeably.  Assuming 64-bit alignment of
59		 * everything here.
60		 */
61		dla	$t0, __bss_start
62		dla	$t1, __bss_end
63
64bss_loop:
65		beq	$t0, $t1, bss_done
66		nop
67		sd	$zero, 0($t0)
68		daddiu	$t0, 8
69		b	bss_loop
70		nop
71
72bss_done:
73		jal	main
74		nop
75
76		/*
77		 * Ideally we wouldn't get here, but just in case.
78		 */
79loop:
80		b	loop
81		nop
82		.end start
83