138451Smsmith/*-
238451Smsmith * Copyright (c) 2013-2014 Robert N. M. Watson
338451Smsmith * All rights reserved.
438451Smsmith *
538451Smsmith * This software was developed by SRI International and the University of
638451Smsmith * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
738451Smsmith * ("CTSRD"), as part of the DARPA CRASH research programme.
838451Smsmith *
938451Smsmith * Redistribution and use in source and binary forms, with or without
1038451Smsmith * modification, are permitted provided that the following conditions
1138451Smsmith * are met:
1238451Smsmith * 1. Redistributions of source code must retain the above copyright
1338451Smsmith *    notice, this list of conditions and the following disclaimer.
1438451Smsmith * 2. Redistributions in binary form must reproduce the above copyright
1538451Smsmith *    notice, this list of conditions and the following disclaimer in the
1638451Smsmith *    documentation and/or other materials provided with the distribution.
1738451Smsmith *
1838451Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1938451Smsmith * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2038451Smsmith * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2138451Smsmith * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
2238451Smsmith * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2338451Smsmith * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2438451Smsmith * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2538451Smsmith * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2638451Smsmith * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2738451Smsmith * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2838451Smsmith * SUCH DAMAGE.
2938451Smsmith *
3038451Smsmith * $FreeBSD: stable/11/stand/mips/beri/boot2/start.S 262197 2014-02-18 23:18:32Z rwatson $
3138451Smsmith */
3238451Smsmith
3338451Smsmith.set mips64
3438451Smsmith.set noreorder
35165906Simp.set nobopt
36165906Simp.set noat
3738451Smsmith
3838451Smsmith/*
3938451Smsmith * Save arguments from the BERI firmware for use in C-land, and jump into
4038451Smsmith * main.  Assume that registers/stack/etc are sufficiently initialised to get
4138451Smsmith * going.  Notice that we use only temporaries while relocating, as we want to
4238451Smsmith * retain argument registers to pass in to main().
4338451Smsmith *
4438451Smsmith * Note slightly surprising structure: boot2 is linked for a specific address,
4538451Smsmith * but we may start running the code somewhere else (e.g., in DRAM as inserted
4638451Smsmith * with JTAG, or in flash).  The starting assembly is therefore PIC, but the
4738451Smsmith * main body of the code is not PIC.
4838451Smsmith */
4938451Smsmith
5038451Smsmith
5138451Smsmith		.text
5238451Smsmith		.global start
53		.ent start
54start:
55
56		/*
57		 * Zero BSS.  Run from cached memory as this will speed up
58		 * code execution noticeably.  Assuming 64-bit alignment of
59		 * everything here.
60		 */
61		dla	$t0, __bss_start
62		dla	$t1, __bss_end
63
64bss_loop:
65		beq	$t0, $t1, bss_done
66		nop
67		sd	$zero, 0($t0)
68		daddiu	$t0, 8
69		b	bss_loop
70		nop
71
72bss_done:
73		jal	main
74		nop
75
76		/*
77		 * Ideally we wouldn't get here, but just in case.
78		 */
79loop:
80		b	loop
81		nop
82		.end start
83