1321936Shselasky/* 2321936Shselasky * Copyright (c) 2007 Cisco, Inc. All rights reserved. 3321936Shselasky * 4321936Shselasky * This software is available to you under a choice of one of two 5321936Shselasky * licenses. You may choose to be licensed under the terms of the GNU 6321936Shselasky * General Public License (GPL) Version 2, available from the file 7321936Shselasky * COPYING in the main directory of this source tree, or the 8321936Shselasky * OpenIB.org BSD license below: 9321936Shselasky * 10321936Shselasky * Redistribution and use in source and binary forms, with or 11321936Shselasky * without modification, are permitted provided that the following 12321936Shselasky * conditions are met: 13321936Shselasky * 14321936Shselasky * - Redistributions of source code must retain the above 15321936Shselasky * copyright notice, this list of conditions and the following 16321936Shselasky * disclaimer. 17321936Shselasky * 18321936Shselasky * - Redistributions in binary form must reproduce the above 19321936Shselasky * copyright notice, this list of conditions and the following 20321936Shselasky * disclaimer in the documentation and/or other materials 21321936Shselasky * provided with the distribution. 22321936Shselasky * 23321936Shselasky * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24321936Shselasky * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25321936Shselasky * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26321936Shselasky * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27321936Shselasky * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28321936Shselasky * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29321936Shselasky * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30321936Shselasky * SOFTWARE. 31321936Shselasky */ 32321936Shselasky 33321936Shselasky#ifndef WQE_H 34321936Shselasky#define WQE_H 35321936Shselasky 36321936Shselasky#include <stdint.h> 37321936Shselasky 38321936Shselaskyenum { 39321936Shselasky MLX4_SEND_DOORBELL = 0x14, 40321936Shselasky}; 41321936Shselasky 42321936Shselaskyenum { 43321936Shselasky MLX4_WQE_CTRL_SOLICIT = 1 << 1, 44321936Shselasky MLX4_WQE_CTRL_CQ_UPDATE = 3 << 2, 45321936Shselasky MLX4_WQE_CTRL_IP_HDR_CSUM = 1 << 4, 46321936Shselasky MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, 47321936Shselasky MLX4_WQE_CTRL_FENCE = 1 << 6, 48321936Shselasky MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7 49321936Shselasky}; 50321936Shselasky 51321936Shselaskyenum { 52321936Shselasky MLX4_WQE_BIND_TYPE_2 = (1<<31), 53321936Shselasky MLX4_WQE_BIND_ZERO_BASED = (1<<30), 54321936Shselasky}; 55321936Shselasky 56321936Shselaskyenum { 57321936Shselasky MLX4_INLINE_SEG = 1 << 31, 58321936Shselasky MLX4_INLINE_ALIGN = 64, 59321936Shselasky}; 60321936Shselasky 61321936Shselaskyenum { 62321936Shselasky MLX4_INVALID_LKEY = 0x100, 63321936Shselasky}; 64321936Shselasky 65321936Shselaskystruct mlx4_wqe_ctrl_seg { 66321936Shselasky uint32_t owner_opcode; 67321936Shselasky union { 68321936Shselasky struct { 69321936Shselasky uint8_t reserved[3]; 70321936Shselasky uint8_t fence_size; 71321936Shselasky }; 72321936Shselasky uint32_t bf_qpn; 73321936Shselasky }; 74321936Shselasky /* 75321936Shselasky * High 24 bits are SRC remote buffer; low 8 bits are flags: 76321936Shselasky * [7] SO (strong ordering) 77321936Shselasky * [5] TCP/UDP checksum 78321936Shselasky * [4] IP checksum 79321936Shselasky * [3:2] C (generate completion queue entry) 80321936Shselasky * [1] SE (solicited event) 81321936Shselasky * [0] FL (force loopback) 82321936Shselasky */ 83321936Shselasky uint32_t srcrb_flags; 84321936Shselasky /* 85321936Shselasky * imm is immediate data for send/RDMA write w/ immediate; 86321936Shselasky * also invalidation key for send with invalidate; input 87321936Shselasky * modifier for WQEs on CCQs. 88321936Shselasky */ 89321936Shselasky uint32_t imm; 90321936Shselasky}; 91321936Shselasky 92321936Shselaskystruct mlx4_wqe_datagram_seg { 93321936Shselasky uint32_t av[8]; 94321936Shselasky uint32_t dqpn; 95321936Shselasky uint32_t qkey; 96321936Shselasky uint16_t vlan; 97321936Shselasky uint8_t mac[6]; 98321936Shselasky}; 99321936Shselasky 100321936Shselaskystruct mlx4_wqe_data_seg { 101321936Shselasky uint32_t byte_count; 102321936Shselasky uint32_t lkey; 103321936Shselasky uint64_t addr; 104321936Shselasky}; 105321936Shselasky 106321936Shselaskystruct mlx4_wqe_inline_seg { 107321936Shselasky uint32_t byte_count; 108321936Shselasky}; 109321936Shselasky 110321936Shselaskystruct mlx4_wqe_srq_next_seg { 111321936Shselasky uint16_t reserved1; 112321936Shselasky uint16_t next_wqe_index; 113321936Shselasky uint32_t reserved2[3]; 114321936Shselasky}; 115321936Shselasky 116321936Shselaskystruct mlx4_wqe_local_inval_seg { 117321936Shselasky uint64_t reserved1; 118321936Shselasky uint32_t mem_key; 119321936Shselasky uint32_t reserved2; 120321936Shselasky uint64_t reserved3[2]; 121321936Shselasky}; 122321936Shselasky 123321936Shselaskyenum { 124321936Shselasky MLX4_WQE_MW_REMOTE_READ = 1 << 29, 125321936Shselasky MLX4_WQE_MW_REMOTE_WRITE = 1 << 30, 126321936Shselasky MLX4_WQE_MW_ATOMIC = 1 << 31 127321936Shselasky}; 128321936Shselasky 129321936Shselaskystruct mlx4_wqe_raddr_seg { 130321936Shselasky uint64_t raddr; 131321936Shselasky uint32_t rkey; 132321936Shselasky uint32_t reserved; 133321936Shselasky}; 134321936Shselasky 135321936Shselaskystruct mlx4_wqe_atomic_seg { 136321936Shselasky uint64_t swap_add; 137321936Shselasky uint64_t compare; 138321936Shselasky}; 139321936Shselasky 140321936Shselaskystruct mlx4_wqe_bind_seg { 141321936Shselasky uint32_t flags1; 142321936Shselasky uint32_t flags2; 143321936Shselasky uint32_t new_rkey; 144321936Shselasky uint32_t lkey; 145321936Shselasky uint64_t addr; 146321936Shselasky uint64_t length; 147321936Shselasky}; 148321936Shselasky 149321936Shselasky#endif /* WQE_H */ 150