t_lwp_create.c revision 272458
111126Sjulian/* $NetBSD: t_lwp_create.c,v 1.2 2012/05/22 09:23:39 martin Exp $ */ 2103722Sphk 311126Sjulian/*- 411126Sjulian * Copyright (c) 2012 The NetBSD Foundation, Inc. 511126Sjulian * All rights reserved. 611126Sjulian * 711126Sjulian * Redistribution and use in source and binary forms, with or without 811126Sjulian * modification, are permitted provided that the following conditions 911126Sjulian * are met: 1011126Sjulian * 1. Redistributions of source code must retain the above copyright 1111126Sjulian * notice, this list of conditions and the following disclaimer. 1211126Sjulian * 2. Redistributions in binary form must reproduce the above copyright 1311126Sjulian * notice, this list of conditions and the following disclaimer in the 14103722Sphk * documentation and/or other materials provided with the distribution. 15103722Sphk * 1611126Sjulian * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17103722Sphk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 1811126Sjulian * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 1911126Sjulian * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2011126Sjulian * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2111126Sjulian * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2211126Sjulian * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2311126Sjulian * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2411126Sjulian * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2511126Sjulian * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2611126Sjulian * POSSIBILITY OF SUCH DAMAGE. 27116182Sobrien */ 28116182Sobrien 29116182Sobrien/* 3011126Sjulian * This code is partly based on code by Joel Sing <joel at sing.id.au> 3148936Sphk */ 3283366Sjulian 33111179Sphk#include <atf-c.h> 3490737Sgreen#include <lwp.h> 3590737Sgreen#include <stdio.h> 3636735Sdfr#include <stdlib.h> 3748936Sphk#include <ucontext.h> 3811126Sjulian#include <inttypes.h> 3912954Sjulian#include <errno.h> 4048936Sphk 41120514Sphk#ifdef __alpha__ 4265374Sphk#include <machine/alpha_cpu.h> 43126078Sphk#endif 44147982Srwatson#ifdef __amd64__ 4549535Sphk#include <machine/vmparam.h> 4611126Sjulian#include <machine/psl.h> 47149144Sphk#endif 48149144Sphk#ifdef __hppa__ 49131996Sphk#include <machine/psl.h> 5048936Sphk#endif 51150342Sphk#ifdef __i386__ 52142242Sphk#include <machine/segments.h> 53147982Srwatson#include <machine/psl.h> 54147982Srwatson#endif 55147982Srwatson#if defined(__m68k__) || defined(__sh3__) || defined __vax__ 56126082Sphk#include <machine/psl.h> 57135600Sphk#endif 58135600Sphk 59126082Sphkvolatile lwpid_t the_lwp_id = 0; 60151450Sjhb 61126082Sphkstatic void lwp_main_func(void* arg) 62126082Sphk{ 63126082Sphk the_lwp_id = _lwp_self(); 64135600Sphk _lwp_exit(); 65135600Sphk} 66126082Sphk 67135704Sphk/* 68126082Sphk * Hard to document - see usage examples below. 69126082Sphk */ 70126082Sphk#define INVALID_UCONTEXT(ARCH,NAME,DESC) \ 71126082Sphkstatic void ARCH##_##NAME(ucontext_t *); \ 72144385SphkATF_TC(lwp_create_##ARCH##_fail_##NAME); \ 73144385SphkATF_TC_HEAD(lwp_create_##ARCH##_fail_##NAME, tc) \ 74144385Sphk{ \ 75144385Sphk atf_tc_set_md_var(tc, "descr", "verify rejection of invalid ucontext " \ 76144385Sphk "on " #ARCH " due to " DESC); \ 77144385Sphk} \ 78144385Sphk \ 79144385SphkATF_TC_BODY(lwp_create_##ARCH##_fail_##NAME, tc) \ 80144385Sphk{ \ 81144385Sphk ucontext_t uc; \ 82144384Sphk lwpid_t lid; \ 83126082Sphk int error; \ 84135704Sphk \ 85142232Sphk getcontext(&uc); \ 86126082Sphk uc.uc_flags = _UC_CPU; \ 87126082Sphk ARCH##_##NAME(&uc); \ 88126082Sphk \ 89126082Sphk error = _lwp_create(&uc, 0, &lid); \ 90142242Sphk ATF_REQUIRE(error != 0 && errno == EINVAL); \ 91126082Sphk} \ 92142242Sphkstatic void ARCH##_##NAME(ucontext_t *uc) \ 93135600Sphk{ 94136014Sphk 95136014Sphk 96126082SphkATF_TC(lwp_create_works); 97126082SphkATF_TC_HEAD(lwp_create_works, tc) 98126082Sphk{ 99150342Sphk atf_tc_set_md_var(tc, "descr", "Verify creation of a lwp and waiting" 100142242Sphk " for it to finish"); 101142242Sphk} 102150342Sphk 103150342SphkATF_TC_BODY(lwp_create_works, tc) 104150342Sphk{ 105154029Sbz ucontext_t uc; 106126082Sphk lwpid_t lid; 107136014Sphk int error; 108136014Sphk void *stack; 109136014Sphk static const size_t ssize = 16*1024; 110136014Sphk 111150342Sphk stack = malloc(ssize); 112126082Sphk _lwp_makecontext(&uc, lwp_main_func, NULL, NULL, stack, ssize); 113136014Sphk 114135704Sphk error = _lwp_create(&uc, 0, &lid); 115135704Sphk ATF_REQUIRE(error == 0); 116135704Sphk 117135704Sphk error = _lwp_wait(lid, NULL); 118126082Sphk ATF_REQUIRE(error == 0); 119135704Sphk ATF_REQUIRE(lid == the_lwp_id); 120135704Sphk} 121135704Sphk 122135704SphkINVALID_UCONTEXT(generic, no_uc_cpu, "not setting cpu registers") 123135704Sphk uc->uc_flags &= ~_UC_CPU; 124135704Sphk} 125135704Sphk 126135704Sphk#ifdef __alpha__ 127135704SphkINVALID_UCONTEXT(alpha, pslset, "trying to clear the USERMODE flag") 128135704Sphk uc->uc_mcontext.__gregs[_REG_PS] &= ~ALPHA_PSL_USERMODE; 129135704Sphk} 130135704SphkINVALID_UCONTEXT(alpha, pslclr, "trying to set a 'must be zero' flag") 131135704Sphk uc->uc_mcontext.__gregs[_REG_PS] |= ALPHA_PSL_IPL_HIGH; 132135704Sphk} 133135704Sphk#endif 134135704Sphk#ifdef __amd64__ 135135704SphkINVALID_UCONTEXT(amd64, untouchable_rflags, "forbidden rflags changed") 136135704Sphk uc->uc_mcontext.__gregs[_REG_RFLAGS] |= PSL_MBZ; 137135704Sphk} 138120514Sphk/* 139120514Sphk * XXX: add invalid GS/DS selector tests 140120514Sphk */ 14185603SphkINVALID_UCONTEXT(amd64, pc_too_high, 142120514Sphk "instruction pointer outside userland address space") 143120514Sphk uc->uc_mcontext.__gregs[_REG_RIP] = VM_MAXUSER_ADDRESS; 144120514Sphk} 145120514Sphk#endif 146120514Sphk#ifdef __arm__ 147120514SphkINVALID_UCONTEXT(arm, invalid_mode, "psr or r15 set to non-user-mode") 148120514Sphk uc->uc_mcontext.__gregs[_REG_PC] |= 0x1f /*PSR_SYS32_MODE*/; 149120514Sphk uc->uc_mcontext.__gregs[_REG_CPSR] |= 0x03 /*R15_MODE_SVC*/; 150120514Sphk} 151120514Sphk#endif 152111179Sphk#ifdef __hppa__ 153111179SphkINVALID_UCONTEXT(hppa, invalid_1, "set illegal bits in psw") 154111179Sphk uc->uc_mcontext.__gregs[_REG_PSW] |= PSW_MBZ; 155111179Sphk} 156111179SphkINVALID_UCONTEXT(hppa, invalid_0, "clear illegal bits in psw") 157111179Sphk uc->uc_mcontext.__gregs[_REG_PSW] &= ~PSW_MBS; 158120514Sphk} 159120514Sphk#endif 160120514Sphk#ifdef __i386__ 161120514SphkINVALID_UCONTEXT(i386, untouchable_eflags, "changing forbidden eflags") 162120514Sphk uc->uc_mcontext.__gregs[_REG_EFL] |= PSL_IOPL; 163120514Sphk} 164120514SphkINVALID_UCONTEXT(i386, priv_escalation, "modifying priviledge level") 165120514Sphk uc->uc_mcontext.__gregs[_REG_CS] &= ~SEL_RPL; 166111179Sphk} 167111179Sphk#endif 168111179Sphk#ifdef __m68k__ 169111179SphkINVALID_UCONTEXT(m68k, invalid_ps_bits, 170111179Sphk "setting forbidden bits in the ps register") 171120514Sphk uc->uc_mcontext.__gregs[_REG_PS] |= (PSL_MBZ|PSL_IPL|PSL_S); 172120514Sphk} 173111179Sphk#endif 174111179Sphk#ifdef __sh3__ 175111179SphkINVALID_UCONTEXT(sh3, modify_userstatic, 176111179Sphk "modifying illegal bits in the status register") 177111179Sphk uc->uc_mcontext.__gregs[_REG_SR] |= PSL_MD; 178111179Sphk} 179111179Sphk#endif 180111179Sphk#ifdef __sparc__ 181111220SphkINVALID_UCONTEXT(sparc, pc_odd, "mis-aligned instruction pointer") 182111179Sphk uc->uc_mcontext.__gregs[_REG_PC] = 0x100002; 183111179Sphk} 184111179SphkINVALID_UCONTEXT(sparc, npc_odd, "mis-aligned next instruction pointer") 185126080Sphk uc->uc_mcontext.__gregs[_REG_nPC] = 0x100002; 186126080Sphk} 187111815SphkINVALID_UCONTEXT(sparc, pc_null, "NULL instruction pointer") 188111815Sphk uc->uc_mcontext.__gregs[_REG_PC] = 0; 189111815Sphk} 190111815SphkINVALID_UCONTEXT(sparc, npc_null, "NULL next instruction pointer") 191111815Sphk uc->uc_mcontext.__gregs[_REG_nPC] = 0; 192111815Sphk} 193111815Sphk#endif 194111815Sphk#ifdef __vax__ 195111815SphkINVALID_UCONTEXT(vax, psl_0, "clearing forbidden bits in psl") 196111815Sphk uc->uc_mcontext.__gregs[_REG_PSL] &= ~(PSL_U | PSL_PREVU); 197111815Sphk} 198111179SphkINVALID_UCONTEXT(vax, psl_1, "setting forbidden bits in psl") 199111179Sphk uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_IPL | PSL_IS; 200120514Sphk} 201111179SphkINVALID_UCONTEXT(vax, psl_cm, "setting CM bit in psl") 202120514Sphk uc->uc_mcontext.__gregs[_REG_PSL] |= PSL_CM; 203120514Sphk} 204120514Sphk#endif 205120514Sphk 206120514SphkATF_TP_ADD_TCS(tp) 207120514Sphk{ 208133741Sjmg ATF_TP_ADD_TC(tp, lwp_create_works); 209120514Sphk ATF_TP_ADD_TC(tp, lwp_create_generic_fail_no_uc_cpu); 210120514Sphk#ifdef __alpha__ 211120514Sphk ATF_TP_ADD_TC(tp, lwp_create_alpha_fail_pslset); 212120514Sphk ATF_TP_ADD_TC(tp, lwp_create_alpha_fail_pslclr); 213120514Sphk#endif 214120514Sphk#ifdef __amd64__ 215120514Sphk ATF_TP_ADD_TC(tp, lwp_create_amd64_fail_untouchable_rflags); 216120514Sphk ATF_TP_ADD_TC(tp, lwp_create_amd64_fail_pc_too_high); 217120514Sphk#endif 218130585Sphk#ifdef __arm__ 219120514Sphk ATF_TP_ADD_TC(tp, lwp_create_arm_fail_invalid_mode); 220120514Sphk#endif 221120514Sphk#ifdef __hppa__ 222120514Sphk ATF_TP_ADD_TC(tp, lwp_create_hppa_fail_invalid_1); 223120514Sphk ATF_TP_ADD_TC(tp, lwp_create_hppa_fail_invalid_0); 224120514Sphk#endif 225120514Sphk#ifdef __i386__ 226120514Sphk ATF_TP_ADD_TC(tp, lwp_create_i386_fail_untouchable_eflags); 227120514Sphk ATF_TP_ADD_TC(tp, lwp_create_i386_fail_priv_escalation); 228120514Sphk#endif 229120514Sphk#ifdef __m68k__ 230120514Sphk ATF_TP_ADD_TC(tp, lwp_create_m68k_fail_invalid_ps_bits); 231120514Sphk#endif 232120514Sphk#ifdef __sh3__ 233120514Sphk ATF_TP_ADD_TC(tp, lwp_create_sh3_fail_modify_userstatic); 234120514Sphk#endif 235120514Sphk#ifdef __sparc__ 236149177Sphk ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_pc_odd); 237149177Sphk ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_npc_odd); 238149177Sphk ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_pc_null); 239149177Sphk ATF_TP_ADD_TC(tp, lwp_create_sparc_fail_npc_null); 240149177Sphk#endif 241149177Sphk#ifdef __vax__ 242149177Sphk ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_0); 243149177Sphk ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_1); 244149177Sphk ATF_TP_ADD_TC(tp, lwp_create_vax_fail_psl_cm); 245149177Sphk#endif 246149177Sphk return atf_no_error(); 247149177Sphk} 248149177Sphk