CodeGenTarget.h revision 221345
1//===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines wrappers for the Target class and related global 11// functionality. This makes it easier to access the data and provides a single 12// place that needs to check it for validity. All of these classes throw 13// exceptions on error conditions. 14// 15//===----------------------------------------------------------------------===// 16 17#ifndef CODEGEN_TARGET_H 18#define CODEGEN_TARGET_H 19 20#include "CodeGenRegisters.h" 21#include "CodeGenInstruction.h" 22#include "Record.h" 23#include "llvm/Support/raw_ostream.h" 24#include <algorithm> 25 26namespace llvm { 27 28struct CodeGenRegister; 29class CodeGenTarget; 30 31// SelectionDAG node properties. 32// SDNPMemOperand: indicates that a node touches memory and therefore must 33// have an associated memory operand that describes the access. 34enum SDNP { 35 SDNPCommutative, 36 SDNPAssociative, 37 SDNPHasChain, 38 SDNPOutGlue, 39 SDNPInGlue, 40 SDNPOptInGlue, 41 SDNPMayLoad, 42 SDNPMayStore, 43 SDNPSideEffect, 44 SDNPMemOperand, 45 SDNPVariadic, 46 SDNPWantRoot, 47 SDNPWantParent 48}; 49 50/// getValueType - Return the MVT::SimpleValueType that the specified TableGen 51/// record corresponds to. 52MVT::SimpleValueType getValueType(Record *Rec); 53 54std::string getName(MVT::SimpleValueType T); 55std::string getEnumName(MVT::SimpleValueType T); 56 57/// getQualifiedName - Return the name of the specified record, with a 58/// namespace qualifier if the record contains one. 59std::string getQualifiedName(const Record *R); 60 61/// CodeGenTarget - This class corresponds to the Target class in the .td files. 62/// 63class CodeGenTarget { 64 RecordKeeper &Records; 65 Record *TargetRec; 66 67 mutable DenseMap<const Record*, CodeGenInstruction*> Instructions; 68 mutable std::vector<CodeGenRegister> Registers; 69 mutable std::vector<Record*> SubRegIndices; 70 mutable std::vector<CodeGenRegisterClass> RegisterClasses; 71 mutable std::vector<MVT::SimpleValueType> LegalValueTypes; 72 void ReadRegisters() const; 73 void ReadSubRegIndices() const; 74 void ReadRegisterClasses() const; 75 void ReadInstructions() const; 76 void ReadLegalValueTypes() const; 77 78 mutable std::vector<const CodeGenInstruction*> InstrsByEnum; 79public: 80 CodeGenTarget(RecordKeeper &Records); 81 82 Record *getTargetRecord() const { return TargetRec; } 83 const std::string &getName() const; 84 85 /// getInstNamespace - Return the target-specific instruction namespace. 86 /// 87 std::string getInstNamespace() const; 88 89 /// getInstructionSet - Return the InstructionSet object. 90 /// 91 Record *getInstructionSet() const; 92 93 /// getAsmParser - Return the AssemblyParser definition for this target. 94 /// 95 Record *getAsmParser() const; 96 97 /// getAsmWriter - Return the AssemblyWriter definition for this target. 98 /// 99 Record *getAsmWriter() const; 100 101 const std::vector<CodeGenRegister> &getRegisters() const { 102 if (Registers.empty()) ReadRegisters(); 103 return Registers; 104 } 105 106 /// getRegisterByName - If there is a register with the specific AsmName, 107 /// return it. 108 const CodeGenRegister *getRegisterByName(StringRef Name) const; 109 110 const std::vector<Record*> &getSubRegIndices() const { 111 if (SubRegIndices.empty()) ReadSubRegIndices(); 112 return SubRegIndices; 113 } 114 115 // Map a SubRegIndex Record to its number. 116 unsigned getSubRegIndexNo(Record *idx) const { 117 if (SubRegIndices.empty()) ReadSubRegIndices(); 118 std::vector<Record*>::const_iterator i = 119 std::find(SubRegIndices.begin(), SubRegIndices.end(), idx); 120 assert(i != SubRegIndices.end() && "Not a SubRegIndex"); 121 return (i - SubRegIndices.begin()) + 1; 122 } 123 124 const std::vector<CodeGenRegisterClass> &getRegisterClasses() const { 125 if (RegisterClasses.empty()) ReadRegisterClasses(); 126 return RegisterClasses; 127 } 128 129 const CodeGenRegisterClass &getRegisterClass(Record *R) const { 130 const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses(); 131 for (unsigned i = 0, e = RC.size(); i != e; ++i) 132 if (RC[i].TheDef == R) 133 return RC[i]; 134 assert(0 && "Didn't find the register class"); 135 abort(); 136 } 137 138 /// getRegisterClassForRegister - Find the register class that contains the 139 /// specified physical register. If the register is not in a register 140 /// class, return null. If the register is in multiple classes, and the 141 /// classes have a superset-subset relationship and the same set of 142 /// types, return the superclass. Otherwise return null. 143 const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const { 144 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 145 const CodeGenRegisterClass *FoundRC = 0; 146 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 147 const CodeGenRegisterClass &RC = RegisterClasses[i]; 148 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 149 if (R != RC.Elements[ei]) 150 continue; 151 152 // If a register's classes have different types, return null. 153 if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes()) 154 return 0; 155 156 // If this is the first class that contains the register, 157 // make a note of it and go on to the next class. 158 if (!FoundRC) { 159 FoundRC = &RC; 160 break; 161 } 162 163 std::vector<Record *> Elements(RC.Elements); 164 std::vector<Record *> FoundElements(FoundRC->Elements); 165 std::sort(Elements.begin(), Elements.end()); 166 std::sort(FoundElements.begin(), FoundElements.end()); 167 168 // Check to see if the previously found class that contains 169 // the register is a subclass of the current class. If so, 170 // prefer the superclass. 171 if (std::includes(Elements.begin(), Elements.end(), 172 FoundElements.begin(), FoundElements.end())) { 173 FoundRC = &RC; 174 break; 175 } 176 177 // Check to see if the previously found class that contains 178 // the register is a superclass of the current class. If so, 179 // prefer the superclass. 180 if (std::includes(FoundElements.begin(), FoundElements.end(), 181 Elements.begin(), Elements.end())) 182 break; 183 184 // Multiple classes, and neither is a superclass of the other. 185 // Return null. 186 return 0; 187 } 188 } 189 return FoundRC; 190 } 191 192 /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the 193 /// specified physical register. 194 std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const; 195 196 const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const { 197 if (LegalValueTypes.empty()) ReadLegalValueTypes(); 198 return LegalValueTypes; 199 } 200 201 /// isLegalValueType - Return true if the specified value type is natively 202 /// supported by the target (i.e. there are registers that directly hold it). 203 bool isLegalValueType(MVT::SimpleValueType VT) const { 204 const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes(); 205 for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i) 206 if (LegalVTs[i] == VT) return true; 207 return false; 208 } 209 210private: 211 DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const { 212 if (Instructions.empty()) ReadInstructions(); 213 return Instructions; 214 } 215public: 216 217 CodeGenInstruction &getInstruction(const Record *InstRec) const { 218 if (Instructions.empty()) ReadInstructions(); 219 DenseMap<const Record*, CodeGenInstruction*>::iterator I = 220 Instructions.find(InstRec); 221 assert(I != Instructions.end() && "Not an instruction"); 222 return *I->second; 223 } 224 225 /// getInstructionsByEnumValue - Return all of the instructions defined by the 226 /// target, ordered by their enum value. 227 const std::vector<const CodeGenInstruction*> & 228 getInstructionsByEnumValue() const { 229 if (InstrsByEnum.empty()) ComputeInstrsByEnum(); 230 return InstrsByEnum; 231 } 232 233 typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator; 234 inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();} 235 inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); } 236 237 238 /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]? 239 /// 240 bool isLittleEndianEncoding() const; 241 242private: 243 void ComputeInstrsByEnum() const; 244}; 245 246/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern 247/// tablegen class in TargetSelectionDAG.td 248class ComplexPattern { 249 MVT::SimpleValueType Ty; 250 unsigned NumOperands; 251 std::string SelectFunc; 252 std::vector<Record*> RootNodes; 253 unsigned Properties; // Node properties 254public: 255 ComplexPattern() : NumOperands(0) {} 256 ComplexPattern(Record *R); 257 258 MVT::SimpleValueType getValueType() const { return Ty; } 259 unsigned getNumOperands() const { return NumOperands; } 260 const std::string &getSelectFunc() const { return SelectFunc; } 261 const std::vector<Record*> &getRootNodes() const { 262 return RootNodes; 263 } 264 bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); } 265}; 266 267} // End llvm namespace 268 269#endif 270