CodeGenTarget.h revision 202375
1//===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines wrappers for the Target class and related global
11// functionality.  This makes it easier to access the data and provides a single
12// place that needs to check it for validity.  All of these classes throw
13// exceptions on error conditions.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef CODEGEN_TARGET_H
18#define CODEGEN_TARGET_H
19
20#include "llvm/Support/raw_ostream.h"
21#include "CodeGenRegisters.h"
22#include "CodeGenInstruction.h"
23#include <algorithm>
24#include <map>
25
26namespace llvm {
27
28class Record;
29class RecordKeeper;
30struct CodeGenRegister;
31class CodeGenTarget;
32
33// SelectionDAG node properties.
34//  SDNPMemOperand: indicates that a node touches memory and therefore must
35//                  have an associated memory operand that describes the access.
36enum SDNP {
37  SDNPCommutative,
38  SDNPAssociative,
39  SDNPHasChain,
40  SDNPOutFlag,
41  SDNPInFlag,
42  SDNPOptInFlag,
43  SDNPMayLoad,
44  SDNPMayStore,
45  SDNPSideEffect,
46  SDNPMemOperand
47};
48
49/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
50/// record corresponds to.
51MVT::SimpleValueType getValueType(Record *Rec);
52
53std::string getName(MVT::SimpleValueType T);
54std::string getEnumName(MVT::SimpleValueType T);
55
56/// getQualifiedName - Return the name of the specified record, with a
57/// namespace qualifier if the record contains one.
58std::string getQualifiedName(const Record *R);
59
60/// CodeGenTarget - This class corresponds to the Target class in the .td files.
61///
62class CodeGenTarget {
63  Record *TargetRec;
64
65  mutable std::map<std::string, CodeGenInstruction> Instructions;
66  mutable std::vector<CodeGenRegister> Registers;
67  mutable std::vector<CodeGenRegisterClass> RegisterClasses;
68  mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
69  void ReadRegisters() const;
70  void ReadRegisterClasses() const;
71  void ReadInstructions() const;
72  void ReadLegalValueTypes() const;
73public:
74  CodeGenTarget();
75
76  Record *getTargetRecord() const { return TargetRec; }
77  const std::string &getName() const;
78
79  /// getInstNamespace - Return the target-specific instruction namespace.
80  ///
81  std::string getInstNamespace() const;
82
83  /// getInstructionSet - Return the InstructionSet object.
84  ///
85  Record *getInstructionSet() const;
86
87  /// getAsmParser - Return the AssemblyParser definition for this target.
88  ///
89  Record *getAsmParser() const;
90
91  /// getAsmWriter - Return the AssemblyWriter definition for this target.
92  ///
93  Record *getAsmWriter() const;
94
95  const std::vector<CodeGenRegister> &getRegisters() const {
96    if (Registers.empty()) ReadRegisters();
97    return Registers;
98  }
99
100  const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
101    if (RegisterClasses.empty()) ReadRegisterClasses();
102    return RegisterClasses;
103  }
104
105  const CodeGenRegisterClass &getRegisterClass(Record *R) const {
106    const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
107    for (unsigned i = 0, e = RC.size(); i != e; ++i)
108      if (RC[i].TheDef == R)
109        return RC[i];
110    assert(0 && "Didn't find the register class");
111    abort();
112  }
113
114  /// getRegisterClassForRegister - Find the register class that contains the
115  /// specified physical register.  If the register is not in a register
116  /// class, return null. If the register is in multiple classes, and the
117  /// classes have a superset-subset relationship and the same set of
118  /// types, return the superclass.  Otherwise return null.
119  const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
120    const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
121    const CodeGenRegisterClass *FoundRC = 0;
122    for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
123      const CodeGenRegisterClass &RC = RegisterClasses[i];
124      for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
125        if (R != RC.Elements[ei])
126          continue;
127
128        // If a register's classes have different types, return null.
129        if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
130          return 0;
131
132        // If this is the first class that contains the register,
133        // make a note of it and go on to the next class.
134        if (!FoundRC) {
135          FoundRC = &RC;
136          break;
137        }
138
139        std::vector<Record *> Elements(RC.Elements);
140        std::vector<Record *> FoundElements(FoundRC->Elements);
141        std::sort(Elements.begin(), Elements.end());
142        std::sort(FoundElements.begin(), FoundElements.end());
143
144        // Check to see if the previously found class that contains
145        // the register is a subclass of the current class. If so,
146        // prefer the superclass.
147        if (std::includes(Elements.begin(), Elements.end(),
148                          FoundElements.begin(), FoundElements.end())) {
149          FoundRC = &RC;
150          break;
151        }
152
153        // Check to see if the previously found class that contains
154        // the register is a superclass of the current class. If so,
155        // prefer the superclass.
156        if (std::includes(FoundElements.begin(), FoundElements.end(),
157                          Elements.begin(), Elements.end()))
158          break;
159
160        // Multiple classes, and neither is a superclass of the other.
161        // Return null.
162        return 0;
163      }
164    }
165    return FoundRC;
166  }
167
168  /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
169  /// specified physical register.
170  std::vector<unsigned char> getRegisterVTs(Record *R) const;
171
172  const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
173    if (LegalValueTypes.empty()) ReadLegalValueTypes();
174    return LegalValueTypes;
175  }
176
177  /// isLegalValueType - Return true if the specified value type is natively
178  /// supported by the target (i.e. there are registers that directly hold it).
179  bool isLegalValueType(MVT::SimpleValueType VT) const {
180    const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
181    for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
182      if (LegalVTs[i] == VT) return true;
183    return false;
184  }
185
186  /// getInstructions - Return all of the instructions defined for this target.
187  ///
188  const std::map<std::string, CodeGenInstruction> &getInstructions() const {
189    if (Instructions.empty()) ReadInstructions();
190    return Instructions;
191  }
192  std::map<std::string, CodeGenInstruction> &getInstructions() {
193    if (Instructions.empty()) ReadInstructions();
194    return Instructions;
195  }
196
197  CodeGenInstruction &getInstruction(const std::string &Name) const {
198    const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
199    assert(Insts.count(Name) && "Not an instruction!");
200    return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
201  }
202
203  typedef std::map<std::string,
204                   CodeGenInstruction>::const_iterator inst_iterator;
205  inst_iterator inst_begin() const { return getInstructions().begin(); }
206  inst_iterator inst_end() const { return Instructions.end(); }
207
208  /// getInstructionsByEnumValue - Return all of the instructions defined by the
209  /// target, ordered by their enum value.
210  void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
211                                                &NumberedInstructions);
212
213
214  /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
215  ///
216  bool isLittleEndianEncoding() const;
217};
218
219/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
220/// tablegen class in TargetSelectionDAG.td
221class ComplexPattern {
222  MVT::SimpleValueType Ty;
223  unsigned NumOperands;
224  std::string SelectFunc;
225  std::vector<Record*> RootNodes;
226  unsigned Properties; // Node properties
227public:
228  ComplexPattern() : NumOperands(0) {}
229  ComplexPattern(Record *R);
230
231  MVT::SimpleValueType getValueType() const { return Ty; }
232  unsigned getNumOperands() const { return NumOperands; }
233  const std::string &getSelectFunc() const { return SelectFunc; }
234  const std::vector<Record*> &getRootNodes() const {
235    return RootNodes;
236  }
237  bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
238};
239
240} // End llvm namespace
241
242#endif
243