CodeGenTarget.h revision 199481 
1//===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines wrappers for the Target class and related global
11// functionality.  This makes it easier to access the data and provides a single
12// place that needs to check it for validity.  All of these classes throw
13// exceptions on error conditions.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef CODEGEN_TARGET_H
18#define CODEGEN_TARGET_H
19
20#include "llvm/Support/raw_ostream.h"
21#include "CodeGenRegisters.h"
22#include "CodeGenInstruction.h"
23#include <algorithm>
24#include <map>
25
26namespace llvm {
27
28class Record;
29class RecordKeeper;
30struct CodeGenRegister;
31class CodeGenTarget;
32
33// SelectionDAG node properties.
34//  SDNPMemOperand: indicates that a node touches memory and therefore must
35//                  have an associated memory operand that describes the access.
36enum SDNP {
37  SDNPCommutative,
38  SDNPAssociative,
39  SDNPHasChain,
40  SDNPOutFlag,
41  SDNPInFlag,
42  SDNPOptInFlag,
43  SDNPMayLoad,
44  SDNPMayStore,
45  SDNPSideEffect,
46  SDNPMemOperand
47};
48
49// ComplexPattern attributes.
50enum CPAttr { CPAttrParentAsRoot };
51
52/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
53/// record corresponds to.
54MVT::SimpleValueType getValueType(Record *Rec);
55
56std::string getName(MVT::SimpleValueType T);
57std::string getEnumName(MVT::SimpleValueType T);
58
59/// getQualifiedName - Return the name of the specified record, with a
60/// namespace qualifier if the record contains one.
61std::string getQualifiedName(const Record *R);
62
63/// CodeGenTarget - This class corresponds to the Target class in the .td files.
64///
65class CodeGenTarget {
66  Record *TargetRec;
67
68  mutable std::map<std::string, CodeGenInstruction> Instructions;
69  mutable std::vector<CodeGenRegister> Registers;
70  mutable std::vector<CodeGenRegisterClass> RegisterClasses;
71  mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
72  void ReadRegisters() const;
73  void ReadRegisterClasses() const;
74  void ReadInstructions() const;
75  void ReadLegalValueTypes() const;
76public:
77  CodeGenTarget();
78
79  Record *getTargetRecord() const { return TargetRec; }
80  const std::string &getName() const;
81
82  /// getInstNamespace - Return the target-specific instruction namespace.
83  ///
84  std::string getInstNamespace() const;
85
86  /// getInstructionSet - Return the InstructionSet object.
87  ///
88  Record *getInstructionSet() const;
89
90  /// getAsmParser - Return the AssemblyParser definition for this target.
91  ///
92  Record *getAsmParser() const;
93
94  /// getAsmWriter - Return the AssemblyWriter definition for this target.
95  ///
96  Record *getAsmWriter() const;
97
98  const std::vector<CodeGenRegister> &getRegisters() const {
99    if (Registers.empty()) ReadRegisters();
100    return Registers;
101  }
102
103  const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
104    if (RegisterClasses.empty()) ReadRegisterClasses();
105    return RegisterClasses;
106  }
107
108  const CodeGenRegisterClass &getRegisterClass(Record *R) const {
109    const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
110    for (unsigned i = 0, e = RC.size(); i != e; ++i)
111      if (RC[i].TheDef == R)
112        return RC[i];
113    assert(0 && "Didn't find the register class");
114    abort();
115  }
116
117  /// getRegisterClassForRegister - Find the register class that contains the
118  /// specified physical register.  If the register is not in a register
119  /// class, return null. If the register is in multiple classes, and the
120  /// classes have a superset-subset relationship and the same set of
121  /// types, return the superclass.  Otherwise return null.
122  const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
123    const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
124    const CodeGenRegisterClass *FoundRC = 0;
125    for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
126      const CodeGenRegisterClass &RC = RegisterClasses[i];
127      for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
128        if (R != RC.Elements[ei])
129          continue;
130
131        // If a register's classes have different types, return null.
132        if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
133          return 0;
134
135        // If this is the first class that contains the register,
136        // make a note of it and go on to the next class.
137        if (!FoundRC) {
138          FoundRC = &RC;
139          break;
140        }
141
142        std::vector<Record *> Elements(RC.Elements);
143        std::vector<Record *> FoundElements(FoundRC->Elements);
144        std::sort(Elements.begin(), Elements.end());
145        std::sort(FoundElements.begin(), FoundElements.end());
146
147        // Check to see if the previously found class that contains
148        // the register is a subclass of the current class. If so,
149        // prefer the superclass.
150        if (std::includes(Elements.begin(), Elements.end(),
151                          FoundElements.begin(), FoundElements.end())) {
152          FoundRC = &RC;
153          break;
154        }
155
156        // Check to see if the previously found class that contains
157        // the register is a superclass of the current class. If so,
158        // prefer the superclass.
159        if (std::includes(FoundElements.begin(), FoundElements.end(),
160                          Elements.begin(), Elements.end()))
161          break;
162
163        // Multiple classes, and neither is a superclass of the other.
164        // Return null.
165        return 0;
166      }
167    }
168    return FoundRC;
169  }
170
171  /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
172  /// specified physical register.
173  std::vector<unsigned char> getRegisterVTs(Record *R) const;
174
175  const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
176    if (LegalValueTypes.empty()) ReadLegalValueTypes();
177    return LegalValueTypes;
178  }
179
180  /// isLegalValueType - Return true if the specified value type is natively
181  /// supported by the target (i.e. there are registers that directly hold it).
182  bool isLegalValueType(MVT::SimpleValueType VT) const {
183    const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
184    for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
185      if (LegalVTs[i] == VT) return true;
186    return false;
187  }
188
189  /// getInstructions - Return all of the instructions defined for this target.
190  ///
191  const std::map<std::string, CodeGenInstruction> &getInstructions() const {
192    if (Instructions.empty()) ReadInstructions();
193    return Instructions;
194  }
195  std::map<std::string, CodeGenInstruction> &getInstructions() {
196    if (Instructions.empty()) ReadInstructions();
197    return Instructions;
198  }
199
200  CodeGenInstruction &getInstruction(const std::string &Name) const {
201    const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
202    assert(Insts.count(Name) && "Not an instruction!");
203    return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
204  }
205
206  typedef std::map<std::string,
207                   CodeGenInstruction>::const_iterator inst_iterator;
208  inst_iterator inst_begin() const { return getInstructions().begin(); }
209  inst_iterator inst_end() const { return Instructions.end(); }
210
211  /// getInstructionsByEnumValue - Return all of the instructions defined by the
212  /// target, ordered by their enum value.
213  void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
214                                                &NumberedInstructions);
215
216
217  /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
218  ///
219  bool isLittleEndianEncoding() const;
220};
221
222/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
223/// tablegen class in TargetSelectionDAG.td
224class ComplexPattern {
225  MVT::SimpleValueType Ty;
226  unsigned NumOperands;
227  std::string SelectFunc;
228  std::vector<Record*> RootNodes;
229  unsigned Properties; // Node properties
230  unsigned Attributes; // Pattern attributes
231public:
232  ComplexPattern() : NumOperands(0) {}
233  ComplexPattern(Record *R);
234
235  MVT::SimpleValueType getValueType() const { return Ty; }
236  unsigned getNumOperands() const { return NumOperands; }
237  const std::string &getSelectFunc() const { return SelectFunc; }
238  const std::vector<Record*> &getRootNodes() const {
239    return RootNodes;
240  }
241  bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
242  bool hasAttribute(enum CPAttr Attr) const { return Attributes & (1 << Attr); }
243};
244
245} // End llvm namespace
246
247#endif
248