X86AsmPrinter.cpp revision 341825
1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains a printer that converts from our internal representation 11// of machine-dependent LLVM code to X86 machine code. 12// 13//===----------------------------------------------------------------------===// 14 15#include "X86AsmPrinter.h" 16#include "InstPrinter/X86ATTInstPrinter.h" 17#include "MCTargetDesc/X86BaseInfo.h" 18#include "MCTargetDesc/X86TargetStreamer.h" 19#include "X86InstrInfo.h" 20#include "X86MachineFunctionInfo.h" 21#include "llvm/BinaryFormat/COFF.h" 22#include "llvm/BinaryFormat/ELF.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineModuleInfoImpls.h" 25#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 26#include "llvm/IR/DerivedTypes.h" 27#include "llvm/IR/Mangler.h" 28#include "llvm/IR/Module.h" 29#include "llvm/IR/Type.h" 30#include "llvm/MC/MCCodeEmitter.h" 31#include "llvm/MC/MCContext.h" 32#include "llvm/MC/MCExpr.h" 33#include "llvm/MC/MCSectionCOFF.h" 34#include "llvm/MC/MCSectionELF.h" 35#include "llvm/MC/MCSectionMachO.h" 36#include "llvm/MC/MCStreamer.h" 37#include "llvm/MC/MCSymbol.h" 38#include "llvm/Support/Debug.h" 39#include "llvm/Support/ErrorHandling.h" 40#include "llvm/Support/MachineValueType.h" 41#include "llvm/Support/TargetRegistry.h" 42using namespace llvm; 43 44X86AsmPrinter::X86AsmPrinter(TargetMachine &TM, 45 std::unique_ptr<MCStreamer> Streamer) 46 : AsmPrinter(TM, std::move(Streamer)), SM(*this), FM(*this) {} 47 48//===----------------------------------------------------------------------===// 49// Primitive Helper Functions. 50//===----------------------------------------------------------------------===// 51 52/// runOnMachineFunction - Emit the function body. 53/// 54bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) { 55 Subtarget = &MF.getSubtarget<X86Subtarget>(); 56 57 SMShadowTracker.startFunction(MF); 58 CodeEmitter.reset(TM.getTarget().createMCCodeEmitter( 59 *Subtarget->getInstrInfo(), *Subtarget->getRegisterInfo(), 60 MF.getContext())); 61 62 EmitFPOData = 63 Subtarget->isTargetWin32() && MF.getMMI().getModule()->getCodeViewFlag(); 64 65 SetupMachineFunction(MF); 66 67 if (Subtarget->isTargetCOFF()) { 68 bool Local = MF.getFunction().hasLocalLinkage(); 69 OutStreamer->BeginCOFFSymbolDef(CurrentFnSym); 70 OutStreamer->EmitCOFFSymbolStorageClass( 71 Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL); 72 OutStreamer->EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION 73 << COFF::SCT_COMPLEX_TYPE_SHIFT); 74 OutStreamer->EndCOFFSymbolDef(); 75 } 76 77 // Emit the rest of the function body. 78 EmitFunctionBody(); 79 80 // Emit the XRay table for this function. 81 emitXRayTable(); 82 83 EmitFPOData = false; 84 85 // We didn't modify anything. 86 return false; 87} 88 89void X86AsmPrinter::EmitFunctionBodyStart() { 90 if (EmitFPOData) { 91 X86TargetStreamer *XTS = 92 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer()); 93 unsigned ParamsSize = 94 MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize(); 95 XTS->emitFPOProc(CurrentFnSym, ParamsSize); 96 } 97} 98 99void X86AsmPrinter::EmitFunctionBodyEnd() { 100 if (EmitFPOData) { 101 X86TargetStreamer *XTS = 102 static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer()); 103 XTS->emitFPOEndProc(); 104 } 105} 106 107/// printSymbolOperand - Print a raw symbol reference operand. This handles 108/// jump tables, constant pools, global address and external symbols, all of 109/// which print to a label with various suffixes for relocation types etc. 110static void printSymbolOperand(X86AsmPrinter &P, const MachineOperand &MO, 111 raw_ostream &O) { 112 switch (MO.getType()) { 113 default: llvm_unreachable("unknown symbol type!"); 114 case MachineOperand::MO_ConstantPoolIndex: 115 P.GetCPISymbol(MO.getIndex())->print(O, P.MAI); 116 P.printOffset(MO.getOffset(), O); 117 break; 118 case MachineOperand::MO_GlobalAddress: { 119 const GlobalValue *GV = MO.getGlobal(); 120 121 MCSymbol *GVSym; 122 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || 123 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) 124 GVSym = P.getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 125 else 126 GVSym = P.getSymbol(GV); 127 128 // Handle dllimport linkage. 129 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT) 130 GVSym = 131 P.OutContext.getOrCreateSymbol(Twine("__imp_") + GVSym->getName()); 132 133 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY || 134 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) { 135 MCSymbol *Sym = P.getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 136 MachineModuleInfoImpl::StubValueTy &StubSym = 137 P.MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym); 138 if (!StubSym.getPointer()) 139 StubSym = MachineModuleInfoImpl:: 140 StubValueTy(P.getSymbol(GV), !GV->hasInternalLinkage()); 141 } 142 143 // If the name begins with a dollar-sign, enclose it in parens. We do this 144 // to avoid having it look like an integer immediate to the assembler. 145 if (GVSym->getName()[0] != '$') 146 GVSym->print(O, P.MAI); 147 else { 148 O << '('; 149 GVSym->print(O, P.MAI); 150 O << ')'; 151 } 152 P.printOffset(MO.getOffset(), O); 153 break; 154 } 155 } 156 157 switch (MO.getTargetFlags()) { 158 default: 159 llvm_unreachable("Unknown target flag on GV operand"); 160 case X86II::MO_NO_FLAG: // No flag. 161 break; 162 case X86II::MO_DARWIN_NONLAZY: 163 case X86II::MO_DLLIMPORT: 164 // These affect the name of the symbol, not any suffix. 165 break; 166 case X86II::MO_GOT_ABSOLUTE_ADDRESS: 167 O << " + [.-"; 168 P.MF->getPICBaseSymbol()->print(O, P.MAI); 169 O << ']'; 170 break; 171 case X86II::MO_PIC_BASE_OFFSET: 172 case X86II::MO_DARWIN_NONLAZY_PIC_BASE: 173 O << '-'; 174 P.MF->getPICBaseSymbol()->print(O, P.MAI); 175 break; 176 case X86II::MO_TLSGD: O << "@TLSGD"; break; 177 case X86II::MO_TLSLD: O << "@TLSLD"; break; 178 case X86II::MO_TLSLDM: O << "@TLSLDM"; break; 179 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break; 180 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break; 181 case X86II::MO_TPOFF: O << "@TPOFF"; break; 182 case X86II::MO_DTPOFF: O << "@DTPOFF"; break; 183 case X86II::MO_NTPOFF: O << "@NTPOFF"; break; 184 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break; 185 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break; 186 case X86II::MO_GOT: O << "@GOT"; break; 187 case X86II::MO_GOTOFF: O << "@GOTOFF"; break; 188 case X86II::MO_PLT: O << "@PLT"; break; 189 case X86II::MO_TLVP: O << "@TLVP"; break; 190 case X86II::MO_TLVP_PIC_BASE: 191 O << "@TLVP" << '-'; 192 P.MF->getPICBaseSymbol()->print(O, P.MAI); 193 break; 194 case X86II::MO_SECREL: O << "@SECREL32"; break; 195 } 196} 197 198static void printOperand(X86AsmPrinter &P, const MachineInstr *MI, 199 unsigned OpNo, raw_ostream &O, 200 const char *Modifier = nullptr, unsigned AsmVariant = 0); 201 202/// printPCRelImm - This is used to print an immediate value that ends up 203/// being encoded as a pc-relative value. These print slightly differently, for 204/// example, a $ is not emitted. 205static void printPCRelImm(X86AsmPrinter &P, const MachineInstr *MI, 206 unsigned OpNo, raw_ostream &O) { 207 const MachineOperand &MO = MI->getOperand(OpNo); 208 switch (MO.getType()) { 209 default: llvm_unreachable("Unknown pcrel immediate operand"); 210 case MachineOperand::MO_Register: 211 // pc-relativeness was handled when computing the value in the reg. 212 printOperand(P, MI, OpNo, O); 213 return; 214 case MachineOperand::MO_Immediate: 215 O << MO.getImm(); 216 return; 217 case MachineOperand::MO_GlobalAddress: 218 printSymbolOperand(P, MO, O); 219 return; 220 } 221} 222 223static void printOperand(X86AsmPrinter &P, const MachineInstr *MI, 224 unsigned OpNo, raw_ostream &O, const char *Modifier, 225 unsigned AsmVariant) { 226 const MachineOperand &MO = MI->getOperand(OpNo); 227 switch (MO.getType()) { 228 default: llvm_unreachable("unknown operand type!"); 229 case MachineOperand::MO_Register: { 230 // FIXME: Enumerating AsmVariant, so we can remove magic number. 231 if (AsmVariant == 0) O << '%'; 232 unsigned Reg = MO.getReg(); 233 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) { 234 unsigned Size = (strcmp(Modifier+6,"64") == 0) ? 64 : 235 (strcmp(Modifier+6,"32") == 0) ? 32 : 236 (strcmp(Modifier+6,"16") == 0) ? 16 : 8; 237 Reg = getX86SubSuperRegister(Reg, Size); 238 } 239 O << X86ATTInstPrinter::getRegisterName(Reg); 240 return; 241 } 242 243 case MachineOperand::MO_Immediate: 244 if (AsmVariant == 0) O << '$'; 245 O << MO.getImm(); 246 return; 247 248 case MachineOperand::MO_GlobalAddress: { 249 if (AsmVariant == 0) O << '$'; 250 printSymbolOperand(P, MO, O); 251 break; 252 } 253 } 254} 255 256static void printLeaMemReference(X86AsmPrinter &P, const MachineInstr *MI, 257 unsigned Op, raw_ostream &O, 258 const char *Modifier = nullptr) { 259 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); 260 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); 261 const MachineOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp); 262 263 // If we really don't want to print out (rip), don't. 264 bool HasBaseReg = BaseReg.getReg() != 0; 265 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") && 266 BaseReg.getReg() == X86::RIP) 267 HasBaseReg = false; 268 269 // HasParenPart - True if we will print out the () part of the mem ref. 270 bool HasParenPart = IndexReg.getReg() || HasBaseReg; 271 272 switch (DispSpec.getType()) { 273 default: 274 llvm_unreachable("unknown operand type!"); 275 case MachineOperand::MO_Immediate: { 276 int DispVal = DispSpec.getImm(); 277 if (DispVal || !HasParenPart) 278 O << DispVal; 279 break; 280 } 281 case MachineOperand::MO_GlobalAddress: 282 case MachineOperand::MO_ConstantPoolIndex: 283 printSymbolOperand(P, DispSpec, O); 284 } 285 286 if (Modifier && strcmp(Modifier, "H") == 0) 287 O << "+8"; 288 289 if (HasParenPart) { 290 assert(IndexReg.getReg() != X86::ESP && 291 "X86 doesn't allow scaling by ESP"); 292 293 O << '('; 294 if (HasBaseReg) 295 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); 296 297 if (IndexReg.getReg()) { 298 O << ','; 299 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier); 300 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); 301 if (ScaleVal != 1) 302 O << ',' << ScaleVal; 303 } 304 O << ')'; 305 } 306} 307 308static void printMemReference(X86AsmPrinter &P, const MachineInstr *MI, 309 unsigned Op, raw_ostream &O, 310 const char *Modifier = nullptr) { 311 assert(isMem(*MI, Op) && "Invalid memory reference!"); 312 const MachineOperand &Segment = MI->getOperand(Op+X86::AddrSegmentReg); 313 if (Segment.getReg()) { 314 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier); 315 O << ':'; 316 } 317 printLeaMemReference(P, MI, Op, O, Modifier); 318} 319 320static void printIntelMemReference(X86AsmPrinter &P, const MachineInstr *MI, 321 unsigned Op, raw_ostream &O, 322 const char *Modifier = nullptr, 323 unsigned AsmVariant = 1) { 324 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); 325 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); 326 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); 327 const MachineOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp); 328 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); 329 330 // If this has a segment register, print it. 331 if (SegReg.getReg()) { 332 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier, AsmVariant); 333 O << ':'; 334 } 335 336 O << '['; 337 338 bool NeedPlus = false; 339 if (BaseReg.getReg()) { 340 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); 341 NeedPlus = true; 342 } 343 344 if (IndexReg.getReg()) { 345 if (NeedPlus) O << " + "; 346 if (ScaleVal != 1) 347 O << ScaleVal << '*'; 348 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier, AsmVariant); 349 NeedPlus = true; 350 } 351 352 if (!DispSpec.isImm()) { 353 if (NeedPlus) O << " + "; 354 printOperand(P, MI, Op+X86::AddrDisp, O, Modifier, AsmVariant); 355 } else { 356 int64_t DispVal = DispSpec.getImm(); 357 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) { 358 if (NeedPlus) { 359 if (DispVal > 0) 360 O << " + "; 361 else { 362 O << " - "; 363 DispVal = -DispVal; 364 } 365 } 366 O << DispVal; 367 } 368 } 369 O << ']'; 370} 371 372static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO, 373 char Mode, raw_ostream &O) { 374 unsigned Reg = MO.getReg(); 375 bool EmitPercent = true; 376 377 if (!X86::GR8RegClass.contains(Reg) && 378 !X86::GR16RegClass.contains(Reg) && 379 !X86::GR32RegClass.contains(Reg) && 380 !X86::GR64RegClass.contains(Reg)) 381 return true; 382 383 switch (Mode) { 384 default: return true; // Unknown mode. 385 case 'b': // Print QImode register 386 Reg = getX86SubSuperRegister(Reg, 8); 387 break; 388 case 'h': // Print QImode high register 389 Reg = getX86SubSuperRegister(Reg, 8, true); 390 break; 391 case 'w': // Print HImode register 392 Reg = getX86SubSuperRegister(Reg, 16); 393 break; 394 case 'k': // Print SImode register 395 Reg = getX86SubSuperRegister(Reg, 32); 396 break; 397 case 'V': 398 EmitPercent = false; 399 LLVM_FALLTHROUGH; 400 case 'q': 401 // Print 64-bit register names if 64-bit integer registers are available. 402 // Otherwise, print 32-bit register names. 403 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32); 404 break; 405 } 406 407 if (EmitPercent) 408 O << '%'; 409 410 O << X86ATTInstPrinter::getRegisterName(Reg); 411 return false; 412} 413 414/// PrintAsmOperand - Print out an operand for an inline asm expression. 415/// 416bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 417 unsigned AsmVariant, 418 const char *ExtraCode, raw_ostream &O) { 419 // Does this asm operand have a single letter operand modifier? 420 if (ExtraCode && ExtraCode[0]) { 421 if (ExtraCode[1] != 0) return true; // Unknown modifier. 422 423 const MachineOperand &MO = MI->getOperand(OpNo); 424 425 switch (ExtraCode[0]) { 426 default: 427 // See if this is a generic print operand 428 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O); 429 case 'a': // This is an address. Currently only 'i' and 'r' are expected. 430 switch (MO.getType()) { 431 default: 432 return true; 433 case MachineOperand::MO_Immediate: 434 O << MO.getImm(); 435 return false; 436 case MachineOperand::MO_ConstantPoolIndex: 437 case MachineOperand::MO_JumpTableIndex: 438 case MachineOperand::MO_ExternalSymbol: 439 llvm_unreachable("unexpected operand type!"); 440 case MachineOperand::MO_GlobalAddress: 441 printSymbolOperand(*this, MO, O); 442 if (Subtarget->isPICStyleRIPRel()) 443 O << "(%rip)"; 444 return false; 445 case MachineOperand::MO_Register: 446 O << '('; 447 printOperand(*this, MI, OpNo, O); 448 O << ')'; 449 return false; 450 } 451 452 case 'c': // Don't print "$" before a global var name or constant. 453 switch (MO.getType()) { 454 default: 455 printOperand(*this, MI, OpNo, O); 456 break; 457 case MachineOperand::MO_Immediate: 458 O << MO.getImm(); 459 break; 460 case MachineOperand::MO_ConstantPoolIndex: 461 case MachineOperand::MO_JumpTableIndex: 462 case MachineOperand::MO_ExternalSymbol: 463 llvm_unreachable("unexpected operand type!"); 464 case MachineOperand::MO_GlobalAddress: 465 printSymbolOperand(*this, MO, O); 466 break; 467 } 468 return false; 469 470 case 'A': // Print '*' before a register (it must be a register) 471 if (MO.isReg()) { 472 O << '*'; 473 printOperand(*this, MI, OpNo, O); 474 return false; 475 } 476 return true; 477 478 case 'b': // Print QImode register 479 case 'h': // Print QImode high register 480 case 'w': // Print HImode register 481 case 'k': // Print SImode register 482 case 'q': // Print DImode register 483 case 'V': // Print native register without '%' 484 if (MO.isReg()) 485 return printAsmMRegister(*this, MO, ExtraCode[0], O); 486 printOperand(*this, MI, OpNo, O); 487 return false; 488 489 case 'P': // This is the operand of a call, treat specially. 490 printPCRelImm(*this, MI, OpNo, O); 491 return false; 492 493 case 'n': // Negate the immediate or print a '-' before the operand. 494 // Note: this is a temporary solution. It should be handled target 495 // independently as part of the 'MC' work. 496 if (MO.isImm()) { 497 O << -MO.getImm(); 498 return false; 499 } 500 O << '-'; 501 } 502 } 503 504 printOperand(*this, MI, OpNo, O, /*Modifier*/ nullptr, AsmVariant); 505 return false; 506} 507 508bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, 509 unsigned OpNo, unsigned AsmVariant, 510 const char *ExtraCode, 511 raw_ostream &O) { 512 if (AsmVariant) { 513 printIntelMemReference(*this, MI, OpNo, O); 514 return false; 515 } 516 517 if (ExtraCode && ExtraCode[0]) { 518 if (ExtraCode[1] != 0) return true; // Unknown modifier. 519 520 switch (ExtraCode[0]) { 521 default: return true; // Unknown modifier. 522 case 'b': // Print QImode register 523 case 'h': // Print QImode high register 524 case 'w': // Print HImode register 525 case 'k': // Print SImode register 526 case 'q': // Print SImode register 527 // These only apply to registers, ignore on mem. 528 break; 529 case 'H': 530 printMemReference(*this, MI, OpNo, O, "H"); 531 return false; 532 case 'P': // Don't print @PLT, but do print as memory. 533 printMemReference(*this, MI, OpNo, O, "no-rip"); 534 return false; 535 } 536 } 537 printMemReference(*this, MI, OpNo, O); 538 return false; 539} 540 541void X86AsmPrinter::EmitStartOfAsmFile(Module &M) { 542 const Triple &TT = TM.getTargetTriple(); 543 544 if (TT.isOSBinFormatELF()) { 545 // Assemble feature flags that may require creation of a note section. 546 unsigned FeatureFlagsAnd = 0; 547 if (M.getModuleFlag("cf-protection-branch")) 548 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT; 549 if (M.getModuleFlag("cf-protection-return")) 550 FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK; 551 552 if (FeatureFlagsAnd) { 553 // Emit a .note.gnu.property section with the flags. 554 if (!TT.isArch32Bit() && !TT.isArch64Bit()) 555 llvm_unreachable("CFProtection used on invalid architecture!"); 556 MCSection *Cur = OutStreamer->getCurrentSectionOnly(); 557 MCSection *Nt = MMI->getContext().getELFSection( 558 ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC); 559 OutStreamer->SwitchSection(Nt); 560 561 // Emitting note header. 562 int WordSize = TT.isArch64Bit() ? 8 : 4; 563 EmitAlignment(WordSize == 4 ? 2 : 3); 564 OutStreamer->EmitIntValue(4, 4 /*size*/); // data size for "GNU\0" 565 OutStreamer->EmitIntValue(8 + WordSize, 4 /*size*/); // Elf_Prop size 566 OutStreamer->EmitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4 /*size*/); 567 OutStreamer->EmitBytes(StringRef("GNU", 4)); // note name 568 569 // Emitting an Elf_Prop for the CET properties. 570 OutStreamer->EmitIntValue(ELF::GNU_PROPERTY_X86_FEATURE_1_AND, 4); 571 OutStreamer->EmitIntValue(WordSize, 4); // data size 572 OutStreamer->EmitIntValue(FeatureFlagsAnd, WordSize); // data 573 EmitAlignment(WordSize == 4 ? 2 : 3); // padding 574 575 OutStreamer->endSection(Nt); 576 OutStreamer->SwitchSection(Cur); 577 } 578 } 579 580 if (TT.isOSBinFormatMachO()) 581 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 582 583 if (TT.isOSBinFormatCOFF()) { 584 // Emit an absolute @feat.00 symbol. This appears to be some kind of 585 // compiler features bitfield read by link.exe. 586 if (TT.getArch() == Triple::x86) { 587 MCSymbol *S = MMI->getContext().getOrCreateSymbol(StringRef("@feat.00")); 588 OutStreamer->BeginCOFFSymbolDef(S); 589 OutStreamer->EmitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_STATIC); 590 OutStreamer->EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_NULL); 591 OutStreamer->EndCOFFSymbolDef(); 592 // According to the PE-COFF spec, the LSB of this value marks the object 593 // for "registered SEH". This means that all SEH handler entry points 594 // must be registered in .sxdata. Use of any unregistered handlers will 595 // cause the process to terminate immediately. LLVM does not know how to 596 // register any SEH handlers, so its object files should be safe. 597 OutStreamer->EmitSymbolAttribute(S, MCSA_Global); 598 OutStreamer->EmitAssignment( 599 S, MCConstantExpr::create(int64_t(1), MMI->getContext())); 600 } 601 } 602 OutStreamer->EmitSyntaxDirective(); 603 604 // If this is not inline asm and we're in 16-bit 605 // mode prefix assembly with .code16. 606 bool is16 = TT.getEnvironment() == Triple::CODE16; 607 if (M.getModuleInlineAsm().empty() && is16) 608 OutStreamer->EmitAssemblerFlag(MCAF_Code16); 609} 610 611static void 612emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel, 613 MachineModuleInfoImpl::StubValueTy &MCSym) { 614 // L_foo$stub: 615 OutStreamer.EmitLabel(StubLabel); 616 // .indirect_symbol _foo 617 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol); 618 619 if (MCSym.getInt()) 620 // External to current translation unit. 621 OutStreamer.EmitIntValue(0, 4/*size*/); 622 else 623 // Internal to current translation unit. 624 // 625 // When we place the LSDA into the TEXT section, the type info 626 // pointers need to be indirect and pc-rel. We accomplish this by 627 // using NLPs; however, sometimes the types are local to the file. 628 // We need to fill in the value for the NLP in those cases. 629 OutStreamer.EmitValue( 630 MCSymbolRefExpr::create(MCSym.getPointer(), OutStreamer.getContext()), 631 4 /*size*/); 632} 633 634static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) { 635 636 MachineModuleInfoMachO &MMIMacho = 637 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 638 639 // Output stubs for dynamically-linked functions. 640 MachineModuleInfoMachO::SymbolListTy Stubs; 641 642 // Output stubs for external and common global variables. 643 Stubs = MMIMacho.GetGVStubList(); 644 if (!Stubs.empty()) { 645 OutStreamer.SwitchSection(MMI->getContext().getMachOSection( 646 "__IMPORT", "__pointers", MachO::S_NON_LAZY_SYMBOL_POINTERS, 647 SectionKind::getMetadata())); 648 649 for (auto &Stub : Stubs) 650 emitNonLazySymbolPointer(OutStreamer, Stub.first, Stub.second); 651 652 Stubs.clear(); 653 OutStreamer.AddBlankLine(); 654 } 655} 656 657void X86AsmPrinter::EmitEndOfAsmFile(Module &M) { 658 const Triple &TT = TM.getTargetTriple(); 659 660 if (TT.isOSBinFormatMachO()) { 661 // Mach-O uses non-lazy symbol stubs to encode per-TU information into 662 // global table for symbol lookup. 663 emitNonLazyStubs(MMI, *OutStreamer); 664 665 // Emit stack and fault map information. 666 SM.serializeToStackMapSection(); 667 FM.serializeToFaultMapSection(); 668 669 // This flag tells the linker that no global symbols contain code that fall 670 // through to other global symbols (e.g. an implementation of multiple entry 671 // points). If this doesn't occur, the linker can safely perform dead code 672 // stripping. Since LLVM never generates code that does this, it is always 673 // safe to set. 674 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 675 return; 676 } 677 678 if (TT.isKnownWindowsMSVCEnvironment() && MMI->usesVAFloatArgument()) { 679 StringRef SymbolName = 680 (TT.getArch() == Triple::x86_64) ? "_fltused" : "__fltused"; 681 MCSymbol *S = MMI->getContext().getOrCreateSymbol(SymbolName); 682 OutStreamer->EmitSymbolAttribute(S, MCSA_Global); 683 return; 684 } 685 686 if (TT.isOSBinFormatCOFF()) { 687 SM.serializeToStackMapSection(); 688 return; 689 } 690 691 if (TT.isOSBinFormatELF()) { 692 SM.serializeToStackMapSection(); 693 FM.serializeToFaultMapSection(); 694 return; 695 } 696} 697 698//===----------------------------------------------------------------------===// 699// Target Registry Stuff 700//===----------------------------------------------------------------------===// 701 702// Force static initialization. 703extern "C" void LLVMInitializeX86AsmPrinter() { 704 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target()); 705 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target()); 706} 707