X86.h revision 363496 
1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the x86
10// target library, as used by the LLVM JIT.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86_H
15#define LLVM_LIB_TARGET_X86_X86_H
16
17#include "llvm/Support/CodeGen.h"
18
19namespace llvm {
20
21class FunctionPass;
22class ImmutablePass;
23class InstructionSelector;
24class ModulePass;
25class PassRegistry;
26class X86RegisterBankInfo;
27class X86Subtarget;
28class X86TargetMachine;
29
30/// This pass converts a legalized DAG into a X86-specific DAG, ready for
31/// instruction scheduling.
32FunctionPass *createX86ISelDag(X86TargetMachine &TM,
33                               CodeGenOpt::Level OptLevel);
34
35/// This pass initializes a global base register for PIC on x86-32.
36FunctionPass *createX86GlobalBaseRegPass();
37
38/// This pass combines multiple accesses to local-dynamic TLS variables so that
39/// the TLS base address for the module is only fetched once per execution path
40/// through the function.
41FunctionPass *createCleanupLocalDynamicTLSPass();
42
43/// This function returns a pass which converts floating-point register
44/// references and pseudo instructions into floating-point stack references and
45/// physical instructions.
46FunctionPass *createX86FloatingPointStackifierPass();
47
48/// This pass inserts AVX vzeroupper instructions before each call to avoid
49/// transition penalty between functions encoded with AVX and SSE.
50FunctionPass *createX86IssueVZeroUpperPass();
51
52/// This pass inserts ENDBR instructions before indirect jump/call
53/// destinations as part of CET IBT mechanism.
54FunctionPass *createX86IndirectBranchTrackingPass();
55
56/// Return a pass that pads short functions with NOOPs.
57/// This will prevent a stall when returning on the Atom.
58FunctionPass *createX86PadShortFunctions();
59
60/// Return a pass that selectively replaces certain instructions (like add,
61/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
62/// instructions, in order to eliminate execution delays in some processors.
63FunctionPass *createX86FixupLEAs();
64
65/// Return a pass that removes redundant LEA instructions and redundant address
66/// recalculations.
67FunctionPass *createX86OptimizeLEAs();
68
69/// Return a pass that transforms setcc + movzx pairs into xor + setcc.
70FunctionPass *createX86FixupSetCC();
71
72/// Return a pass that folds conditional branch jumps.
73FunctionPass *createX86CondBrFolding();
74
75/// Return a pass that avoids creating store forward block issues in the hardware.
76FunctionPass *createX86AvoidStoreForwardingBlocks();
77
78/// Return a pass that lowers EFLAGS copy pseudo instructions.
79FunctionPass *createX86FlagsCopyLoweringPass();
80
81/// Return a pass that expands WinAlloca pseudo-instructions.
82FunctionPass *createX86WinAllocaExpander();
83
84/// Return a pass that inserts int3 at the end of the function if it ends with a
85/// CALL instruction. The pass does the same for each funclet as well. This
86/// ensures that the open interval of function start and end PCs contains all
87/// return addresses for the benefit of the Windows x64 unwinder.
88FunctionPass *createX86AvoidTrailingCallPass();
89
90/// Return a pass that optimizes the code-size of x86 call sequences. This is
91/// done by replacing esp-relative movs with pushes.
92FunctionPass *createX86CallFrameOptimization();
93
94/// Return an IR pass that inserts EH registration stack objects and explicit
95/// EH state updates. This pass must run after EH preparation, which does
96/// Windows-specific but architecture-neutral preparation.
97FunctionPass *createX86WinEHStatePass();
98
99/// Return a Machine IR pass that expands X86-specific pseudo
100/// instructions into a sequence of actual instructions. This pass
101/// must run after prologue/epilogue insertion and before lowering
102/// the MachineInstr to MC.
103FunctionPass *createX86ExpandPseudoPass();
104
105/// This pass converts X86 cmov instructions into branch when profitable.
106FunctionPass *createX86CmovConverterPass();
107
108/// Return a Machine IR pass that selectively replaces
109/// certain byte and word instructions by equivalent 32 bit instructions,
110/// in order to eliminate partial register usage, false dependences on
111/// the upper portions of registers, and to save code size.
112FunctionPass *createX86FixupBWInsts();
113
114/// Return a Machine IR pass that reassigns instruction chains from one domain
115/// to another, when profitable.
116FunctionPass *createX86DomainReassignmentPass();
117
118/// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX
119/// encoding when possible in order to reduce code size.
120FunctionPass *createX86EvexToVexInsts();
121
122/// This pass creates the thunks for the retpoline feature.
123FunctionPass *createX86IndirectThunksPass();
124
125/// This pass ensures instructions featuring a memory operand
126/// have distinctive <LineNumber, Discriminator> (with respect to eachother)
127FunctionPass *createX86DiscriminateMemOpsPass();
128
129/// This pass applies profiling information to insert cache prefetches.
130FunctionPass *createX86InsertPrefetchPass();
131
132InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
133                                                  X86Subtarget &,
134                                                  X86RegisterBankInfo &);
135
136FunctionPass *createX86LoadValueInjectionLoadHardeningPass();
137FunctionPass *createX86LoadValueInjectionLoadHardeningUnoptimizedPass();
138FunctionPass *createX86LoadValueInjectionRetHardeningPass();
139FunctionPass *createX86SpeculativeLoadHardeningPass();
140
141void initializeEvexToVexInstPassPass(PassRegistry &);
142void initializeFixupBWInstPassPass(PassRegistry &);
143void initializeFixupLEAPassPass(PassRegistry &);
144void initializeFPSPass(PassRegistry &);
145void initializeWinEHStatePassPass(PassRegistry &);
146void initializeX86AvoidSFBPassPass(PassRegistry &);
147void initializeX86CallFrameOptimizationPass(PassRegistry &);
148void initializeX86CmovConverterPassPass(PassRegistry &);
149void initializeX86CondBrFoldingPassPass(PassRegistry &);
150void initializeX86DomainReassignmentPass(PassRegistry &);
151void initializeX86ExecutionDomainFixPass(PassRegistry &);
152void initializeX86ExpandPseudoPass(PassRegistry &);
153void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);
154void initializeX86LoadValueInjectionLoadHardeningUnoptimizedPassPass(PassRegistry &);
155void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);
156void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &);
157void initializeX86OptimizeLEAPassPass(PassRegistry &);
158void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
159
160namespace X86AS {
161enum : unsigned {
162  GS = 256,
163  FS = 257,
164  SS = 258,
165  PTR32_SPTR = 270,
166  PTR32_UPTR = 271,
167  PTR64 = 272
168};
169} // End X86AS namespace
170
171} // End llvm namespace
172
173#endif
174