WebAssemblyRegisterInfo.td revision 296417
1285163Sdim//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*- 2285163Sdim// 3285163Sdim// The LLVM Compiler Infrastructure 4285163Sdim// 5285163Sdim// This file is distributed under the University of Illinois Open Source 6285163Sdim// License. See LICENSE.TXT for details. 7285163Sdim// 8285163Sdim//===----------------------------------------------------------------------===// 9286684Sdim/// 10286684Sdim/// \file 11286684Sdim/// \brief This file describes the WebAssembly register classes and some nominal 12286684Sdim/// physical registers. 13286684Sdim/// 14285163Sdim//===----------------------------------------------------------------------===// 15285163Sdim 16285163Sdimclass WebAssemblyReg<string n> : Register<n> { 17285163Sdim let Namespace = "WebAssembly"; 18285163Sdim} 19285163Sdim 20285163Sdimclass WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList> 21285163Sdim : RegisterClass<"WebAssembly", regTypes, alignment, regList>; 22285163Sdim 23285163Sdim//===----------------------------------------------------------------------===// 24285163Sdim// Registers 25285163Sdim//===----------------------------------------------------------------------===// 26285163Sdim 27286684Sdim// Special registers used as the frame and stack pointer. 28286684Sdim// 29286684Sdim// WebAssembly may someday supports mixed 32-bit and 64-bit heaps in the same 30286684Sdim// application, which requires separate width FP and SP. 31286684Sdimdef FP32 : WebAssemblyReg<"%FP32">; 32286684Sdimdef FP64 : WebAssemblyReg<"%FP64">; 33286684Sdimdef SP32 : WebAssemblyReg<"%SP32">; 34286684Sdimdef SP64 : WebAssemblyReg<"%SP64">; 35286684Sdim 36296417Sdim// The register allocation framework requires register classes have at least 37296417Sdim// one register, so we define a few for the floating point register classes 38296417Sdim// since we otherwise don't need a physical register in those classes. 39296417Sdimdef F32_0 : WebAssemblyReg<"%f32.0">; 40296417Sdimdef F64_0 : WebAssemblyReg<"%f64.0">; 41286684Sdim 42296417Sdim// The expression stack "register". This is an opaque entity which serves to 43296417Sdim// order uses and defs that must remain in LIFO order. 44296417Sdimdef EXPR_STACK : WebAssemblyReg<"STACK">; 45296417Sdim 46296417Sdim// The incoming arguments "register". This is an opaque entity which serves to 47296417Sdim// order the ARGUMENT instructions that are emulating live-in registers and 48296417Sdim// must not be scheduled below other instructions. 49296417Sdimdef ARGUMENTS : WebAssemblyReg<"ARGUMENTS">; 50296417Sdim 51285163Sdim//===----------------------------------------------------------------------===// 52285163Sdim// Register classes 53285163Sdim//===----------------------------------------------------------------------===// 54286684Sdim 55296417Sdimdef I32 : WebAssemblyRegClass<[i32], 32, (add FP32, SP32)>; 56296417Sdimdef I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64)>; 57296417Sdimdef F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>; 58296417Sdimdef F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>; 59