1285163Sdim//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*- 2285163Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6285163Sdim// 7285163Sdim//===----------------------------------------------------------------------===// 8286684Sdim/// 9286684Sdim/// \file 10341825Sdim/// This file describes the WebAssembly register classes and some nominal 11286684Sdim/// physical registers. 12286684Sdim/// 13285163Sdim//===----------------------------------------------------------------------===// 14285163Sdim 15285163Sdimclass WebAssemblyReg<string n> : Register<n> { 16285163Sdim let Namespace = "WebAssembly"; 17285163Sdim} 18285163Sdim 19285163Sdimclass WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList> 20285163Sdim : RegisterClass<"WebAssembly", regTypes, alignment, regList>; 21285163Sdim 22285163Sdim//===----------------------------------------------------------------------===// 23285163Sdim// Registers 24285163Sdim//===----------------------------------------------------------------------===// 25285163Sdim 26286684Sdim// Special registers used as the frame and stack pointer. 27286684Sdim// 28286684Sdim// WebAssembly may someday supports mixed 32-bit and 64-bit heaps in the same 29286684Sdim// application, which requires separate width FP and SP. 30286684Sdimdef FP32 : WebAssemblyReg<"%FP32">; 31286684Sdimdef FP64 : WebAssemblyReg<"%FP64">; 32286684Sdimdef SP32 : WebAssemblyReg<"%SP32">; 33286684Sdimdef SP64 : WebAssemblyReg<"%SP64">; 34286684Sdim 35296417Sdim// The register allocation framework requires register classes have at least 36341825Sdim// one register, so we define a few for the integer / floating point register 37341825Sdim// classes since we otherwise don't need a physical register in those classes. 38341825Sdim// These are also used a "types" in the generated assembly matcher. 39341825Sdimdef I32_0 : WebAssemblyReg<"%i32.0">; 40341825Sdimdef I64_0 : WebAssemblyReg<"%i64.0">; 41296417Sdimdef F32_0 : WebAssemblyReg<"%f32.0">; 42296417Sdimdef F64_0 : WebAssemblyReg<"%f64.0">; 43286684Sdim 44314564Sdimdef V128_0: WebAssemblyReg<"%v128">; 45296417Sdim 46353358Sdimdef EXNREF_0 : WebAssemblyReg<"%exnref.0">; 47341825Sdim 48314564Sdim// The value stack "register". This is an opaque entity which serves to order 49314564Sdim// uses and defs that must remain in LIFO order. 50314564Sdimdef VALUE_STACK : WebAssemblyReg<"STACK">; 51314564Sdim 52296417Sdim// The incoming arguments "register". This is an opaque entity which serves to 53296417Sdim// order the ARGUMENT instructions that are emulating live-in registers and 54296417Sdim// must not be scheduled below other instructions. 55296417Sdimdef ARGUMENTS : WebAssemblyReg<"ARGUMENTS">; 56296417Sdim 57285163Sdim//===----------------------------------------------------------------------===// 58285163Sdim// Register classes 59285163Sdim//===----------------------------------------------------------------------===// 60286684Sdim 61341825Sdimdef I32 : WebAssemblyRegClass<[i32], 32, (add FP32, SP32, I32_0)>; 62341825Sdimdef I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64, I64_0)>; 63296417Sdimdef F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>; 64296417Sdimdef F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>; 65344779Sdimdef V128 : WebAssemblyRegClass<[v4f32, v2f64, v2i64, v4i32, v16i8, v8i16], 128, 66344779Sdim (add V128_0)>; 67353358Sdimdef EXNREF : WebAssemblyRegClass<[exnref], 0, (add EXNREF_0)>; 68