WebAssemblyMachineFunctionInfo.h revision 321369
1296417Sdim// WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*- 2285163Sdim// 3285163Sdim// The LLVM Compiler Infrastructure 4285163Sdim// 5285163Sdim// This file is distributed under the University of Illinois Open Source 6285163Sdim// License. See LICENSE.TXT for details. 7285163Sdim// 8285163Sdim//===----------------------------------------------------------------------===// 9285163Sdim/// 10285163Sdim/// \file 11285163Sdim/// \brief This file declares WebAssembly-specific per-machine-function 12285163Sdim/// information. 13285163Sdim/// 14285163Sdim//===----------------------------------------------------------------------===// 15285163Sdim 16285163Sdim#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 17285163Sdim#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 18285163Sdim 19296417Sdim#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 20285163Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 21285163Sdim 22285163Sdimnamespace llvm { 23285163Sdim 24285163Sdim/// This class is derived from MachineFunctionInfo and contains private 25285163Sdim/// WebAssembly-specific information for each MachineFunction. 26285163Sdimclass WebAssemblyFunctionInfo final : public MachineFunctionInfo { 27285163Sdim MachineFunction &MF; 28285163Sdim 29296417Sdim std::vector<MVT> Params; 30314564Sdim std::vector<MVT> Results; 31314564Sdim std::vector<MVT> Locals; 32296417Sdim 33296417Sdim /// A mapping from CodeGen vreg index to WebAssembly register number. 34296417Sdim std::vector<unsigned> WARegs; 35296417Sdim 36296417Sdim /// A mapping from CodeGen vreg index to a boolean value indicating whether 37296417Sdim /// the given register is considered to be "stackified", meaning it has been 38296417Sdim /// determined or made to meet the stack requirements: 39296417Sdim /// - single use (per path) 40296417Sdim /// - single def (per path) 41296417Sdim /// - defined and used in LIFO order with other stack registers 42296417Sdim BitVector VRegStackified; 43296417Sdim 44309124Sdim // A virtual register holding the pointer to the vararg buffer for vararg 45309124Sdim // functions. It is created and set in TLI::LowerFormalArguments and read by 46309124Sdim // TLI::LowerVASTART 47309124Sdim unsigned VarargVreg = -1U; 48296417Sdim 49314564Sdim // A virtual register holding the base pointer for functions that have 50314564Sdim // overaligned values on the user stack. 51314564Sdim unsigned BasePtrVreg = -1U; 52314564Sdim 53309124Sdim public: 54309124Sdim explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {} 55285163Sdim ~WebAssemblyFunctionInfo() override; 56296417Sdim 57296417Sdim void addParam(MVT VT) { Params.push_back(VT); } 58296417Sdim const std::vector<MVT> &getParams() const { return Params; } 59296417Sdim 60314564Sdim void addResult(MVT VT) { Results.push_back(VT); } 61314564Sdim const std::vector<MVT> &getResults() const { return Results; } 62314564Sdim 63321369Sdim void setNumLocals(size_t NumLocals) { Locals.resize(NumLocals, MVT::i32); } 64321369Sdim void setLocal(size_t i, MVT VT) { Locals[i] = VT; } 65314564Sdim void addLocal(MVT VT) { Locals.push_back(VT); } 66314564Sdim const std::vector<MVT> &getLocals() const { return Locals; } 67314564Sdim 68309124Sdim unsigned getVarargBufferVreg() const { 69309124Sdim assert(VarargVreg != -1U && "Vararg vreg hasn't been set"); 70309124Sdim return VarargVreg; 71309124Sdim } 72309124Sdim void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } 73309124Sdim 74314564Sdim unsigned getBasePointerVreg() const { 75314564Sdim assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set"); 76314564Sdim return BasePtrVreg; 77314564Sdim } 78314564Sdim void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; } 79314564Sdim 80296417Sdim static const unsigned UnusedReg = -1u; 81296417Sdim 82296417Sdim void stackifyVReg(unsigned VReg) { 83314564Sdim assert(MF.getRegInfo().getUniqueVRegDef(VReg)); 84296417Sdim if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) 85296417Sdim VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1); 86296417Sdim VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg)); 87296417Sdim } 88296417Sdim bool isVRegStackified(unsigned VReg) const { 89296417Sdim if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) 90296417Sdim return false; 91296417Sdim return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg)); 92296417Sdim } 93296417Sdim 94296417Sdim void initWARegs(); 95296417Sdim void setWAReg(unsigned VReg, unsigned WAReg) { 96296417Sdim assert(WAReg != UnusedReg); 97296417Sdim assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size()); 98296417Sdim WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg; 99296417Sdim } 100296417Sdim unsigned getWAReg(unsigned Reg) const { 101309124Sdim assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size()); 102309124Sdim return WARegs[TargetRegisterInfo::virtReg2Index(Reg)]; 103296417Sdim } 104296417Sdim 105309124Sdim // For a given stackified WAReg, return the id number to print with push/pop. 106309124Sdim static unsigned getWARegStackId(unsigned Reg) { 107309124Sdim assert(Reg & INT32_MIN); 108309124Sdim return Reg & INT32_MAX; 109296417Sdim } 110285163Sdim}; 111285163Sdim 112314564Sdimvoid ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, 113314564Sdim Type *Ty, SmallVectorImpl<MVT> &ValueVTs); 114314564Sdim 115314564Sdimvoid ComputeSignatureVTs(const Function &F, const TargetMachine &TM, 116314564Sdim SmallVectorImpl<MVT> &Params, 117314564Sdim SmallVectorImpl<MVT> &Results); 118314564Sdim 119285163Sdim} // end namespace llvm 120285163Sdim 121285163Sdim#endif 122