WebAssemblyInstrInteger.td revision 309124
1// WebAssemblyInstrInteger.td-WebAssembly Integer codegen -------*- tablegen -*-
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief WebAssembly Integer operand code-gen constructs.
12///
13//===----------------------------------------------------------------------===//
14
15let Defs = [ARGUMENTS] in {
16
17// The spaces after the names are for aesthetic purposes only, to make
18// operands line up vertically after tab expansion.
19let isCommutable = 1 in
20defm ADD : BinaryInt<add, "add ">;
21defm SUB : BinaryInt<sub, "sub ">;
22let isCommutable = 1 in
23defm MUL : BinaryInt<mul, "mul ">;
24// Divide and remainder trap on a zero denominator.
25let hasSideEffects = 1 in {
26defm DIV_S : BinaryInt<sdiv, "div_s">;
27defm DIV_U : BinaryInt<udiv, "div_u">;
28defm REM_S : BinaryInt<srem, "rem_s">;
29defm REM_U : BinaryInt<urem, "rem_u">;
30} // hasSideEffects = 1
31let isCommutable = 1 in {
32defm AND : BinaryInt<and, "and ">;
33defm OR : BinaryInt<or, "or  ">;
34defm XOR : BinaryInt<xor, "xor ">;
35} // isCommutable = 1
36defm SHL : BinaryInt<shl, "shl ">;
37defm SHR_U : BinaryInt<srl, "shr_u">;
38defm SHR_S : BinaryInt<sra, "shr_s">;
39defm ROTL : BinaryInt<rotl, "rotl">;
40defm ROTR : BinaryInt<rotr, "rotr">;
41
42let isCommutable = 1 in {
43defm EQ : ComparisonInt<SETEQ, "eq  ">;
44defm NE : ComparisonInt<SETNE, "ne  ">;
45} // isCommutable = 1
46defm LT_S : ComparisonInt<SETLT, "lt_s">;
47defm LE_S : ComparisonInt<SETLE, "le_s">;
48defm LT_U : ComparisonInt<SETULT, "lt_u">;
49defm LE_U : ComparisonInt<SETULE, "le_u">;
50defm GT_S : ComparisonInt<SETGT, "gt_s">;
51defm GE_S : ComparisonInt<SETGE, "ge_s">;
52defm GT_U : ComparisonInt<SETUGT, "gt_u">;
53defm GE_U : ComparisonInt<SETUGE, "ge_u">;
54
55defm CLZ : UnaryInt<ctlz, "clz ">;
56defm CTZ : UnaryInt<cttz, "ctz ">;
57defm POPCNT : UnaryInt<ctpop, "popcnt">;
58
59def EQZ_I32 : I<(outs I32:$dst), (ins I32:$src),
60                [(set I32:$dst, (setcc I32:$src, 0, SETEQ))],
61                "i32.eqz \t$dst, $src">;
62def EQZ_I64 : I<(outs I32:$dst), (ins I64:$src),
63                [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
64                "i64.eqz \t$dst, $src">;
65
66} // Defs = [ARGUMENTS]
67
68// Optimize away an explicit mask on a rotate count.
69def : Pat<(rotl I32:$lhs, (and I32:$rhs, 31)), (ROTL_I32 I32:$lhs, I32:$rhs)>;
70def : Pat<(rotr I32:$lhs, (and I32:$rhs, 31)), (ROTR_I32 I32:$lhs, I32:$rhs)>;
71def : Pat<(rotl I64:$lhs, (and I64:$rhs, 63)), (ROTL_I64 I64:$lhs, I64:$rhs)>;
72def : Pat<(rotr I64:$lhs, (and I64:$rhs, 63)), (ROTR_I64 I64:$lhs, I64:$rhs)>;
73
74let Defs = [ARGUMENTS] in {
75
76def SELECT_I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs, I32:$cond),
77                   [(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))],
78                   "i32.select\t$dst, $lhs, $rhs, $cond">;
79def SELECT_I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs, I32:$cond),
80                   [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))],
81                   "i64.select\t$dst, $lhs, $rhs, $cond">;
82
83} // Defs = [ARGUMENTS]
84
85// ISD::SELECT requires its operand to conform to getBooleanContents, but
86// WebAssembly's select interprets any non-zero value as true, so we can fold
87// a setne with 0 into a select.
88def : Pat<(select (i32 (setne I32:$cond, 0)), I32:$lhs, I32:$rhs),
89          (SELECT_I32 I32:$lhs, I32:$rhs, I32:$cond)>;
90def : Pat<(select (i32 (setne I32:$cond, 0)), I64:$lhs, I64:$rhs),
91          (SELECT_I64 I64:$lhs, I64:$rhs, I32:$cond)>;
92
93// And again, this time with seteq instead of setne and the arms reversed.
94def : Pat<(select (i32 (seteq I32:$cond, 0)), I32:$lhs, I32:$rhs),
95          (SELECT_I32 I32:$rhs, I32:$lhs, I32:$cond)>;
96def : Pat<(select (i32 (seteq I32:$cond, 0)), I64:$lhs, I64:$rhs),
97          (SELECT_I64 I64:$rhs, I64:$lhs, I32:$cond)>;
98