WebAssemblyISelLowering.h revision 355940 
1//- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the interfaces that WebAssembly uses to lower LLVM
11/// code into a selection DAG.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17
18#include "llvm/CodeGen/TargetLowering.h"
19
20namespace llvm {
21
22namespace WebAssemblyISD {
23
24enum NodeType : unsigned {
25  FIRST_NUMBER = ISD::BUILTIN_OP_END,
26#define HANDLE_NODETYPE(NODE) NODE,
27#include "WebAssemblyISD.def"
28#undef HANDLE_NODETYPE
29};
30
31} // end namespace WebAssemblyISD
32
33class WebAssemblySubtarget;
34class WebAssemblyTargetMachine;
35
36class WebAssemblyTargetLowering final : public TargetLowering {
37public:
38  WebAssemblyTargetLowering(const TargetMachine &TM,
39                            const WebAssemblySubtarget &STI);
40
41private:
42  /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
43  /// right decision when generating code for different targets.
44  const WebAssemblySubtarget *Subtarget;
45
46  AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
47  FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
48                           const TargetLibraryInfo *LibInfo) const override;
49  MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
50  MachineBasicBlock *
51  EmitInstrWithCustomInserter(MachineInstr &MI,
52                              MachineBasicBlock *MBB) const override;
53  const char *getTargetNodeName(unsigned Opcode) const override;
54  std::pair<unsigned, const TargetRegisterClass *>
55  getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
56                               StringRef Constraint, MVT VT) const override;
57  bool isCheapToSpeculateCttz() const override;
58  bool isCheapToSpeculateCtlz() const override;
59  bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
60                             unsigned AS,
61                             Instruction *I = nullptr) const override;
62  bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align,
63                                      MachineMemOperand::Flags Flags,
64                                      bool *Fast) const override;
65  bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
66
67  EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
68                         EVT VT) const override;
69  bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
70                          MachineFunction &MF,
71                          unsigned Intrinsic) const override;
72
73  SDValue LowerCall(CallLoweringInfo &CLI,
74                    SmallVectorImpl<SDValue> &InVals) const override;
75  bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
76                      bool isVarArg,
77                      const SmallVectorImpl<ISD::OutputArg> &Outs,
78                      LLVMContext &Context) const override;
79  SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
80                      const SmallVectorImpl<ISD::OutputArg> &Outs,
81                      const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
82                      SelectionDAG &DAG) const override;
83  SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
84                               bool IsVarArg,
85                               const SmallVectorImpl<ISD::InputArg> &Ins,
86                               const SDLoc &DL, SelectionDAG &DAG,
87                               SmallVectorImpl<SDValue> &InVals) const override;
88
89  void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
90                          SelectionDAG &DAG) const override;
91
92  const char *getClearCacheBuiltinName() const override {
93    report_fatal_error("llvm.clear_cache is not supported on wasm");
94  }
95
96  // Custom lowering hooks.
97  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
98  SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
99  SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
100  SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
101  SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
102  SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
103  SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
104  SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
105  SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
106  SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
107  SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
108  SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
109  SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
110  SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
111  SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
112  SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
113};
114
115namespace WebAssembly {
116FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
117                         const TargetLibraryInfo *libInfo);
118} // end namespace WebAssembly
119
120} // end namespace llvm
121
122#endif
123