WebAssemblyCallIndirectFixup.cpp revision 327952
1311116Sdim//===-- WebAssemblyCallIndirectFixup.cpp - Fix call_indirects -------------===// 2311116Sdim// 3311116Sdim// The LLVM Compiler Infrastructure 4311116Sdim// 5311116Sdim// This file is distributed under the University of Illinois Open Source 6311116Sdim// License. See LICENSE.TXT for details. 7311116Sdim// 8311116Sdim//===----------------------------------------------------------------------===// 9311116Sdim/// 10311116Sdim/// \file 11311116Sdim/// \brief This file converts pseudo call_indirect instructions into real 12311116Sdim/// call_indirects. 13311116Sdim/// 14311116Sdim/// The order of arguments for a call_indirect is the arguments to the function 15311116Sdim/// call, followed by the function pointer. There's no natural way to express 16311116Sdim/// a machineinstr with varargs followed by one more arg, so we express it as 17311116Sdim/// the function pointer followed by varargs, then rewrite it here. 18311116Sdim/// 19311116Sdim/// We need to rewrite the order of the arguments on the machineinstrs 20311116Sdim/// themselves so that register stackification knows the order they'll be 21311116Sdim/// executed in. 22311116Sdim/// 23311116Sdim//===----------------------------------------------------------------------===// 24311116Sdim 25321369Sdim#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" // for WebAssembly::ARGUMENT_* 26311116Sdim#include "WebAssembly.h" 27311116Sdim#include "WebAssemblyMachineFunctionInfo.h" 28311116Sdim#include "WebAssemblySubtarget.h" 29311116Sdim#include "llvm/Analysis/AliasAnalysis.h" 30327952Sdim#include "llvm/CodeGen/LiveIntervals.h" 31311116Sdim#include "llvm/CodeGen/MachineBlockFrequencyInfo.h" 32311116Sdim#include "llvm/CodeGen/MachineDominators.h" 33311116Sdim#include "llvm/CodeGen/MachineInstrBuilder.h" 34311116Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 35311116Sdim#include "llvm/CodeGen/Passes.h" 36311116Sdim#include "llvm/Support/Debug.h" 37311116Sdim#include "llvm/Support/raw_ostream.h" 38311116Sdimusing namespace llvm; 39311116Sdim 40311116Sdim#define DEBUG_TYPE "wasm-call-indirect-fixup" 41311116Sdim 42311116Sdimnamespace { 43311116Sdimclass WebAssemblyCallIndirectFixup final : public MachineFunctionPass { 44311116Sdim StringRef getPassName() const override { 45311116Sdim return "WebAssembly CallIndirect Fixup"; 46311116Sdim } 47311116Sdim 48311116Sdim bool runOnMachineFunction(MachineFunction &MF) override; 49311116Sdim 50311116Sdimpublic: 51311116Sdim static char ID; // Pass identification, replacement for typeid 52311116Sdim WebAssemblyCallIndirectFixup() : MachineFunctionPass(ID) {} 53311116Sdim}; 54311116Sdim} // end anonymous namespace 55311116Sdim 56311116Sdimchar WebAssemblyCallIndirectFixup::ID = 0; 57311116SdimFunctionPass *llvm::createWebAssemblyCallIndirectFixup() { 58311116Sdim return new WebAssemblyCallIndirectFixup(); 59311116Sdim} 60311116Sdim 61311116Sdimstatic unsigned GetNonPseudoCallIndirectOpcode(const MachineInstr &MI) { 62311116Sdim switch (MI.getOpcode()) { 63311116Sdim using namespace WebAssembly; 64311116Sdim case PCALL_INDIRECT_VOID: return CALL_INDIRECT_VOID; 65311116Sdim case PCALL_INDIRECT_I32: return CALL_INDIRECT_I32; 66311116Sdim case PCALL_INDIRECT_I64: return CALL_INDIRECT_I64; 67311116Sdim case PCALL_INDIRECT_F32: return CALL_INDIRECT_F32; 68311116Sdim case PCALL_INDIRECT_F64: return CALL_INDIRECT_F64; 69311116Sdim case PCALL_INDIRECT_v16i8: return CALL_INDIRECT_v16i8; 70311116Sdim case PCALL_INDIRECT_v8i16: return CALL_INDIRECT_v8i16; 71311116Sdim case PCALL_INDIRECT_v4i32: return CALL_INDIRECT_v4i32; 72311116Sdim case PCALL_INDIRECT_v4f32: return CALL_INDIRECT_v4f32; 73311116Sdim default: return INSTRUCTION_LIST_END; 74311116Sdim } 75311116Sdim} 76311116Sdim 77311116Sdimstatic bool IsPseudoCallIndirect(const MachineInstr &MI) { 78311116Sdim return GetNonPseudoCallIndirectOpcode(MI) != 79311116Sdim WebAssembly::INSTRUCTION_LIST_END; 80311116Sdim} 81311116Sdim 82311116Sdimbool WebAssemblyCallIndirectFixup::runOnMachineFunction(MachineFunction &MF) { 83311116Sdim DEBUG(dbgs() << "********** Fixing up CALL_INDIRECTs **********\n" 84311116Sdim << MF.getName() << '\n'); 85311116Sdim 86311116Sdim bool Changed = false; 87311116Sdim const WebAssemblyInstrInfo *TII = 88311116Sdim MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo(); 89311116Sdim 90311116Sdim for (MachineBasicBlock &MBB : MF) { 91311116Sdim for (MachineInstr &MI : MBB) { 92311116Sdim if (IsPseudoCallIndirect(MI)) { 93311116Sdim DEBUG(dbgs() << "Found call_indirect: " << MI << '\n'); 94311116Sdim 95311116Sdim // Rewrite pseudo to non-pseudo 96311116Sdim const MCInstrDesc &Desc = TII->get(GetNonPseudoCallIndirectOpcode(MI)); 97311116Sdim MI.setDesc(Desc); 98311116Sdim 99311116Sdim // Rewrite argument order 100321369Sdim SmallVector<MachineOperand, 8> Ops; 101311116Sdim 102321369Sdim // Set up a placeholder for the type signature immediate. 103321369Sdim Ops.push_back(MachineOperand::CreateImm(0)); 104321369Sdim 105311116Sdim // Set up the flags immediate, which currently has no defined flags 106311116Sdim // so it's always zero. 107321369Sdim Ops.push_back(MachineOperand::CreateImm(0)); 108311116Sdim 109321369Sdim for (const MachineOperand &MO : 110321369Sdim make_range(MI.operands_begin() + 111321369Sdim MI.getDesc().getNumDefs() + 1, 112321369Sdim MI.operands_begin() + 113321369Sdim MI.getNumExplicitOperands())) 114321369Sdim Ops.push_back(MO); 115321369Sdim Ops.push_back(MI.getOperand(MI.getDesc().getNumDefs())); 116311116Sdim 117321369Sdim // Replace the instructions operands. 118321369Sdim while (MI.getNumOperands() > MI.getDesc().getNumDefs()) 119321369Sdim MI.RemoveOperand(MI.getNumOperands() - 1); 120321369Sdim for (const MachineOperand &MO : Ops) 121321369Sdim MI.addOperand(MO); 122321369Sdim 123311116Sdim DEBUG(dbgs() << " After transform: " << MI); 124311116Sdim Changed = true; 125311116Sdim } 126311116Sdim } 127311116Sdim } 128311116Sdim 129311116Sdim DEBUG(dbgs() << "\nDone fixing up CALL_INDIRECTs\n\n"); 130311116Sdim 131311116Sdim return Changed; 132311116Sdim} 133311116Sdim 134