SystemZRegisterInfo.h revision 341825 
1//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
11#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
12
13#include "SystemZ.h"
14#include "llvm/CodeGen/TargetRegisterInfo.h"
15
16#define GET_REGINFO_HEADER
17#include "SystemZGenRegisterInfo.inc"
18
19namespace llvm {
20
21class LiveIntervals;
22
23namespace SystemZ {
24// Return the subreg to use for referring to the even and odd registers
25// in a GR128 pair.  Is32Bit says whether we want a GR32 or GR64.
26inline unsigned even128(bool Is32bit) {
27  return Is32bit ? subreg_hl32 : subreg_h64;
28}
29inline unsigned odd128(bool Is32bit) {
30  return Is32bit ? subreg_l32 : subreg_l64;
31}
32} // end namespace SystemZ
33
34struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
35public:
36  SystemZRegisterInfo();
37
38  /// getPointerRegClass - Return the register class to use to hold pointers.
39  /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0
40  /// register, hence ADDR64.
41  const TargetRegisterClass *
42  getPointerRegClass(const MachineFunction &MF,
43                     unsigned Kind=0) const override {
44    return &SystemZ::ADDR64BitRegClass;
45  }
46
47  /// getCrossCopyRegClass - Returns a legal register class to copy a register
48  /// in the specified class to or from. Returns NULL if it is possible to copy
49  /// between a two registers of the specified class.
50  const TargetRegisterClass *
51  getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
52
53  bool getRegAllocationHints(unsigned VirtReg,
54                             ArrayRef<MCPhysReg> Order,
55                             SmallVectorImpl<MCPhysReg> &Hints,
56                             const MachineFunction &MF,
57                             const VirtRegMap *VRM,
58                             const LiveRegMatrix *Matrix) const override;
59
60  bool enableMultipleCopyHints() const override { return true; }
61
62  // Override TargetRegisterInfo.h.
63  bool requiresRegisterScavenging(const MachineFunction &MF) const override {
64    return true;
65  }
66  bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
67    return true;
68  }
69  bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
70    return true;
71  }
72  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
73  const uint32_t *getCallPreservedMask(const MachineFunction &MF,
74                                       CallingConv::ID CC) const override;
75  BitVector getReservedRegs(const MachineFunction &MF) const override;
76  void eliminateFrameIndex(MachineBasicBlock::iterator MI,
77                           int SPAdj, unsigned FIOperandNum,
78                           RegScavenger *RS) const override;
79
80  /// SrcRC and DstRC will be morphed into NewRC if this returns true.
81 bool shouldCoalesce(MachineInstr *MI,
82                      const TargetRegisterClass *SrcRC,
83                      unsigned SubReg,
84                      const TargetRegisterClass *DstRC,
85                      unsigned DstSubReg,
86                      const TargetRegisterClass *NewRC,
87                      LiveIntervals &LIS) const override;
88
89  unsigned getFrameRegister(const MachineFunction &MF) const override;
90};
91
92} // end namespace llvm
93
94#endif
95