SystemZOperators.td revision 251607
1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Type profiles 12//===----------------------------------------------------------------------===// 13def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>; 18def SDT_ZBRCCMask : SDTypeProfile<0, 2, 19 [SDTCisVT<0, i8>, 20 SDTCisVT<1, OtherVT>]>; 21def SDT_ZSelectCCMask : SDTypeProfile<1, 3, 22 [SDTCisSameAs<0, 1>, 23 SDTCisSameAs<1, 2>, 24 SDTCisVT<3, i8>]>; 25def SDT_ZWrapPtr : SDTypeProfile<1, 1, 26 [SDTCisSameAs<0, 1>, 27 SDTCisPtrTy<0>]>; 28def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 29def SDT_ZExtractAccess : SDTypeProfile<1, 1, 30 [SDTCisVT<0, i32>, 31 SDTCisVT<1, i8>]>; 32def SDT_ZGR128Binary32 : SDTypeProfile<1, 2, 33 [SDTCisVT<0, untyped>, 34 SDTCisVT<1, untyped>, 35 SDTCisVT<2, i32>]>; 36def SDT_ZGR128Binary64 : SDTypeProfile<1, 2, 37 [SDTCisVT<0, untyped>, 38 SDTCisVT<1, untyped>, 39 SDTCisVT<2, i64>]>; 40def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 41 [SDTCisVT<0, i32>, 42 SDTCisPtrTy<1>, 43 SDTCisVT<2, i32>, 44 SDTCisVT<3, i32>, 45 SDTCisVT<4, i32>, 46 SDTCisVT<5, i32>]>; 47def SDT_ZAtomicCmpSwapW : SDTypeProfile<1, 6, 48 [SDTCisVT<0, i32>, 49 SDTCisPtrTy<1>, 50 SDTCisVT<2, i32>, 51 SDTCisVT<3, i32>, 52 SDTCisVT<4, i32>, 53 SDTCisVT<5, i32>, 54 SDTCisVT<6, i32>]>; 55 56//===----------------------------------------------------------------------===// 57// Node definitions 58//===----------------------------------------------------------------------===// 59 60// These are target-independent nodes, but have target-specific formats. 61def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 62 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 63def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 64 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 65 SDNPOutGlue]>; 66 67// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 68def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 69 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 70def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 71 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 72 SDNPVariadic]>; 73def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 74def z_cmp : SDNode<"SystemZISD::CMP", SDT_ZCmp, [SDNPOutGlue]>; 75def z_ucmp : SDNode<"SystemZISD::UCMP", SDT_ZCmp, [SDNPOutGlue]>; 76def z_br_ccmask : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 77 [SDNPHasChain, SDNPInGlue]>; 78def z_select_ccmask : SDNode<"SystemZISD::SELECT_CCMASK", SDT_ZSelectCCMask, 79 [SDNPInGlue]>; 80def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 81def z_extract_access : SDNode<"SystemZISD::EXTRACT_ACCESS", 82 SDT_ZExtractAccess>; 83def z_umul_lohi64 : SDNode<"SystemZISD::UMUL_LOHI64", SDT_ZGR128Binary64>; 84def z_sdivrem64 : SDNode<"SystemZISD::SDIVREM64", SDT_ZGR128Binary64>; 85def z_udivrem32 : SDNode<"SystemZISD::UDIVREM32", SDT_ZGR128Binary32>; 86def z_udivrem64 : SDNode<"SystemZISD::UDIVREM64", SDT_ZGR128Binary64>; 87 88class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 89 : SDNode<"SystemZISD::"##name, profile, 90 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 91 92def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 93def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 94def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 95def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 96def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 97def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 98def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 99def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 100def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 101def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 102def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 103def z_atomic_cmp_swapw : AtomicWOp<"ATOMIC_CMP_SWAPW", SDT_ZAtomicCmpSwapW>; 104 105//===----------------------------------------------------------------------===// 106// Pattern fragments 107//===----------------------------------------------------------------------===// 108 109// Register sign-extend operations. Sub-32-bit values are represented as i32s. 110def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 111def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 112def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 113 114// Register zero-extend operations. Sub-32-bit values are represented as i32s. 115def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 116def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 117def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 118 119// Typed floating-point loads. 120def loadf32 : PatFrag<(ops node:$src), (f32 (load node:$src))>; 121def loadf64 : PatFrag<(ops node:$src), (f64 (load node:$src))>; 122 123// Aligned loads. 124class AlignedLoad<SDPatternOperator load> 125 : PatFrag<(ops node:$addr), (load node:$addr), [{ 126 LoadSDNode *Load = cast<LoadSDNode>(N); 127 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 128}]>; 129def aligned_load : AlignedLoad<load>; 130def aligned_sextloadi16 : AlignedLoad<sextloadi16>; 131def aligned_sextloadi32 : AlignedLoad<sextloadi32>; 132def aligned_zextloadi16 : AlignedLoad<zextloadi16>; 133def aligned_zextloadi32 : AlignedLoad<zextloadi32>; 134 135// Aligned stores. 136class AlignedStore<SDPatternOperator store> 137 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 138 StoreSDNode *Store = cast<StoreSDNode>(N); 139 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 140}]>; 141def aligned_store : AlignedStore<store>; 142def aligned_truncstorei16 : AlignedStore<truncstorei16>; 143def aligned_truncstorei32 : AlignedStore<truncstorei32>; 144 145// Insertions. 146def inserti8 : PatFrag<(ops node:$src1, node:$src2), 147 (or (and node:$src1, -256), node:$src2)>; 148def insertll : PatFrag<(ops node:$src1, node:$src2), 149 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 150def insertlh : PatFrag<(ops node:$src1, node:$src2), 151 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 152def inserthl : PatFrag<(ops node:$src1, node:$src2), 153 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 154def inserthh : PatFrag<(ops node:$src1, node:$src2), 155 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 156def insertlf : PatFrag<(ops node:$src1, node:$src2), 157 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 158def inserthf : PatFrag<(ops node:$src1, node:$src2), 159 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 160 161// ORs that can be treated as insertions. 162def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 163 (or node:$src1, node:$src2), [{ 164 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 165 return CurDAG->MaskedValueIsZero(N->getOperand(0), 166 APInt::getLowBitsSet(BitWidth, 8)); 167}]>; 168 169// ORs that can be treated as reversed insertions. 170def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 171 (or node:$src1, node:$src2), [{ 172 unsigned BitWidth = N->getValueType(0).getScalarType().getSizeInBits(); 173 return CurDAG->MaskedValueIsZero(N->getOperand(1), 174 APInt::getLowBitsSet(BitWidth, 8)); 175}]>; 176 177// Fused multiply-add and multiply-subtract, but with the order of the 178// operands matching SystemZ's MA and MS instructions. 179def z_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 180 (fma node:$src2, node:$src3, node:$src1)>; 181def z_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 182 (fma node:$src2, node:$src3, (fneg node:$src1))>; 183 184// Floating-point negative absolute. 185def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 186 187// Create a unary operator that loads from memory and then performs 188// the given operation on it. 189class loadu<SDPatternOperator operator> 190 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 191 192// Create a store operator that performs the given unary operation 193// on the value before storing it. 194class storeu<SDPatternOperator operator> 195 : PatFrag<(ops node:$value, node:$addr), 196 (store (operator node:$value), node:$addr)>; 197