PPCTLSDynamicCall.cpp revision 360784 
1//===---------- PPCTLSDynamicCall.cpp - TLS Dynamic Call Fixup ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass expands ADDItls{ld,gd}LADDR[32] machine instructions into
10// separate ADDItls[gd]L[32] and GETtlsADDR[32] instructions, both of
11// which define GPR3.  A copy is added from GPR3 to the target virtual
12// register of the original instruction.  The GETtlsADDR[32] is really
13// a call instruction, so its target register is constrained to be GPR3.
14// This is not true of ADDItls[gd]L[32], but there is a legacy linker
15// optimization bug that requires the target register of the addi of
16// a local- or general-dynamic TLS access sequence to be GPR3.
17//
18// This is done in a late pass so that TLS variable accesses can be
19// fully commoned by MachineCSE.
20//
21//===----------------------------------------------------------------------===//
22
23#include "PPC.h"
24#include "PPCInstrBuilder.h"
25#include "PPCInstrInfo.h"
26#include "PPCTargetMachine.h"
27#include "llvm/CodeGen/LiveIntervals.h"
28#include "llvm/CodeGen/MachineFunctionPass.h"
29#include "llvm/CodeGen/MachineInstrBuilder.h"
30#include "llvm/InitializePasses.h"
31#include "llvm/Support/Debug.h"
32#include "llvm/Support/raw_ostream.h"
33
34using namespace llvm;
35
36#define DEBUG_TYPE "ppc-tls-dynamic-call"
37
38namespace {
39  struct PPCTLSDynamicCall : public MachineFunctionPass {
40    static char ID;
41    PPCTLSDynamicCall() : MachineFunctionPass(ID) {
42      initializePPCTLSDynamicCallPass(*PassRegistry::getPassRegistry());
43    }
44
45    const PPCInstrInfo *TII;
46    LiveIntervals *LIS;
47
48protected:
49    bool processBlock(MachineBasicBlock &MBB) {
50      bool Changed = false;
51      bool NeedFence = true;
52      bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
53
54      for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
55           I != IE;) {
56        MachineInstr &MI = *I;
57
58        if (MI.getOpcode() != PPC::ADDItlsgdLADDR &&
59            MI.getOpcode() != PPC::ADDItlsldLADDR &&
60            MI.getOpcode() != PPC::ADDItlsgdLADDR32 &&
61            MI.getOpcode() != PPC::ADDItlsldLADDR32) {
62
63          // Although we create ADJCALLSTACKDOWN and ADJCALLSTACKUP
64          // as scheduling fences, we skip creating fences if we already
65          // have existing ADJCALLSTACKDOWN/UP to avoid nesting,
66          // which causes verification error with -verify-machineinstrs.
67          if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN)
68            NeedFence = false;
69          else if (MI.getOpcode() == PPC::ADJCALLSTACKUP)
70            NeedFence = true;
71
72          ++I;
73          continue;
74        }
75
76        LLVM_DEBUG(dbgs() << "TLS Dynamic Call Fixup:\n    " << MI);
77
78        Register OutReg = MI.getOperand(0).getReg();
79        Register InReg = MI.getOperand(1).getReg();
80        DebugLoc DL = MI.getDebugLoc();
81        unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
82        unsigned Opc1, Opc2;
83        const unsigned OrigRegs[] = {OutReg, InReg, GPR3};
84
85        switch (MI.getOpcode()) {
86        default:
87          llvm_unreachable("Opcode inconsistency error");
88        case PPC::ADDItlsgdLADDR:
89          Opc1 = PPC::ADDItlsgdL;
90          Opc2 = PPC::GETtlsADDR;
91          break;
92        case PPC::ADDItlsldLADDR:
93          Opc1 = PPC::ADDItlsldL;
94          Opc2 = PPC::GETtlsldADDR;
95          break;
96        case PPC::ADDItlsgdLADDR32:
97          Opc1 = PPC::ADDItlsgdL32;
98          Opc2 = PPC::GETtlsADDR32;
99          break;
100        case PPC::ADDItlsldLADDR32:
101          Opc1 = PPC::ADDItlsldL32;
102          Opc2 = PPC::GETtlsldADDR32;
103          break;
104        }
105
106        // We create ADJCALLSTACKUP and ADJCALLSTACKDOWN around _tls_get_addr
107        // as scheduling fence to avoid it is scheduled before
108        // mflr in the prologue and the address in LR is clobbered (PR25839).
109        // We don't really need to save data to the stack - the clobbered
110        // registers are already saved when the SDNode (e.g. PPCaddiTlsgdLAddr)
111        // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR).
112        if (NeedFence)
113          BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0)
114                                                              .addImm(0);
115
116        // Expand into two ops built prior to the existing instruction.
117        MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3)
118          .addReg(InReg);
119        Addi->addOperand(MI.getOperand(2));
120
121        // The ADDItls* instruction is the first instruction in the
122        // repair range.
123        MachineBasicBlock::iterator First = I;
124        --First;
125
126        MachineInstr *Call = (BuildMI(MBB, I, DL, TII->get(Opc2), GPR3)
127                              .addReg(GPR3));
128        Call->addOperand(MI.getOperand(3));
129
130        if (NeedFence)
131          BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0);
132
133        BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg)
134          .addReg(GPR3);
135
136        // The COPY is the last instruction in the repair range.
137        MachineBasicBlock::iterator Last = I;
138        --Last;
139
140        // Move past the original instruction and remove it.
141        ++I;
142        MI.removeFromParent();
143
144        // Repair the live intervals.
145        LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs);
146        Changed = true;
147      }
148
149      return Changed;
150    }
151
152public:
153    bool runOnMachineFunction(MachineFunction &MF) override {
154      TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo();
155      LIS = &getAnalysis<LiveIntervals>();
156
157      bool Changed = false;
158
159      for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
160        MachineBasicBlock &B = *I++;
161        if (processBlock(B))
162          Changed = true;
163      }
164
165      return Changed;
166    }
167
168    void getAnalysisUsage(AnalysisUsage &AU) const override {
169      AU.addRequired<LiveIntervals>();
170      AU.addPreserved<LiveIntervals>();
171      AU.addRequired<SlotIndexes>();
172      AU.addPreserved<SlotIndexes>();
173      MachineFunctionPass::getAnalysisUsage(AU);
174    }
175  };
176}
177
178INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE,
179                      "PowerPC TLS Dynamic Call Fixup", false, false)
180INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
181INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
182INITIALIZE_PASS_END(PPCTLSDynamicCall, DEBUG_TYPE,
183                    "PowerPC TLS Dynamic Call Fixup", false, false)
184
185char PPCTLSDynamicCall::ID = 0;
186FunctionPass*
187llvm::createPPCTLSDynamicCallPass() { return new PPCTLSDynamicCall(); }
188