1226584Sdim//===-- PPCPredicates.h - PPC Branch Predicate Information ------*- C++ -*-===// 2226584Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6226584Sdim// 7226584Sdim//===----------------------------------------------------------------------===// 8226584Sdim// 9226584Sdim// This file describes the PowerPC branch predicates. 10226584Sdim// 11226584Sdim//===----------------------------------------------------------------------===// 12226584Sdim 13280031Sdim#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 14280031Sdim#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCPREDICATES_H 15226584Sdim 16249423Sdim// GCC #defines PPC on Linux but we use it as our namespace name 17249423Sdim#undef PPC 18249423Sdim 19249423Sdim// Generated files will use "namespace PPC". To avoid symbol clash, 20249423Sdim// undefine PPC here. PPC may be predefined on some hosts. 21249423Sdim#undef PPC 22249423Sdim 23226584Sdimnamespace llvm { 24226584Sdimnamespace PPC { 25226584Sdim /// Predicate - These are "(BI << 5) | BO" for various predicates. 26226584Sdim enum Predicate { 27261991Sdim PRED_LT = (0 << 5) | 12, 28261991Sdim PRED_LE = (1 << 5) | 4, 29261991Sdim PRED_EQ = (2 << 5) | 12, 30261991Sdim PRED_GE = (0 << 5) | 4, 31261991Sdim PRED_GT = (1 << 5) | 12, 32261991Sdim PRED_NE = (2 << 5) | 4, 33261991Sdim PRED_UN = (3 << 5) | 12, 34261991Sdim PRED_NU = (3 << 5) | 4, 35261991Sdim PRED_LT_MINUS = (0 << 5) | 14, 36261991Sdim PRED_LE_MINUS = (1 << 5) | 6, 37261991Sdim PRED_EQ_MINUS = (2 << 5) | 14, 38261991Sdim PRED_GE_MINUS = (0 << 5) | 6, 39261991Sdim PRED_GT_MINUS = (1 << 5) | 14, 40261991Sdim PRED_NE_MINUS = (2 << 5) | 6, 41261991Sdim PRED_UN_MINUS = (3 << 5) | 14, 42261991Sdim PRED_NU_MINUS = (3 << 5) | 6, 43261991Sdim PRED_LT_PLUS = (0 << 5) | 15, 44261991Sdim PRED_LE_PLUS = (1 << 5) | 7, 45261991Sdim PRED_EQ_PLUS = (2 << 5) | 15, 46261991Sdim PRED_GE_PLUS = (0 << 5) | 7, 47261991Sdim PRED_GT_PLUS = (1 << 5) | 15, 48261991Sdim PRED_NE_PLUS = (2 << 5) | 7, 49261991Sdim PRED_UN_PLUS = (3 << 5) | 15, 50276479Sdim PRED_NU_PLUS = (3 << 5) | 7, 51276479Sdim 52341825Sdim // SPE scalar compare instructions always set the GT bit. 53341825Sdim PRED_SPE = PRED_GT, 54341825Sdim 55276479Sdim // When dealing with individual condition-register bits, we have simple set 56276479Sdim // and unset predicates. 57276479Sdim PRED_BIT_SET = 1024, 58276479Sdim PRED_BIT_UNSET = 1025 59226584Sdim }; 60341825Sdim 61296417Sdim // Bit for branch taken (plus) or not-taken (minus) hint 62296417Sdim enum BranchHintBit { 63296417Sdim BR_NO_HINT = 0x0, 64296417Sdim BR_NONTAKEN_HINT = 0x2, 65296417Sdim BR_TAKEN_HINT = 0x3, 66296417Sdim BR_HINT_MASK = 0X3 67296417Sdim }; 68296417Sdim 69226584Sdim /// Invert the specified predicate. != -> ==, < -> >=. 70226584Sdim Predicate InvertPredicate(Predicate Opcode); 71251662Sdim 72251662Sdim /// Assume the condition register is set by MI(a,b), return the predicate if 73251662Sdim /// we modify the instructions such that condition register is set by MI(b,a). 74251662Sdim Predicate getSwappedPredicate(Predicate Opcode); 75327952Sdim 76327952Sdim /// Return the condition without hint bits. 77327952Sdim inline unsigned getPredicateCondition(Predicate Opcode) { 78327952Sdim return (unsigned)(Opcode & ~BR_HINT_MASK); 79327952Sdim } 80327952Sdim 81327952Sdim /// Return the hint bits of the predicate. 82327952Sdim inline unsigned getPredicateHint(Predicate Opcode) { 83327952Sdim return (unsigned)(Opcode & BR_HINT_MASK); 84327952Sdim } 85327952Sdim 86327952Sdim /// Return predicate consisting of specified condition and hint bits. 87327952Sdim inline Predicate getPredicate(unsigned Condition, unsigned Hint) { 88327952Sdim return (Predicate)((Condition & ~BR_HINT_MASK) | 89327952Sdim (Hint & BR_HINT_MASK)); 90327952Sdim } 91226584Sdim} 92226584Sdim} 93226584Sdim 94226584Sdim#endif 95