HexagonSubtarget.h revision 309124
1//===-- HexagonSubtarget.h - Define Subtarget for the Hexagon ---*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the Hexagon specific subclass of TargetSubtarget. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H 15#define LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H 16 17#include "HexagonFrameLowering.h" 18#include "HexagonISelLowering.h" 19#include "HexagonInstrInfo.h" 20#include "HexagonSelectionDAGInfo.h" 21#include "llvm/Target/TargetMachine.h" 22#include "llvm/Target/TargetSubtargetInfo.h" 23#include <string> 24 25#define GET_SUBTARGETINFO_HEADER 26#include "HexagonGenSubtargetInfo.inc" 27 28#define Hexagon_SMALL_DATA_THRESHOLD 8 29#define Hexagon_SLOTS 4 30 31namespace llvm { 32 33class HexagonSubtarget : public HexagonGenSubtargetInfo { 34 virtual void anchor(); 35 36 bool UseMemOps, UseHVXOps, UseHVXDblOps; 37 bool ModeIEEERndNear; 38 39public: 40 enum HexagonArchEnum { 41 V4, V5, V55, V60 42 }; 43 44 HexagonArchEnum HexagonArchVersion; 45 /// True if the target should use Back-Skip-Back scheduling. This is the 46 /// default for V60. 47 bool UseBSBScheduling; 48 49 class HexagonDAGMutation : public ScheduleDAGMutation { 50 public: 51 void apply(ScheduleDAGInstrs *DAG) override; 52 }; 53 54private: 55 std::string CPUString; 56 HexagonInstrInfo InstrInfo; 57 HexagonTargetLowering TLInfo; 58 HexagonSelectionDAGInfo TSInfo; 59 HexagonFrameLowering FrameLowering; 60 InstrItineraryData InstrItins; 61 void initializeEnvironment(); 62 63public: 64 HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS, 65 const TargetMachine &TM); 66 67 /// getInstrItins - Return the instruction itineraries based on subtarget 68 /// selection. 69 const InstrItineraryData *getInstrItineraryData() const override { 70 return &InstrItins; 71 } 72 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; } 73 const HexagonRegisterInfo *getRegisterInfo() const override { 74 return &InstrInfo.getRegisterInfo(); 75 } 76 const HexagonTargetLowering *getTargetLowering() const override { 77 return &TLInfo; 78 } 79 const HexagonFrameLowering *getFrameLowering() const override { 80 return &FrameLowering; 81 } 82 const HexagonSelectionDAGInfo *getSelectionDAGInfo() const override { 83 return &TSInfo; 84 } 85 86 HexagonSubtarget &initializeSubtargetDependencies(StringRef CPU, 87 StringRef FS); 88 89 /// ParseSubtargetFeatures - Parses features string setting specified 90 /// subtarget options. Definition of function is auto generated by tblgen. 91 void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 92 93 bool useMemOps() const { return UseMemOps; } 94 bool hasV5TOps() const { return getHexagonArchVersion() >= V5; } 95 bool hasV5TOpsOnly() const { return getHexagonArchVersion() == V5; } 96 bool hasV55TOps() const { return getHexagonArchVersion() >= V55; } 97 bool hasV55TOpsOnly() const { return getHexagonArchVersion() == V55; } 98 bool hasV60TOps() const { return getHexagonArchVersion() >= V60; } 99 bool hasV60TOpsOnly() const { return getHexagonArchVersion() == V60; } 100 bool modeIEEERndNear() const { return ModeIEEERndNear; } 101 bool useHVXOps() const { return UseHVXOps; } 102 bool useHVXDblOps() const { return UseHVXOps && UseHVXDblOps; } 103 bool useHVXSglOps() const { return UseHVXOps && !UseHVXDblOps; } 104 105 bool useBSBScheduling() const { return UseBSBScheduling; } 106 bool enableMachineScheduler() const override; 107 // Always use the TargetLowering default scheduler. 108 // FIXME: This will use the vliw scheduler which is probably just hurting 109 // compiler time and will be removed eventually anyway. 110 bool enableMachineSchedDefaultSched() const override { return false; } 111 112 AntiDepBreakMode getAntiDepBreakMode() const override { return ANTIDEP_ALL; } 113 bool enablePostRAScheduler() const override { return true; } 114 115 bool enableSubRegLiveness() const override; 116 117 const std::string &getCPUString () const { return CPUString; } 118 119 // Threshold for small data section 120 unsigned getSmallDataThreshold() const { 121 return Hexagon_SMALL_DATA_THRESHOLD; 122 } 123 const HexagonArchEnum &getHexagonArchVersion() const { 124 return HexagonArchVersion; 125 } 126 127 void getPostRAMutations( 128 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) 129 const override; 130 131 /// \brief Perform target specific adjustments to the latency of a schedule 132 /// dependency. 133 void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const override; 134 135private: 136 // Helper function responsible for increasing the latency only. 137 void updateLatency(MachineInstr *SrcInst, MachineInstr *DstInst, SDep &Dep) 138 const; 139 void changeLatency(SUnit *Src, SmallVector<SDep, 4> &Deps, SUnit *Dst, 140 unsigned Lat) const; 141 bool isBestZeroLatency(SUnit *Src, SUnit *Dst, const HexagonInstrInfo *TII) 142 const; 143 void changePhiLatency(MachineInstr *SrcInst, SUnit *Dst, SDep &Dep) const; 144}; 145 146} // end namespace llvm 147 148#endif 149