ARMTargetMachine.h revision 360784 
1//===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the ARM specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
14#define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15
16#include "ARMSubtarget.h"
17#include "llvm/ADT/Optional.h"
18#include "llvm/ADT/StringMap.h"
19#include "llvm/ADT/StringRef.h"
20#include "llvm/Analysis/TargetTransformInfo.h"
21#include "llvm/Support/CodeGen.h"
22#include "llvm/Target/TargetMachine.h"
23#include <memory>
24
25namespace llvm {
26
27class ARMBaseTargetMachine : public LLVMTargetMachine {
28public:
29  enum ARMABI {
30    ARM_ABI_UNKNOWN,
31    ARM_ABI_APCS,
32    ARM_ABI_AAPCS, // ARM EABI
33    ARM_ABI_AAPCS16
34  } TargetABI;
35
36protected:
37  std::unique_ptr<TargetLoweringObjectFile> TLOF;
38  bool isLittle;
39  mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
40
41public:
42  ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
43                       StringRef FS, const TargetOptions &Options,
44                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
45                       CodeGenOpt::Level OL, bool isLittle);
46  ~ARMBaseTargetMachine() override;
47
48  const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
49  // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
50  // subtargets are per-function entities based on the target-specific
51  // attributes of each function.
52  const ARMSubtarget *getSubtargetImpl() const = delete;
53  bool isLittleEndian() const { return isLittle; }
54
55  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
56
57  // Pass Pipeline Configuration
58  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
59
60  TargetLoweringObjectFile *getObjFileLowering() const override {
61    return TLOF.get();
62  }
63
64  bool isTargetHardFloat() const {
65    return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
66           TargetTriple.getEnvironment() == Triple::MuslEABIHF ||
67           TargetTriple.getEnvironment() == Triple::EABIHF ||
68           (TargetTriple.isOSBinFormatMachO() &&
69            TargetTriple.getSubArch() == Triple::ARMSubArch_v7em) ||
70           TargetTriple.isOSWindows() ||
71           TargetABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16;
72  }
73
74  bool targetSchedulesPostRAScheduling() const override { return true; };
75};
76
77/// ARM/Thumb little endian target machine.
78///
79class ARMLETargetMachine : public ARMBaseTargetMachine {
80public:
81  ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
82                     StringRef FS, const TargetOptions &Options,
83                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
84                     CodeGenOpt::Level OL, bool JIT);
85};
86
87/// ARM/Thumb big endian target machine.
88///
89class ARMBETargetMachine : public ARMBaseTargetMachine {
90public:
91  ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
92                     StringRef FS, const TargetOptions &Options,
93                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
94                     CodeGenOpt::Level OL, bool JIT);
95};
96
97} // end namespace llvm
98
99#endif // LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
100