ARMScheduleV6.td revision 194612 
1//===- ARMSchedule.td - ARM v6 Scheduling Definitions ------*- tablegen -*-===//
2// 
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7// 
8//===----------------------------------------------------------------------===//
9//
10// This file defines the itinerary class data for the ARM v6 processors.
11//
12//===----------------------------------------------------------------------===//
13
14def V6Itineraries : ProcessorItineraries<[
15  InstrItinData<IIC_iALU    , [InstrStage<1, [FU_iALU]>]>,
16  InstrItinData<IIC_iLoad   , [InstrStage<2, [FU_iLdSt]>]>,
17  InstrItinData<IIC_iStore  , [InstrStage<1, [FU_iLdSt]>]>,
18  InstrItinData<IIC_fpALU   , [InstrStage<6, [FU_FpALU]>]>,
19  InstrItinData<IIC_fpLoad  , [InstrStage<2, [FU_FpLdSt]>]>,
20  InstrItinData<IIC_fpStore , [InstrStage<1, [FU_FpLdSt]>]>,
21  InstrItinData<IIC_Br      , [InstrStage<3, [FU_Br]>]>
22]>;
23