1326938Sdim//===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===// 2326938Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6326938Sdim// 7326938Sdim//===----------------------------------------------------------------------===// 8326938Sdim// 9326938Sdim// 10326938Sdim//===----------------------------------------------------------------------===// 11326938Sdim 12326938Sdim#include "ARCTargetMachine.h" 13326938Sdim#include "ARC.h" 14326938Sdim#include "ARCTargetTransformInfo.h" 15353358Sdim#include "TargetInfo/ARCTargetInfo.h" 16326938Sdim#include "llvm/CodeGen/Passes.h" 17326938Sdim#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 18326938Sdim#include "llvm/CodeGen/TargetPassConfig.h" 19326938Sdim#include "llvm/Support/TargetRegistry.h" 20326938Sdim 21326938Sdimusing namespace llvm; 22326938Sdim 23326938Sdimstatic Reloc::Model getRelocModel(Optional<Reloc::Model> RM) { 24326938Sdim if (!RM.hasValue()) 25326938Sdim return Reloc::Static; 26326938Sdim return *RM; 27326938Sdim} 28326938Sdim 29326938Sdim/// ARCTargetMachine ctor - Create an ILP32 architecture model 30326938SdimARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT, 31326938Sdim StringRef CPU, StringRef FS, 32326938Sdim const TargetOptions &Options, 33326938Sdim Optional<Reloc::Model> RM, 34326938Sdim Optional<CodeModel::Model> CM, 35326938Sdim CodeGenOpt::Level OL, bool JIT) 36326938Sdim : LLVMTargetMachine(T, 37326938Sdim "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 38326938Sdim "f32:32:32-i64:32-f64:32-a:0:32-n32", 39326938Sdim TT, CPU, FS, Options, getRelocModel(RM), 40344779Sdim getEffectiveCodeModel(CM, CodeModel::Small), OL), 41360784Sdim TLOF(std::make_unique<TargetLoweringObjectFileELF>()), 42326938Sdim Subtarget(TT, CPU, FS, *this) { 43326938Sdim initAsmInfo(); 44326938Sdim} 45326938Sdim 46326938SdimARCTargetMachine::~ARCTargetMachine() = default; 47326938Sdim 48326938Sdimnamespace { 49326938Sdim 50326938Sdim/// ARC Code Generator Pass Configuration Options. 51326938Sdimclass ARCPassConfig : public TargetPassConfig { 52326938Sdimpublic: 53326938Sdim ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM) 54326938Sdim : TargetPassConfig(TM, PM) {} 55326938Sdim 56326938Sdim ARCTargetMachine &getARCTargetMachine() const { 57326938Sdim return getTM<ARCTargetMachine>(); 58326938Sdim } 59326938Sdim 60326938Sdim bool addInstSelector() override; 61326938Sdim void addPreEmitPass() override; 62326938Sdim void addPreRegAlloc() override; 63326938Sdim}; 64326938Sdim 65326938Sdim} // end anonymous namespace 66326938Sdim 67326938SdimTargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { 68326938Sdim return new ARCPassConfig(*this, PM); 69326938Sdim} 70326938Sdim 71326938Sdimbool ARCPassConfig::addInstSelector() { 72326938Sdim addPass(createARCISelDag(getARCTargetMachine(), getOptLevel())); 73326938Sdim return false; 74326938Sdim} 75326938Sdim 76326938Sdimvoid ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); } 77326938Sdim 78353358Sdimvoid ARCPassConfig::addPreRegAlloc() { 79353358Sdim addPass(createARCExpandPseudosPass()); 80353358Sdim addPass(createARCOptAddrMode()); 81353358Sdim} 82326938Sdim 83326938Sdim// Force static initialization. 84360784Sdimextern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() { 85326938Sdim RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget()); 86326938Sdim} 87326938Sdim 88327134SdimTargetTransformInfo 89327134SdimARCTargetMachine::getTargetTransformInfo(const Function &F) { 90327134Sdim return TargetTransformInfo(ARCTTIImpl(this, F)); 91326938Sdim} 92