MCRegisterInfo.cpp revision 344779 
1//===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements MCRegisterInfo functions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/MC/MCRegisterInfo.h"
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/ADT/Twine.h"
17#include "llvm/Support/ErrorHandling.h"
18#include <algorithm>
19#include <cassert>
20#include <cstdint>
21
22using namespace llvm;
23
24unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
25                                             const MCRegisterClass *RC) const {
26  for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
27    if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
28      return *Supers;
29  return 0;
30}
31
32unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
33  assert(Idx && Idx < getNumSubRegIndices() &&
34         "This is not a subregister index");
35  // Get a pointer to the corresponding SubRegIndices list. This list has the
36  // name of each sub-register in the same order as MCSubRegIterator.
37  const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
38  for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
39    if (*SRI == Idx)
40      return *Subs;
41  return 0;
42}
43
44unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
45  assert(SubReg && SubReg < getNumRegs() && "This is not a register");
46  // Get a pointer to the corresponding SubRegIndices list. This list has the
47  // name of each sub-register in the same order as MCSubRegIterator.
48  const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
49  for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
50    if (*Subs == SubReg)
51      return *SRI;
52  return 0;
53}
54
55unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const {
56  assert(Idx && Idx < getNumSubRegIndices() &&
57         "This is not a subregister index");
58  return SubRegIdxRanges[Idx].Size;
59}
60
61unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const {
62  assert(Idx && Idx < getNumSubRegIndices() &&
63         "This is not a subregister index");
64  return SubRegIdxRanges[Idx].Offset;
65}
66
67int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
68  const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
69  unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
70
71  if (!M)
72    return -1;
73  DwarfLLVMRegPair Key = { RegNum, 0 };
74  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
75  if (I == M+Size || I->FromReg != RegNum)
76    return -1;
77  return I->ToReg;
78}
79
80int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
81  const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
82  unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
83
84  if (!M)
85    return -1;
86  DwarfLLVMRegPair Key = { RegNum, 0 };
87  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
88  assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
89  return I->ToReg;
90}
91
92int MCRegisterInfo::getLLVMRegNumFromEH(unsigned RegNum) const {
93  const DwarfLLVMRegPair *M = EHDwarf2LRegs;
94  unsigned Size = EHDwarf2LRegsSize;
95
96  if (!M)
97    return -1;
98  DwarfLLVMRegPair Key = { RegNum, 0 };
99  const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
100  if (I == M+Size || I->FromReg != RegNum)
101    return -1;
102  return I->ToReg;
103}
104
105int MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const {
106  // On ELF platforms, DWARF EH register numbers are the same as DWARF
107  // other register numbers.  On Darwin x86, they differ and so need to be
108  // mapped.  The .cfi_* directives accept integer literals as well as
109  // register names and should generate exactly what the assembly code
110  // asked for, so there might be DWARF/EH register numbers that don't have
111  // a corresponding LLVM register number at all.  So if we can't map the
112  // EH register number to an LLVM register number, assume it's just a
113  // valid DWARF register number as is.
114  int LRegNum = getLLVMRegNumFromEH(RegNum);
115  if (LRegNum != -1)
116    return getDwarfRegNum(LRegNum, false);
117  return RegNum;
118}
119
120int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
121  const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
122  if (I == L2SEHRegs.end()) return (int)RegNum;
123  return I->second;
124}
125
126int MCRegisterInfo::getCodeViewRegNum(unsigned RegNum) const {
127  if (L2CVRegs.empty())
128    report_fatal_error("target does not implement codeview register mapping");
129  const DenseMap<unsigned, int>::const_iterator I = L2CVRegs.find(RegNum);
130  if (I == L2CVRegs.end())
131    report_fatal_error("unknown codeview register " + (RegNum < getNumRegs()
132                                                           ? getName(RegNum)
133                                                           : Twine(RegNum)));
134  return I->second;
135}
136