LegalizeTypesGeneric.cpp revision 327952
1//===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements generic type expansion and splitting for LegalizeTypes. 11// The routines here perform legalization when the details of the type (such as 12// whether it is an integer or a float) do not matter. 13// Expansion is the act of changing a computation in an illegal type to be a 14// computation in two identical registers of a smaller type. The Lo/Hi part 15// is required to be stored first in memory on little/big-endian machines. 16// Splitting is the act of changing a computation in an illegal type to be a 17// computation in two not necessarily identical registers of a smaller type. 18// There are no requirements on how the type is represented in memory. 19// 20//===----------------------------------------------------------------------===// 21 22#include "LegalizeTypes.h" 23#include "llvm/IR/DataLayout.h" 24using namespace llvm; 25 26#define DEBUG_TYPE "legalize-types" 27 28//===----------------------------------------------------------------------===// 29// Generic Result Expansion. 30//===----------------------------------------------------------------------===// 31 32// These routines assume that the Lo/Hi part is stored first in memory on 33// little/big-endian machines, followed by the Hi/Lo part. This means that 34// they cannot be used as is on vectors, for which Lo is always stored first. 35void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 36 SDValue &Lo, SDValue &Hi) { 37 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 38 GetExpandedOp(Op, Lo, Hi); 39} 40 41void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { 42 EVT OutVT = N->getValueType(0); 43 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); 44 SDValue InOp = N->getOperand(0); 45 EVT InVT = InOp.getValueType(); 46 SDLoc dl(N); 47 48 // Handle some special cases efficiently. 49 switch (getTypeAction(InVT)) { 50 case TargetLowering::TypeLegal: 51 case TargetLowering::TypePromoteInteger: 52 break; 53 case TargetLowering::TypePromoteFloat: 54 llvm_unreachable("Bitcast of a promotion-needing float should never need" 55 "expansion"); 56 case TargetLowering::TypeSoftenFloat: { 57 // Expand the floating point operand only if it was converted to integers. 58 // Otherwise, it is a legal type like f128 that can be saved in a register. 59 auto SoftenedOp = GetSoftenedFloat(InOp); 60 if (isLegalInHWReg(SoftenedOp.getValueType())) 61 break; 62 SplitInteger(SoftenedOp, Lo, Hi); 63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 65 return; 66 } 67 case TargetLowering::TypeExpandInteger: 68 case TargetLowering::TypeExpandFloat: { 69 auto &DL = DAG.getDataLayout(); 70 // Convert the expanded pieces of the input. 71 GetExpandedOp(InOp, Lo, Hi); 72 if (TLI.hasBigEndianPartOrdering(InVT, DL) != 73 TLI.hasBigEndianPartOrdering(OutVT, DL)) 74 std::swap(Lo, Hi); 75 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 76 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 77 return; 78 } 79 case TargetLowering::TypeSplitVector: 80 GetSplitVector(InOp, Lo, Hi); 81 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 82 std::swap(Lo, Hi); 83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 85 return; 86 case TargetLowering::TypeScalarizeVector: 87 // Convert the element instead. 88 SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi); 89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 90 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 91 return; 92 case TargetLowering::TypeWidenVector: { 93 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); 94 InOp = GetWidenedVector(InOp); 95 EVT LoVT, HiVT; 96 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); 97 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); 98 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 99 std::swap(Lo, Hi); 100 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 101 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 102 return; 103 } 104 } 105 106 if (InVT.isVector() && OutVT.isInteger()) { 107 // Handle cases like i64 = BITCAST v1i64 on x86, where the operand 108 // is legal but the result is not. 109 unsigned NumElems = 2; 110 EVT ElemVT = NOutVT; 111 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 112 113 // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>. 114 while (!isTypeLegal(NVT)) { 115 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; 116 // If the element size is smaller than byte, bail. 117 if (NewSizeInBits < 8) 118 break; 119 NumElems *= 2; 120 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); 121 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 122 } 123 124 if (isTypeLegal(NVT)) { 125 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp); 126 127 SmallVector<SDValue, 8> Vals; 128 for (unsigned i = 0; i < NumElems; ++i) 129 Vals.push_back(DAG.getNode( 130 ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp, 131 DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())))); 132 133 // Build Lo, Hi pair by pairing extracted elements if needed. 134 unsigned Slot = 0; 135 for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) { 136 // Each iteration will BUILD_PAIR two nodes and append the result until 137 // there are only two nodes left, i.e. Lo and Hi. 138 SDValue LHS = Vals[Slot]; 139 SDValue RHS = Vals[Slot + 1]; 140 141 if (DAG.getDataLayout().isBigEndian()) 142 std::swap(LHS, RHS); 143 144 Vals.push_back(DAG.getNode( 145 ISD::BUILD_PAIR, dl, 146 EVT::getIntegerVT(*DAG.getContext(), LHS.getValueSizeInBits() << 1), 147 LHS, RHS)); 148 } 149 Lo = Vals[Slot++]; 150 Hi = Vals[Slot++]; 151 152 if (DAG.getDataLayout().isBigEndian()) 153 std::swap(Lo, Hi); 154 155 return; 156 } 157 } 158 159 // Lower the bit-convert to a store/load from the stack. 160 assert(NOutVT.isByteSized() && "Expanded type not byte sized!"); 161 162 // Create the stack frame object. Make sure it is aligned for both 163 // the source and expanded destination types. 164 unsigned Alignment = DAG.getDataLayout().getPrefTypeAlignment( 165 NOutVT.getTypeForEVT(*DAG.getContext())); 166 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); 167 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); 168 MachinePointerInfo PtrInfo = 169 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI); 170 171 // Emit a store to the stack slot. 172 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo); 173 174 // Load the first half from the stack slot. 175 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo); 176 177 // Increment the pointer to the other half. 178 unsigned IncrementSize = NOutVT.getSizeInBits() / 8; 179 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 180 DAG.getConstant(IncrementSize, dl, 181 StackPtr.getValueType())); 182 183 // Load the second half from the stack slot. 184 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, 185 PtrInfo.getWithOffset(IncrementSize), 186 MinAlign(Alignment, IncrementSize)); 187 188 // Handle endianness of the load. 189 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) 190 std::swap(Lo, Hi); 191} 192 193void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, 194 SDValue &Hi) { 195 // Return the operands. 196 Lo = N->getOperand(0); 197 Hi = N->getOperand(1); 198} 199 200void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo, 201 SDValue &Hi) { 202 GetExpandedOp(N->getOperand(0), Lo, Hi); 203 SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? 204 Hi : Lo; 205 206 assert(Part.getValueType() == N->getValueType(0) && 207 "Type twice as big as expanded type not itself expanded!"); 208 209 GetPairElements(Part, Lo, Hi); 210} 211 212void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, 213 SDValue &Hi) { 214 SDValue OldVec = N->getOperand(0); 215 unsigned OldElts = OldVec.getValueType().getVectorNumElements(); 216 EVT OldEltVT = OldVec.getValueType().getVectorElementType(); 217 SDLoc dl(N); 218 219 // Convert to a vector of the expanded element type, for example 220 // <3 x i64> -> <6 x i32>. 221 EVT OldVT = N->getValueType(0); 222 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 223 224 if (OldVT != OldEltVT) { 225 // The result of EXTRACT_VECTOR_ELT may be larger than the element type of 226 // the input vector. If so, extend the elements of the input vector to the 227 // same bitwidth as the result before expanding. 228 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); 229 EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts); 230 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0)); 231 } 232 233 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 234 EVT::getVectorVT(*DAG.getContext(), 235 NewVT, 2*OldElts), 236 OldVec); 237 238 // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector. 239 SDValue Idx = N->getOperand(1); 240 241 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 242 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 243 244 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, 245 DAG.getConstant(1, dl, Idx.getValueType())); 246 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 247 248 if (DAG.getDataLayout().isBigEndian()) 249 std::swap(Lo, Hi); 250} 251 252void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo, 253 SDValue &Hi) { 254 assert(ISD::isNormalLoad(N) && "This routine only for normal loads!"); 255 SDLoc dl(N); 256 257 LoadSDNode *LD = cast<LoadSDNode>(N); 258 EVT ValueVT = LD->getValueType(0); 259 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 260 SDValue Chain = LD->getChain(); 261 SDValue Ptr = LD->getBasePtr(); 262 unsigned Alignment = LD->getAlignment(); 263 AAMDNodes AAInfo = LD->getAAInfo(); 264 265 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 266 267 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), Alignment, 268 LD->getMemOperand()->getFlags(), AAInfo); 269 270 // Increment the pointer to the other half. 271 unsigned IncrementSize = NVT.getSizeInBits() / 8; 272 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 273 DAG.getConstant(IncrementSize, dl, Ptr.getValueType())); 274 Hi = DAG.getLoad(NVT, dl, Chain, Ptr, 275 LD->getPointerInfo().getWithOffset(IncrementSize), 276 MinAlign(Alignment, IncrementSize), 277 LD->getMemOperand()->getFlags(), AAInfo); 278 279 // Build a factor node to remember that this load is independent of the 280 // other one. 281 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1), 282 Hi.getValue(1)); 283 284 // Handle endianness of the load. 285 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout())) 286 std::swap(Lo, Hi); 287 288 // Modified the chain - switch anything that used the old chain to use 289 // the new one. 290 ReplaceValueWith(SDValue(N, 1), Chain); 291} 292 293void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { 294 EVT OVT = N->getValueType(0); 295 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT); 296 SDValue Chain = N->getOperand(0); 297 SDValue Ptr = N->getOperand(1); 298 SDLoc dl(N); 299 const unsigned Align = N->getConstantOperandVal(3); 300 301 Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align); 302 Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0); 303 304 // Handle endianness of the load. 305 if (TLI.hasBigEndianPartOrdering(OVT, DAG.getDataLayout())) 306 std::swap(Lo, Hi); 307 308 // Modified the chain - switch anything that used the old chain to use 309 // the new one. 310 ReplaceValueWith(SDValue(N, 1), Hi.getValue(1)); 311} 312 313 314//===--------------------------------------------------------------------===// 315// Generic Operand Expansion. 316//===--------------------------------------------------------------------===// 317 318void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements, 319 SmallVectorImpl<SDValue> &Ops, 320 EVT EltVT) { 321 assert(Op.getValueType().isInteger()); 322 SDLoc DL(Op); 323 SDValue Parts[2]; 324 325 if (NumElements > 1) { 326 NumElements >>= 1; 327 SplitInteger(Op, Parts[0], Parts[1]); 328 if (DAG.getDataLayout().isBigEndian()) 329 std::swap(Parts[0], Parts[1]); 330 IntegerToVector(Parts[0], NumElements, Ops, EltVT); 331 IntegerToVector(Parts[1], NumElements, Ops, EltVT); 332 } else { 333 Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op)); 334 } 335} 336 337SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) { 338 SDLoc dl(N); 339 if (N->getValueType(0).isVector() && 340 N->getOperand(0).getValueType().isInteger()) { 341 // An illegal expanding type is being converted to a legal vector type. 342 // Make a two element vector out of the expanded parts and convert that 343 // instead, but only if the new vector type is legal (otherwise there 344 // is no point, and it might create expansion loops). For example, on 345 // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32. 346 // 347 // FIXME: I'm not sure why we are first trying to split the input into 348 // a 2 element vector, so I'm leaving it here to maintain the current 349 // behavior. 350 unsigned NumElts = 2; 351 EVT OVT = N->getOperand(0).getValueType(); 352 EVT NVT = EVT::getVectorVT(*DAG.getContext(), 353 TLI.getTypeToTransformTo(*DAG.getContext(), OVT), 354 NumElts); 355 if (!isTypeLegal(NVT)) { 356 // If we can't find a legal type by splitting the integer in half, 357 // then we can use the node's value type. 358 NumElts = N->getValueType(0).getVectorNumElements(); 359 NVT = N->getValueType(0); 360 } 361 362 SmallVector<SDValue, 8> Ops; 363 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType()); 364 365 SDValue Vec = 366 DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts)); 367 return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec); 368 } 369 370 // Otherwise, store to a temporary and load out again as the new type. 371 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); 372} 373 374SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) { 375 // The vector type is legal but the element type needs expansion. 376 EVT VecVT = N->getValueType(0); 377 unsigned NumElts = VecVT.getVectorNumElements(); 378 EVT OldVT = N->getOperand(0).getValueType(); 379 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 380 SDLoc dl(N); 381 382 assert(OldVT == VecVT.getVectorElementType() && 383 "BUILD_VECTOR operand type doesn't match vector element type!"); 384 385 // Build a vector of twice the length out of the expanded elements. 386 // For example <3 x i64> -> <6 x i32>. 387 std::vector<SDValue> NewElts; 388 NewElts.reserve(NumElts*2); 389 390 for (unsigned i = 0; i < NumElts; ++i) { 391 SDValue Lo, Hi; 392 GetExpandedOp(N->getOperand(i), Lo, Hi); 393 if (DAG.getDataLayout().isBigEndian()) 394 std::swap(Lo, Hi); 395 NewElts.push_back(Lo); 396 NewElts.push_back(Hi); 397 } 398 399 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size()); 400 SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts); 401 402 // Convert the new vector to the old vector type. 403 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 404} 405 406SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) { 407 SDValue Lo, Hi; 408 GetExpandedOp(N->getOperand(0), Lo, Hi); 409 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo; 410} 411 412SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) { 413 // The vector type is legal but the element type needs expansion. 414 EVT VecVT = N->getValueType(0); 415 unsigned NumElts = VecVT.getVectorNumElements(); 416 SDLoc dl(N); 417 418 SDValue Val = N->getOperand(1); 419 EVT OldEVT = Val.getValueType(); 420 EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT); 421 422 assert(OldEVT == VecVT.getVectorElementType() && 423 "Inserted element type doesn't match vector element type!"); 424 425 // Bitconvert to a vector of twice the length with elements of the expanded 426 // type, insert the expanded vector elements, and then convert back. 427 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2); 428 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 429 NewVecVT, N->getOperand(0)); 430 431 SDValue Lo, Hi; 432 GetExpandedOp(Val, Lo, Hi); 433 if (DAG.getDataLayout().isBigEndian()) 434 std::swap(Lo, Hi); 435 436 SDValue Idx = N->getOperand(2); 437 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 438 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx); 439 Idx = DAG.getNode(ISD::ADD, dl, 440 Idx.getValueType(), Idx, 441 DAG.getConstant(1, dl, Idx.getValueType())); 442 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx); 443 444 // Convert the new vector to the old vector type. 445 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 446} 447 448SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) { 449 SDLoc dl(N); 450 EVT VT = N->getValueType(0); 451 assert(VT.getVectorElementType() == N->getOperand(0).getValueType() && 452 "SCALAR_TO_VECTOR operand type doesn't match vector element type!"); 453 unsigned NumElts = VT.getVectorNumElements(); 454 SmallVector<SDValue, 16> Ops(NumElts); 455 Ops[0] = N->getOperand(0); 456 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); 457 for (unsigned i = 1; i < NumElts; ++i) 458 Ops[i] = UndefVal; 459 return DAG.getBuildVector(VT, dl, Ops); 460} 461 462SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) { 463 assert(ISD::isNormalStore(N) && "This routine only for normal stores!"); 464 assert(OpNo == 1 && "Can only expand the stored value so far"); 465 SDLoc dl(N); 466 467 StoreSDNode *St = cast<StoreSDNode>(N); 468 EVT ValueVT = St->getValue().getValueType(); 469 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 470 SDValue Chain = St->getChain(); 471 SDValue Ptr = St->getBasePtr(); 472 unsigned Alignment = St->getAlignment(); 473 AAMDNodes AAInfo = St->getAAInfo(); 474 475 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 476 unsigned IncrementSize = NVT.getSizeInBits() / 8; 477 478 SDValue Lo, Hi; 479 GetExpandedOp(St->getValue(), Lo, Hi); 480 481 if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout())) 482 std::swap(Lo, Hi); 483 484 Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(), Alignment, 485 St->getMemOperand()->getFlags(), AAInfo); 486 487 Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize); 488 Hi = DAG.getStore(Chain, dl, Hi, Ptr, 489 St->getPointerInfo().getWithOffset(IncrementSize), 490 MinAlign(Alignment, IncrementSize), 491 St->getMemOperand()->getFlags(), AAInfo); 492 493 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); 494} 495 496 497//===--------------------------------------------------------------------===// 498// Generic Result Splitting. 499//===--------------------------------------------------------------------===// 500 501// Be careful to make no assumptions about which of Lo/Hi is stored first in 502// memory (for vectors it is always Lo first followed by Hi in the following 503// bytes; for integers and floats it is Lo first if and only if the machine is 504// little-endian). 505 506void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 507 SDValue &Lo, SDValue &Hi) { 508 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 509 GetSplitOp(Op, Lo, Hi); 510} 511 512static std::pair<SDValue, SDValue> SplitVSETCC(const SDNode *N, 513 SelectionDAG &DAG) { 514 SDLoc DL(N); 515 EVT LoVT, HiVT; 516 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 517 518 // Split the inputs. 519 SDValue Lo, Hi, LL, LH, RL, RH; 520 std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0); 521 std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1); 522 523 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2)); 524 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2)); 525 526 return std::make_pair(Lo, Hi); 527} 528 529void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) { 530 SDValue LL, LH, RL, RH, CL, CH; 531 SDLoc dl(N); 532 GetSplitOp(N->getOperand(1), LL, LH); 533 GetSplitOp(N->getOperand(2), RL, RH); 534 535 SDValue Cond = N->getOperand(0); 536 CL = CH = Cond; 537 if (Cond.getValueType().isVector()) { 538 if (SDValue Res = WidenVSELECTAndMask(N)) 539 std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl); 540 // It seems to improve code to generate two narrow SETCCs as opposed to 541 // splitting a wide result vector. 542 else if (Cond.getOpcode() == ISD::SETCC) 543 std::tie(CL, CH) = SplitVSETCC(Cond.getNode(), DAG); 544 // Check if there are already splitted versions of the vector available and 545 // use those instead of splitting the mask operand again. 546 else if (getTypeAction(Cond.getValueType()) == 547 TargetLowering::TypeSplitVector) 548 GetSplitVector(Cond, CL, CH); 549 else 550 std::tie(CL, CH) = DAG.SplitVector(Cond, dl); 551 } 552 553 Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL); 554 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); 555} 556 557void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo, 558 SDValue &Hi) { 559 SDValue LL, LH, RL, RH; 560 SDLoc dl(N); 561 GetSplitOp(N->getOperand(2), LL, LH); 562 GetSplitOp(N->getOperand(3), RL, RH); 563 564 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), 565 N->getOperand(1), LL, RL, N->getOperand(4)); 566 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), 567 N->getOperand(1), LH, RH, N->getOperand(4)); 568} 569 570void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) { 571 EVT LoVT, HiVT; 572 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 573 Lo = DAG.getUNDEF(LoVT); 574 Hi = DAG.getUNDEF(HiVT); 575} 576