MachineCopyPropagation.cpp revision 353358
1234285Sdim//===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===// 2234285Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6234285Sdim// 7234285Sdim//===----------------------------------------------------------------------===// 8234285Sdim// 9234285Sdim// This is an extremely simple MachineInstr-level copy propagation pass. 10234285Sdim// 11341825Sdim// This pass forwards the source of COPYs to the users of their destinations 12341825Sdim// when doing so is legal. For example: 13341825Sdim// 14341825Sdim// %reg1 = COPY %reg0 15341825Sdim// ... 16341825Sdim// ... = OP %reg1 17341825Sdim// 18341825Sdim// If 19341825Sdim// - %reg0 has not been clobbered by the time of the use of %reg1 20341825Sdim// - the register class constraints are satisfied 21341825Sdim// - the COPY def is the only value that reaches OP 22341825Sdim// then this pass replaces the above with: 23341825Sdim// 24341825Sdim// %reg1 = COPY %reg0 25341825Sdim// ... 26341825Sdim// ... = OP %reg0 27341825Sdim// 28341825Sdim// This pass also removes some redundant COPYs. For example: 29341825Sdim// 30341825Sdim// %R1 = COPY %R0 31341825Sdim// ... // No clobber of %R1 32341825Sdim// %R0 = COPY %R1 <<< Removed 33341825Sdim// 34341825Sdim// or 35341825Sdim// 36341825Sdim// %R1 = COPY %R0 37341825Sdim// ... // No clobber of %R0 38341825Sdim// %R1 = COPY %R0 <<< Removed 39341825Sdim// 40234285Sdim//===----------------------------------------------------------------------===// 41234285Sdim 42249423Sdim#include "llvm/ADT/DenseMap.h" 43327952Sdim#include "llvm/ADT/STLExtras.h" 44249423Sdim#include "llvm/ADT/SetVector.h" 45249423Sdim#include "llvm/ADT/SmallVector.h" 46249423Sdim#include "llvm/ADT/Statistic.h" 47327952Sdim#include "llvm/ADT/iterator_range.h" 48327952Sdim#include "llvm/CodeGen/MachineBasicBlock.h" 49234285Sdim#include "llvm/CodeGen/MachineFunction.h" 50234285Sdim#include "llvm/CodeGen/MachineFunctionPass.h" 51327952Sdim#include "llvm/CodeGen/MachineInstr.h" 52327952Sdim#include "llvm/CodeGen/MachineOperand.h" 53243830Sdim#include "llvm/CodeGen/MachineRegisterInfo.h" 54341825Sdim#include "llvm/CodeGen/TargetInstrInfo.h" 55327952Sdim#include "llvm/CodeGen/TargetRegisterInfo.h" 56327952Sdim#include "llvm/CodeGen/TargetSubtargetInfo.h" 57327952Sdim#include "llvm/MC/MCRegisterInfo.h" 58249423Sdim#include "llvm/Pass.h" 59234285Sdim#include "llvm/Support/Debug.h" 60341825Sdim#include "llvm/Support/DebugCounter.h" 61234285Sdim#include "llvm/Support/raw_ostream.h" 62327952Sdim#include <cassert> 63327952Sdim#include <iterator> 64327952Sdim 65234285Sdimusing namespace llvm; 66234285Sdim 67321369Sdim#define DEBUG_TYPE "machine-cp" 68276479Sdim 69234285SdimSTATISTIC(NumDeletes, "Number of dead copies deleted"); 70341825SdimSTATISTIC(NumCopyForwards, "Number of copy uses forwarded"); 71341825SdimDEBUG_COUNTER(FwdCounter, "machine-cp-fwd", 72341825Sdim "Controls which register COPYs are forwarded"); 73234285Sdim 74234285Sdimnamespace { 75309124Sdim 76344779Sdimclass CopyTracker { 77344779Sdim struct CopyInfo { 78344779Sdim MachineInstr *MI; 79344779Sdim SmallVector<unsigned, 4> DefRegs; 80344779Sdim bool Avail; 81344779Sdim }; 82327952Sdim 83344779Sdim DenseMap<unsigned, CopyInfo> Copies; 84234285Sdim 85344779Sdimpublic: 86344779Sdim /// Mark all of the given registers and their subregisters as unavailable for 87344779Sdim /// copying. 88344779Sdim void markRegsUnavailable(ArrayRef<unsigned> Regs, 89344779Sdim const TargetRegisterInfo &TRI) { 90344779Sdim for (unsigned Reg : Regs) { 91344779Sdim // Source of copy is no longer available for propagation. 92344779Sdim for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) { 93344779Sdim auto CI = Copies.find(*RUI); 94344779Sdim if (CI != Copies.end()) 95344779Sdim CI->second.Avail = false; 96344779Sdim } 97234285Sdim } 98344779Sdim } 99234285Sdim 100344779Sdim /// Clobber a single register, removing it from the tracker's copy maps. 101344779Sdim void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) { 102344779Sdim for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) { 103344779Sdim auto I = Copies.find(*RUI); 104344779Sdim if (I != Copies.end()) { 105344779Sdim // When we clobber the source of a copy, we need to clobber everything 106344779Sdim // it defined. 107344779Sdim markRegsUnavailable(I->second.DefRegs, TRI); 108344779Sdim // When we clobber the destination of a copy, we need to clobber the 109344779Sdim // whole register it defined. 110344779Sdim if (MachineInstr *MI = I->second.MI) 111344779Sdim markRegsUnavailable({MI->getOperand(0).getReg()}, TRI); 112344779Sdim // Now we can erase the copy. 113344779Sdim Copies.erase(I); 114344779Sdim } 115309124Sdim } 116344779Sdim } 117309124Sdim 118344779Sdim /// Add this copy's registers into the tracker's copy maps. 119344779Sdim void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) { 120344779Sdim assert(MI->isCopy() && "Tracking non-copy?"); 121234285Sdim 122344779Sdim unsigned Def = MI->getOperand(0).getReg(); 123344779Sdim unsigned Src = MI->getOperand(1).getReg(); 124309124Sdim 125344779Sdim // Remember Def is defined by the copy. 126344779Sdim for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI) 127344779Sdim Copies[*RUI] = {MI, {}, true}; 128234285Sdim 129344779Sdim // Remember source that's copied to Def. Once it's clobbered, then 130344779Sdim // it's no longer available for copy propagation. 131344779Sdim for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); ++RUI) { 132344779Sdim auto I = Copies.insert({*RUI, {nullptr, {}, false}}); 133344779Sdim auto &Copy = I.first->second; 134344779Sdim if (!is_contained(Copy.DefRegs, Def)) 135344779Sdim Copy.DefRegs.push_back(Def); 136344779Sdim } 137344779Sdim } 138327952Sdim 139344779Sdim bool hasAnyCopies() { 140344779Sdim return !Copies.empty(); 141344779Sdim } 142327952Sdim 143344779Sdim MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI, 144344779Sdim bool MustBeAvailable = false) { 145344779Sdim auto CI = Copies.find(RegUnit); 146344779Sdim if (CI == Copies.end()) 147344779Sdim return nullptr; 148344779Sdim if (MustBeAvailable && !CI->second.Avail) 149344779Sdim return nullptr; 150344779Sdim return CI->second.MI; 151344779Sdim } 152327952Sdim 153344779Sdim MachineInstr *findAvailCopy(MachineInstr &DestCopy, unsigned Reg, 154344779Sdim const TargetRegisterInfo &TRI) { 155344779Sdim // We check the first RegUnit here, since we'll only be interested in the 156344779Sdim // copy if it copies the entire register anyway. 157344779Sdim MCRegUnitIterator RUI(Reg, &TRI); 158344779Sdim MachineInstr *AvailCopy = 159344779Sdim findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true); 160344779Sdim if (!AvailCopy || 161344779Sdim !TRI.isSubRegisterEq(AvailCopy->getOperand(0).getReg(), Reg)) 162344779Sdim return nullptr; 163327952Sdim 164344779Sdim // Check that the available copy isn't clobbered by any regmasks between 165344779Sdim // itself and the destination. 166344779Sdim unsigned AvailSrc = AvailCopy->getOperand(1).getReg(); 167344779Sdim unsigned AvailDef = AvailCopy->getOperand(0).getReg(); 168344779Sdim for (const MachineInstr &MI : 169344779Sdim make_range(AvailCopy->getIterator(), DestCopy.getIterator())) 170344779Sdim for (const MachineOperand &MO : MI.operands()) 171344779Sdim if (MO.isRegMask()) 172344779Sdim if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef)) 173344779Sdim return nullptr; 174327952Sdim 175344779Sdim return AvailCopy; 176344779Sdim } 177327952Sdim 178344779Sdim void clear() { 179344779Sdim Copies.clear(); 180344779Sdim } 181344779Sdim}; 182327952Sdim 183344779Sdimclass MachineCopyPropagation : public MachineFunctionPass { 184344779Sdim const TargetRegisterInfo *TRI; 185344779Sdim const TargetInstrInfo *TII; 186344779Sdim const MachineRegisterInfo *MRI; 187234285Sdim 188344779Sdimpublic: 189344779Sdim static char ID; // Pass identification, replacement for typeid 190234285Sdim 191344779Sdim MachineCopyPropagation() : MachineFunctionPass(ID) { 192344779Sdim initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry()); 193309124Sdim } 194309124Sdim 195344779Sdim void getAnalysisUsage(AnalysisUsage &AU) const override { 196344779Sdim AU.setPreservesCFG(); 197344779Sdim MachineFunctionPass::getAnalysisUsage(AU); 198309124Sdim } 199309124Sdim 200344779Sdim bool runOnMachineFunction(MachineFunction &MF) override; 201309124Sdim 202344779Sdim MachineFunctionProperties getRequiredProperties() const override { 203344779Sdim return MachineFunctionProperties().set( 204344779Sdim MachineFunctionProperties::Property::NoVRegs); 205234285Sdim } 206234285Sdim 207344779Sdimprivate: 208344779Sdim void ClobberRegister(unsigned Reg); 209344779Sdim void ReadRegister(unsigned Reg); 210344779Sdim void CopyPropagateBlock(MachineBasicBlock &MBB); 211344779Sdim bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def); 212344779Sdim void forwardUses(MachineInstr &MI); 213344779Sdim bool isForwardableRegClassCopy(const MachineInstr &Copy, 214344779Sdim const MachineInstr &UseI, unsigned UseIdx); 215344779Sdim bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use); 216344779Sdim 217344779Sdim /// Candidates for deletion. 218344779Sdim SmallSetVector<MachineInstr *, 8> MaybeDeadCopies; 219344779Sdim 220344779Sdim CopyTracker Tracker; 221344779Sdim 222344779Sdim bool Changed; 223344779Sdim}; 224344779Sdim 225344779Sdim} // end anonymous namespace 226344779Sdim 227344779Sdimchar MachineCopyPropagation::ID = 0; 228344779Sdim 229344779Sdimchar &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID; 230344779Sdim 231344779SdimINITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE, 232344779Sdim "Machine Copy Propagation Pass", false, false) 233344779Sdim 234314564Sdimvoid MachineCopyPropagation::ReadRegister(unsigned Reg) { 235314564Sdim // If 'Reg' is defined by a copy, the copy is no longer a candidate 236314564Sdim // for elimination. 237344779Sdim for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI) { 238344779Sdim if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) { 239344779Sdim LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump()); 240344779Sdim MaybeDeadCopies.remove(Copy); 241314564Sdim } 242314564Sdim } 243314564Sdim} 244314564Sdim 245309124Sdim/// Return true if \p PreviousCopy did copy register \p Src to register \p Def. 246309124Sdim/// This fact may have been obscured by sub register usage or may not be true at 247309124Sdim/// all even though Src and Def are subregisters of the registers used in 248309124Sdim/// PreviousCopy. e.g. 249309124Sdim/// isNopCopy("ecx = COPY eax", AX, CX) == true 250309124Sdim/// isNopCopy("ecx = COPY eax", AH, CL) == false 251309124Sdimstatic bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src, 252309124Sdim unsigned Def, const TargetRegisterInfo *TRI) { 253309124Sdim unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg(); 254309124Sdim unsigned PreviousDef = PreviousCopy.getOperand(0).getReg(); 255309124Sdim if (Src == PreviousSrc) { 256309124Sdim assert(Def == PreviousDef); 257309124Sdim return true; 258309124Sdim } 259309124Sdim if (!TRI->isSubRegister(PreviousSrc, Src)) 260234285Sdim return false; 261309124Sdim unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src); 262309124Sdim return SubIdx == TRI->getSubRegIndex(PreviousDef, Def); 263234285Sdim} 264234285Sdim 265309124Sdim/// Remove instruction \p Copy if there exists a previous copy that copies the 266309124Sdim/// register \p Src to the register \p Def; This may happen indirectly by 267309124Sdim/// copying the super registers. 268309124Sdimbool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src, 269309124Sdim unsigned Def) { 270309124Sdim // Avoid eliminating a copy from/to a reserved registers as we cannot predict 271309124Sdim // the value (Example: The sparc zero register is writable but stays zero). 272309124Sdim if (MRI->isReserved(Src) || MRI->isReserved(Def)) 273309124Sdim return false; 274234285Sdim 275309124Sdim // Search for an existing copy. 276344779Sdim MachineInstr *PrevCopy = Tracker.findAvailCopy(Copy, Def, *TRI); 277344779Sdim if (!PrevCopy) 278309124Sdim return false; 279309124Sdim 280309124Sdim // Check that the existing copy uses the correct sub registers. 281344779Sdim if (PrevCopy->getOperand(0).isDead()) 282327952Sdim return false; 283344779Sdim if (!isNopCopy(*PrevCopy, Src, Def, TRI)) 284309124Sdim return false; 285309124Sdim 286341825Sdim LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump()); 287309124Sdim 288309124Sdim // Copy was redundantly redefining either Src or Def. Remove earlier kill 289309124Sdim // flags between Copy and PrevCopy because the value will be reused now. 290309124Sdim assert(Copy.isCopy()); 291309124Sdim unsigned CopyDef = Copy.getOperand(0).getReg(); 292309124Sdim assert(CopyDef == Src || CopyDef == Def); 293309124Sdim for (MachineInstr &MI : 294344779Sdim make_range(PrevCopy->getIterator(), Copy.getIterator())) 295309124Sdim MI.clearRegisterKills(CopyDef, TRI); 296309124Sdim 297309124Sdim Copy.eraseFromParent(); 298309124Sdim Changed = true; 299309124Sdim ++NumDeletes; 300309124Sdim return true; 301234285Sdim} 302234285Sdim 303341825Sdim/// Decide whether we should forward the source of \param Copy to its use in 304341825Sdim/// \param UseI based on the physical register class constraints of the opcode 305341825Sdim/// and avoiding introducing more cross-class COPYs. 306341825Sdimbool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy, 307341825Sdim const MachineInstr &UseI, 308341825Sdim unsigned UseIdx) { 309341825Sdim 310341825Sdim unsigned CopySrcReg = Copy.getOperand(1).getReg(); 311341825Sdim 312341825Sdim // If the new register meets the opcode register constraints, then allow 313341825Sdim // forwarding. 314341825Sdim if (const TargetRegisterClass *URC = 315341825Sdim UseI.getRegClassConstraint(UseIdx, TII, TRI)) 316341825Sdim return URC->contains(CopySrcReg); 317341825Sdim 318341825Sdim if (!UseI.isCopy()) 319341825Sdim return false; 320341825Sdim 321341825Sdim /// COPYs don't have register class constraints, so if the user instruction 322341825Sdim /// is a COPY, we just try to avoid introducing additional cross-class 323341825Sdim /// COPYs. For example: 324341825Sdim /// 325341825Sdim /// RegClassA = COPY RegClassB // Copy parameter 326341825Sdim /// ... 327341825Sdim /// RegClassB = COPY RegClassA // UseI parameter 328341825Sdim /// 329341825Sdim /// which after forwarding becomes 330341825Sdim /// 331341825Sdim /// RegClassA = COPY RegClassB 332341825Sdim /// ... 333341825Sdim /// RegClassB = COPY RegClassB 334341825Sdim /// 335341825Sdim /// so we have reduced the number of cross-class COPYs and potentially 336341825Sdim /// introduced a nop COPY that can be removed. 337341825Sdim const TargetRegisterClass *UseDstRC = 338341825Sdim TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg()); 339341825Sdim 340341825Sdim const TargetRegisterClass *SuperRC = UseDstRC; 341341825Sdim for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses(); 342341825Sdim SuperRC; SuperRC = *SuperRCI++) 343341825Sdim if (SuperRC->contains(CopySrcReg)) 344341825Sdim return true; 345341825Sdim 346341825Sdim return false; 347341825Sdim} 348341825Sdim 349341825Sdim/// Check that \p MI does not have implicit uses that overlap with it's \p Use 350341825Sdim/// operand (the register being replaced), since these can sometimes be 351341825Sdim/// implicitly tied to other operands. For example, on AMDGPU: 352341825Sdim/// 353341825Sdim/// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use> 354341825Sdim/// 355341825Sdim/// the %VGPR2 is implicitly tied to the larger reg operand, but we have no 356341825Sdim/// way of knowing we need to update the latter when updating the former. 357341825Sdimbool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI, 358341825Sdim const MachineOperand &Use) { 359341825Sdim for (const MachineOperand &MIUse : MI.uses()) 360341825Sdim if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() && 361341825Sdim MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg())) 362341825Sdim return true; 363341825Sdim 364341825Sdim return false; 365341825Sdim} 366341825Sdim 367341825Sdim/// Look for available copies whose destination register is used by \p MI and 368341825Sdim/// replace the use in \p MI with the copy's source register. 369341825Sdimvoid MachineCopyPropagation::forwardUses(MachineInstr &MI) { 370344779Sdim if (!Tracker.hasAnyCopies()) 371341825Sdim return; 372341825Sdim 373341825Sdim // Look for non-tied explicit vreg uses that have an active COPY 374341825Sdim // instruction that defines the physical register allocated to them. 375341825Sdim // Replace the vreg with the source of the active COPY. 376341825Sdim for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd; 377341825Sdim ++OpIdx) { 378341825Sdim MachineOperand &MOUse = MI.getOperand(OpIdx); 379341825Sdim // Don't forward into undef use operands since doing so can cause problems 380341825Sdim // with the machine verifier, since it doesn't treat undef reads as reads, 381341825Sdim // so we can end up with a live range that ends on an undef read, leading to 382341825Sdim // an error that the live range doesn't end on a read of the live range 383341825Sdim // register. 384341825Sdim if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() || 385341825Sdim MOUse.isImplicit()) 386341825Sdim continue; 387341825Sdim 388341825Sdim if (!MOUse.getReg()) 389341825Sdim continue; 390341825Sdim 391341825Sdim // Check that the register is marked 'renamable' so we know it is safe to 392341825Sdim // rename it without violating any constraints that aren't expressed in the 393341825Sdim // IR (e.g. ABI or opcode requirements). 394341825Sdim if (!MOUse.isRenamable()) 395341825Sdim continue; 396341825Sdim 397344779Sdim MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg(), *TRI); 398344779Sdim if (!Copy) 399341825Sdim continue; 400341825Sdim 401344779Sdim unsigned CopyDstReg = Copy->getOperand(0).getReg(); 402344779Sdim const MachineOperand &CopySrc = Copy->getOperand(1); 403341825Sdim unsigned CopySrcReg = CopySrc.getReg(); 404341825Sdim 405341825Sdim // FIXME: Don't handle partial uses of wider COPYs yet. 406341825Sdim if (MOUse.getReg() != CopyDstReg) { 407341825Sdim LLVM_DEBUG( 408341825Sdim dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n " 409341825Sdim << MI); 410341825Sdim continue; 411341825Sdim } 412341825Sdim 413341825Sdim // Don't forward COPYs of reserved regs unless they are constant. 414341825Sdim if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg)) 415341825Sdim continue; 416341825Sdim 417344779Sdim if (!isForwardableRegClassCopy(*Copy, MI, OpIdx)) 418341825Sdim continue; 419341825Sdim 420341825Sdim if (hasImplicitOverlap(MI, MOUse)) 421341825Sdim continue; 422341825Sdim 423341825Sdim if (!DebugCounter::shouldExecute(FwdCounter)) { 424341825Sdim LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n " 425341825Sdim << MI); 426341825Sdim continue; 427341825Sdim } 428341825Sdim 429341825Sdim LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI) 430341825Sdim << "\n with " << printReg(CopySrcReg, TRI) 431344779Sdim << "\n in " << MI << " from " << *Copy); 432341825Sdim 433341825Sdim MOUse.setReg(CopySrcReg); 434341825Sdim if (!CopySrc.isRenamable()) 435341825Sdim MOUse.setIsRenamable(false); 436341825Sdim 437341825Sdim LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n"); 438341825Sdim 439341825Sdim // Clear kill markers that may have been invalidated. 440341825Sdim for (MachineInstr &KMI : 441344779Sdim make_range(Copy->getIterator(), std::next(MI.getIterator()))) 442341825Sdim KMI.clearRegisterKills(CopySrcReg, TRI); 443341825Sdim 444341825Sdim ++NumCopyForwards; 445341825Sdim Changed = true; 446341825Sdim } 447341825Sdim} 448341825Sdim 449309124Sdimvoid MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) { 450341825Sdim LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n"); 451276479Sdim 452234285Sdim for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) { 453234285Sdim MachineInstr *MI = &*I; 454234285Sdim ++I; 455234285Sdim 456341825Sdim // Analyze copies (which don't overlap themselves). 457341825Sdim if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(), 458341825Sdim MI->getOperand(1).getReg())) { 459234285Sdim unsigned Def = MI->getOperand(0).getReg(); 460234285Sdim unsigned Src = MI->getOperand(1).getReg(); 461234285Sdim 462309124Sdim assert(!TargetRegisterInfo::isVirtualRegister(Def) && 463309124Sdim !TargetRegisterInfo::isVirtualRegister(Src) && 464309124Sdim "MachineCopyPropagation should be run after register allocation!"); 465234285Sdim 466309124Sdim // The two copies cancel out and the source of the first copy 467309124Sdim // hasn't been overridden, eliminate the second one. e.g. 468327952Sdim // %ecx = COPY %eax 469327952Sdim // ... nothing clobbered eax. 470327952Sdim // %eax = COPY %ecx 471309124Sdim // => 472327952Sdim // %ecx = COPY %eax 473309124Sdim // 474309124Sdim // or 475309124Sdim // 476327952Sdim // %ecx = COPY %eax 477327952Sdim // ... nothing clobbered eax. 478327952Sdim // %ecx = COPY %eax 479309124Sdim // => 480327952Sdim // %ecx = COPY %eax 481309124Sdim if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def)) 482309124Sdim continue; 483234285Sdim 484341825Sdim forwardUses(*MI); 485341825Sdim 486341825Sdim // Src may have been changed by forwardUses() 487341825Sdim Src = MI->getOperand(1).getReg(); 488341825Sdim 489309124Sdim // If Src is defined by a previous copy, the previous copy cannot be 490309124Sdim // eliminated. 491314564Sdim ReadRegister(Src); 492314564Sdim for (const MachineOperand &MO : MI->implicit_operands()) { 493314564Sdim if (!MO.isReg() || !MO.readsReg()) 494314564Sdim continue; 495314564Sdim unsigned Reg = MO.getReg(); 496314564Sdim if (!Reg) 497314564Sdim continue; 498314564Sdim ReadRegister(Reg); 499234285Sdim } 500234285Sdim 501341825Sdim LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump()); 502276479Sdim 503234285Sdim // Copy is now a candidate for deletion. 504309124Sdim if (!MRI->isReserved(Def)) 505309124Sdim MaybeDeadCopies.insert(MI); 506234285Sdim 507309124Sdim // If 'Def' is previously source of another copy, then this earlier copy's 508234285Sdim // source is no longer available. e.g. 509327952Sdim // %xmm9 = copy %xmm2 510234285Sdim // ... 511327952Sdim // %xmm2 = copy %xmm0 512234285Sdim // ... 513327952Sdim // %xmm2 = copy %xmm9 514344779Sdim Tracker.clobberRegister(Def, *TRI); 515314564Sdim for (const MachineOperand &MO : MI->implicit_operands()) { 516314564Sdim if (!MO.isReg() || !MO.isDef()) 517314564Sdim continue; 518314564Sdim unsigned Reg = MO.getReg(); 519314564Sdim if (!Reg) 520314564Sdim continue; 521344779Sdim Tracker.clobberRegister(Reg, *TRI); 522314564Sdim } 523234285Sdim 524344779Sdim Tracker.trackCopy(MI, *TRI); 525234285Sdim 526234285Sdim continue; 527234285Sdim } 528234285Sdim 529341825Sdim // Clobber any earlyclobber regs first. 530341825Sdim for (const MachineOperand &MO : MI->operands()) 531341825Sdim if (MO.isReg() && MO.isEarlyClobber()) { 532341825Sdim unsigned Reg = MO.getReg(); 533341825Sdim // If we have a tied earlyclobber, that means it is also read by this 534341825Sdim // instruction, so we need to make sure we don't remove it as dead 535341825Sdim // later. 536341825Sdim if (MO.isTied()) 537341825Sdim ReadRegister(Reg); 538344779Sdim Tracker.clobberRegister(Reg, *TRI); 539341825Sdim } 540341825Sdim 541341825Sdim forwardUses(*MI); 542341825Sdim 543234285Sdim // Not a copy. 544234285Sdim SmallVector<unsigned, 2> Defs; 545309124Sdim const MachineOperand *RegMask = nullptr; 546309124Sdim for (const MachineOperand &MO : MI->operands()) { 547234285Sdim if (MO.isRegMask()) 548309124Sdim RegMask = &MO; 549234285Sdim if (!MO.isReg()) 550234285Sdim continue; 551234285Sdim unsigned Reg = MO.getReg(); 552234285Sdim if (!Reg) 553234285Sdim continue; 554234285Sdim 555309124Sdim assert(!TargetRegisterInfo::isVirtualRegister(Reg) && 556309124Sdim "MachineCopyPropagation should be run after register allocation!"); 557234285Sdim 558341825Sdim if (MO.isDef() && !MO.isEarlyClobber()) { 559234285Sdim Defs.push_back(Reg); 560321369Sdim continue; 561341825Sdim } else if (!MO.isDebug() && MO.readsReg()) 562314564Sdim ReadRegister(Reg); 563234285Sdim } 564234285Sdim 565234285Sdim // The instruction has a register mask operand which means that it clobbers 566309124Sdim // a large set of registers. Treat clobbered registers the same way as 567309124Sdim // defined registers. 568309124Sdim if (RegMask) { 569234285Sdim // Erase any MaybeDeadCopies whose destination register is clobbered. 570309124Sdim for (SmallSetVector<MachineInstr *, 8>::iterator DI = 571309124Sdim MaybeDeadCopies.begin(); 572309124Sdim DI != MaybeDeadCopies.end();) { 573309124Sdim MachineInstr *MaybeDead = *DI; 574309124Sdim unsigned Reg = MaybeDead->getOperand(0).getReg(); 575309124Sdim assert(!MRI->isReserved(Reg)); 576309124Sdim 577309124Sdim if (!RegMask->clobbersPhysReg(Reg)) { 578309124Sdim ++DI; 579234285Sdim continue; 580309124Sdim } 581309124Sdim 582341825Sdim LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: "; 583341825Sdim MaybeDead->dump()); 584309124Sdim 585344779Sdim // Make sure we invalidate any entries in the copy maps before erasing 586344779Sdim // the instruction. 587344779Sdim Tracker.clobberRegister(Reg, *TRI); 588344779Sdim 589309124Sdim // erase() will return the next valid iterator pointing to the next 590309124Sdim // element after the erased one. 591309124Sdim DI = MaybeDeadCopies.erase(DI); 592309124Sdim MaybeDead->eraseFromParent(); 593234285Sdim Changed = true; 594234285Sdim ++NumDeletes; 595234285Sdim } 596234285Sdim } 597234285Sdim 598309124Sdim // Any previous copy definition or reading the Defs is no longer available. 599309124Sdim for (unsigned Reg : Defs) 600344779Sdim Tracker.clobberRegister(Reg, *TRI); 601234285Sdim } 602234285Sdim 603234285Sdim // If MBB doesn't have successors, delete the copies whose defs are not used. 604234285Sdim // If MBB does have successors, then conservative assume the defs are live-out 605234285Sdim // since we don't want to trust live-in lists. 606234285Sdim if (MBB.succ_empty()) { 607309124Sdim for (MachineInstr *MaybeDead : MaybeDeadCopies) { 608341825Sdim LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: "; 609341825Sdim MaybeDead->dump()); 610309124Sdim assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg())); 611344779Sdim 612344779Sdim // Update matching debug values. 613344779Sdim assert(MaybeDead->isCopy()); 614344779Sdim MaybeDead->changeDebugValuesDefReg(MaybeDead->getOperand(1).getReg()); 615344779Sdim 616309124Sdim MaybeDead->eraseFromParent(); 617309124Sdim Changed = true; 618309124Sdim ++NumDeletes; 619234285Sdim } 620234285Sdim } 621234285Sdim 622309124Sdim MaybeDeadCopies.clear(); 623344779Sdim Tracker.clear(); 624234285Sdim} 625234285Sdim 626234285Sdimbool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) { 627327952Sdim if (skipFunction(MF.getFunction())) 628276479Sdim return false; 629276479Sdim 630309124Sdim Changed = false; 631234285Sdim 632280031Sdim TRI = MF.getSubtarget().getRegisterInfo(); 633280031Sdim TII = MF.getSubtarget().getInstrInfo(); 634243830Sdim MRI = &MF.getRegInfo(); 635234285Sdim 636309124Sdim for (MachineBasicBlock &MBB : MF) 637309124Sdim CopyPropagateBlock(MBB); 638234285Sdim 639234285Sdim return Changed; 640234285Sdim} 641