AllocationOrder.h revision 249423 
1//===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements an allocation order for virtual registers.
11//
12// The preferred allocation order for a virtual register depends on allocation
13// hints and target hooks. The AllocationOrder class encapsulates all of that.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_ALLOCATIONORDER_H
18#define LLVM_CODEGEN_ALLOCATIONORDER_H
19
20#include "llvm/ADT/ArrayRef.h"
21#include "llvm/MC/MCRegisterInfo.h"
22
23namespace llvm {
24
25class RegisterClassInfo;
26class VirtRegMap;
27
28class AllocationOrder {
29  SmallVector<MCPhysReg, 16> Hints;
30  ArrayRef<MCPhysReg> Order;
31  int Pos;
32
33public:
34  /// Create a new AllocationOrder for VirtReg.
35  /// @param VirtReg      Virtual register to allocate for.
36  /// @param VRM          Virtual register map for function.
37  /// @param RegClassInfo Information about reserved and allocatable registers.
38  AllocationOrder(unsigned VirtReg,
39                  const VirtRegMap &VRM,
40                  const RegisterClassInfo &RegClassInfo);
41
42  /// Get the allocation order without reordered hints.
43  ArrayRef<MCPhysReg> getOrder() const { return Order; }
44
45  /// Return the next physical register in the allocation order, or 0.
46  /// It is safe to call next() again after it returned 0, it will keep
47  /// returning 0 until rewind() is called.
48  unsigned next() {
49    if (Pos < 0)
50      return Hints.end()[Pos++];
51    while (Pos < int(Order.size())) {
52      unsigned Reg = Order[Pos++];
53      if (!isHint(Reg))
54        return Reg;
55    }
56    return 0;
57  }
58
59  /// As next(), but allow duplicates to be returned, and stop before the
60  /// Limit'th register in the RegisterClassInfo allocation order.
61  ///
62  /// This can produce more than Limit registers if there are hints.
63  unsigned nextWithDups(unsigned Limit) {
64    if (Pos < 0)
65      return Hints.end()[Pos++];
66    if (Pos < int(Limit))
67      return Order[Pos++];
68    return 0;
69  }
70
71  /// Start over from the beginning.
72  void rewind() { Pos = -int(Hints.size()); }
73
74  /// Return true if the last register returned from next() was a preferred register.
75  bool isHint() const { return Pos <= 0; }
76
77  /// Return true if PhysReg is a preferred register.
78  bool isHint(unsigned PhysReg) const {
79    return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end();
80  }
81};
82
83} // end namespace llvm
84
85#endif
86