TargetInstrPredicate.td revision 344779
1219019Sgabor//===- TargetInstrPredicate.td - ---------------------------*- tablegen -*-===// 2219019Sgabor// 3219019Sgabor// The LLVM Compiler Infrastructure 4219019Sgabor// 5219019Sgabor// This file is distributed under the University of Illinois Open Source 6219019Sgabor// License. See LICENSE.TXT for details. 7219019Sgabor// 8219019Sgabor//===----------------------------------------------------------------------===// 9219019Sgabor// 10219019Sgabor// This file defines class MCInstPredicate and its subclasses. 11219019Sgabor// 12219019Sgabor// MCInstPredicate definitions are used by target scheduling models to describe 13219019Sgabor// constraints on instructions. 14219019Sgabor// 15219019Sgabor// Here is an example of an MCInstPredicate definition in tablegen: 16219019Sgabor// 17219019Sgabor// def MCInstPredicateExample : CheckAll<[ 18219019Sgabor// CheckOpcode<[BLR]>, 19219019Sgabor// CheckIsRegOperand<0>, 20219019Sgabor// CheckNot<CheckRegOperand<0, LR>>]>; 21219019Sgabor// 22219019Sgabor// The syntax for MCInstPredicate is declarative, and predicate definitions can 23219019Sgabor// be composed together in order to generate more complex constraints. 24219019Sgabor// 25219019Sgabor// The `CheckAll` from the example defines a composition of three different 26219019Sgabor// predicates. Definition `MCInstPredicateExample` identifies instructions 27219019Sgabor// whose opcode is BLR, and whose first operand is a register different from 28219019Sgabor// register `LR`. 29219019Sgabor// 30219019Sgabor// Every MCInstPredicate class has a well-known semantic in tablegen. For 31219019Sgabor// example, `CheckOpcode` is a special type of predicate used to describe a 32219019Sgabor// constraint on the value of an instruction opcode. 33219019Sgabor// 34219019Sgabor// MCInstPredicate definitions are typically used by scheduling models to 35219019Sgabor// construct MCSchedPredicate definitions (see the definition of class 36219019Sgabor// MCSchedPredicate in llvm/Target/TargetSchedule.td). 37219019Sgabor// In particular, an MCSchedPredicate can be used instead of a SchedPredicate 38// when defining the set of SchedReadVariant and SchedWriteVariant of a 39// processor scheduling model. 40// 41// The `MCInstPredicateExample` definition above is equivalent (and therefore 42// could replace) the following definition from a previous ExynosM3 model (see 43// AArch64SchedExynosM3.td): 44// 45// def M3BranchLinkFastPred : SchedPredicate<[{ 46// MI->getOpcode() == AArch64::BLR && 47// MI->getOperand(0).isReg() && 48// MI->getOperand(0).getReg() != AArch64::LR}]>; 49// 50// The main advantage of using MCInstPredicate instead of SchedPredicate is 51// portability: users don't need to specify predicates in C++. As a consequence 52// of this, MCInstPredicate definitions are not bound to a particular 53// representation (i.e. MachineInstr vs MCInst). 54// 55// Tablegen backends know how to expand MCInstPredicate definitions into actual 56// C++ code that works on MachineInstr (and/or MCInst). 57// 58// Instances of class PredicateExpander (see utils/Tablegen/PredicateExpander.h) 59// know how to expand a predicate. For each MCInstPredicate class, there must be 60// an "expand" method available in the PredicateExpander interface. 61// 62// For example, a `CheckOpcode` predicate is expanded using method 63// `PredicateExpander::expandCheckOpcode()`. 64// 65// New MCInstPredicate classes must be added to this file. For each new class 66// XYZ, an "expandXYZ" method must be added to the PredicateExpander. 67// 68//===----------------------------------------------------------------------===// 69 70// Forward declarations. 71class Instruction; 72class SchedMachineModel; 73 74// A generic machine instruction predicate. 75class MCInstPredicate; 76 77class MCTrue : MCInstPredicate; // A predicate that always evaluates to True. 78class MCFalse : MCInstPredicate; // A predicate that always evaluates to False. 79def TruePred : MCTrue; 80def FalsePred : MCFalse; 81 82// A predicate used to negate the outcome of another predicate. 83// It allows to easily express "set difference" operations. For example, it 84// makes it easy to describe a check that tests if an opcode is not part of a 85// set of opcodes. 86class CheckNot<MCInstPredicate P> : MCInstPredicate { 87 MCInstPredicate Pred = P; 88} 89 90// This class is used as a building block to define predicates on instruction 91// operands. It is used to reference a specific machine operand. 92class MCOperandPredicate<int Index> : MCInstPredicate { 93 int OpIndex = Index; 94} 95 96// Return true if machine operand at position `Index` is a register operand. 97class CheckIsRegOperand<int Index> : MCOperandPredicate<Index>; 98 99// Return true if machine operand at position `Index` is an immediate operand. 100class CheckIsImmOperand<int Index> : MCOperandPredicate<Index>; 101 102// Check if machine operands at index `First` and index `Second` both reference 103// the same register. 104class CheckSameRegOperand<int First, int Second> : MCInstPredicate { 105 int FirstIndex = First; 106 int SecondIndex = Second; 107} 108 109// Base class for checks on register/immediate operands. 110// It allows users to define checks like: 111// MyFunction(MI->getOperand(Index).getImm()) == Val; 112// 113// In the example above, `MyFunction` is a function that takes as input an 114// immediate operand value, and returns another value. Field `FunctionMapper` is 115// the name of the function to call on the operand value. 116class CheckOperandBase<int Index, string Fn = ""> : MCOperandPredicate<Index> { 117 string FunctionMapper = Fn; 118} 119 120// Check that the machine register operand at position `Index` references 121// register R. This predicate assumes that we already checked that the machine 122// operand at position `Index` is a register operand. 123class CheckRegOperand<int Index, Register R> : CheckOperandBase<Index> { 124 Register Reg = R; 125} 126 127// Check if register operand at index `Index` is the invalid register. 128class CheckInvalidRegOperand<int Index> : CheckOperandBase<Index>; 129 130// Check that the operand at position `Index` is immediate `Imm`. 131// If field `FunctionMapper` is a non-empty string, then function 132// `FunctionMapper` is applied to the operand value, and the return value is then 133// compared against `Imm`. 134class CheckImmOperand<int Index, int Imm> : CheckOperandBase<Index> { 135 int ImmVal = Imm; 136} 137 138// Similar to CheckImmOperand, however the immediate is not a literal number. 139// This is useful when we want to compare the value of an operand against an 140// enum value, and we know the actual integer value of that enum. 141class CheckImmOperand_s<int Index, string Value> : CheckOperandBase<Index> { 142 string ImmVal = Value; 143} 144 145// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set. 146// Otherwise, it expands to a CheckNot<CheckInvalidRegOperand<Index>>. 147class CheckRegOperandSimple<int Index> : CheckOperandBase<Index>; 148 149// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set. 150// Otherwise, it simply evaluates to TruePred. 151class CheckImmOperandSimple<int Index> : CheckOperandBase<Index>; 152 153// Check that the operand at position `Index` is immediate value zero. 154class CheckZeroOperand<int Index> : CheckImmOperand<Index, 0>; 155 156// Check that the instruction has exactly `Num` operands. 157class CheckNumOperands<int Num> : MCInstPredicate { 158 int NumOps = Num; 159} 160 161// Check that the instruction opcode is one of the opcodes in set `Opcodes`. 162// This is a simple set membership query. The easier way to check if an opcode 163// is not a member of the set is by using a `CheckNot<CheckOpcode<[...]>>` 164// sequence. 165class CheckOpcode<list<Instruction> Opcodes> : MCInstPredicate { 166 list<Instruction> ValidOpcodes = Opcodes; 167} 168 169// Check that the instruction opcode is a pseudo opcode member of the set 170// `Opcodes`. This check is always expanded to "false" if we are generating 171// code for MCInst. 172class CheckPseudo<list<Instruction> Opcodes> : CheckOpcode<Opcodes>; 173 174// A non-portable predicate. Only to use as a last resort when a block of code 175// cannot possibly be converted in a declarative way using other MCInstPredicate 176// classes. This check is always expanded to "false" when generating code for 177// MCInst. 178class CheckNonPortable<string Code> : MCInstPredicate { 179 string CodeBlock = Code; 180} 181 182// A sequence of predicates. It is used as the base class for CheckAll, and 183// CheckAny. It allows to describe compositions of predicates. 184class CheckPredicateSequence<list<MCInstPredicate> Preds> : MCInstPredicate { 185 list<MCInstPredicate> Predicates = Preds; 186} 187 188// Check that all of the predicates in `Preds` evaluate to true. 189class CheckAll<list<MCInstPredicate> Sequence> 190 : CheckPredicateSequence<Sequence>; 191 192// Check that at least one of the predicates in `Preds` evaluates to true. 193class CheckAny<list<MCInstPredicate> Sequence> 194 : CheckPredicateSequence<Sequence>; 195 196 197// Used to expand the body of a function predicate. See the definition of 198// TIIPredicate below. 199class MCStatement; 200 201// Expands to a return statement. The return expression is a boolean expression 202// described by a MCInstPredicate. 203class MCReturnStatement<MCInstPredicate predicate> : MCStatement { 204 MCInstPredicate Pred = predicate; 205} 206 207// Used to automatically construct cases of a switch statement where the switch 208// variable is an instruction opcode. There is a 'case' for every opcode in the 209// `opcodes` list, and each case is associated with MCStatement `caseStmt`. 210class MCOpcodeSwitchCase<list<Instruction> opcodes, MCStatement caseStmt> { 211 list<Instruction> Opcodes = opcodes; 212 MCStatement CaseStmt = caseStmt; 213} 214 215// Expands to a switch statement. The switch variable is an instruction opcode. 216// The auto-generated switch is populated by a number of cases based on the 217// `cases` list in input. A default case is automatically generated, and it 218// evaluates to `default`. 219class MCOpcodeSwitchStatement<list<MCOpcodeSwitchCase> cases, 220 MCStatement default> : MCStatement { 221 list<MCOpcodeSwitchCase> Cases = cases; 222 MCStatement DefaultCase = default; 223} 224 225// Base class for function predicates. 226class FunctionPredicateBase<string name, MCStatement body> { 227 string FunctionName = name; 228 MCStatement Body = body; 229} 230 231// Check that a call to method `Name` in class "XXXInstrInfo" (where XXX is 232// the name of a target) returns true. 233// 234// TIIPredicate definitions are used to model calls to the target-specific 235// InstrInfo. A TIIPredicate is treated specially by the InstrInfoEmitter 236// tablegen backend, which will use it to automatically generate a definition in 237// the target specific `InstrInfo` class. 238// 239// There cannot be multiple TIIPredicate definitions with the same name for the 240// same target. 241class TIIPredicate<string Name, MCStatement body> 242 : FunctionPredicateBase<Name, body>, MCInstPredicate; 243 244// A function predicate that takes as input a machine instruction, and returns 245// a boolean value. 246// 247// This predicate is expanded into a function call by the PredicateExpander. 248// In particular, the PredicateExpander would either expand this predicate into 249// a call to `MCInstFn`, or into a call to`MachineInstrFn` depending on whether 250// it is lowering predicates for MCInst or MachineInstr. 251// 252// In this context, `MCInstFn` and `MachineInstrFn` are both function names. 253class CheckFunctionPredicate<string MCInstFn, string MachineInstrFn> : MCInstPredicate { 254 string MCInstFnName = MCInstFn; 255 string MachineInstrFnName = MachineInstrFn; 256} 257 258// Used to classify machine instructions based on a machine instruction 259// predicate. 260// 261// Let IC be an InstructionEquivalenceClass definition, and MI a machine 262// instruction. We say that MI belongs to the equivalence class described by IC 263// if and only if the following two conditions are met: 264// a) MI's opcode is in the `opcodes` set, and 265// b) `Predicate` evaluates to true when applied to MI. 266// 267// Instances of this class can be used by processor scheduling models to 268// describe instructions that have a property in common. For example, 269// InstructionEquivalenceClass definitions can be used to identify the set of 270// dependency breaking instructions for a processor model. 271// 272// An (optional) list of operand indices can be used to further describe 273// properties that apply to instruction operands. For example, it can be used to 274// identify register uses of a dependency breaking instructions that are not in 275// a RAW dependency. 276class InstructionEquivalenceClass<list<Instruction> opcodes, 277 MCInstPredicate pred, 278 list<int> operands = []> { 279 list<Instruction> Opcodes = opcodes; 280 MCInstPredicate Predicate = pred; 281 list<int> OperandIndices = operands; 282} 283 284// Used by processor models to describe dependency breaking instructions. 285// 286// This is mainly an alias for InstructionEquivalenceClass. Input operand 287// `BrokenDeps` identifies the set of "broken dependencies". There is one bit 288// per each implicit and explicit input operand. An empty set of broken 289// dependencies means: "explicit input register operands are independent." 290class DepBreakingClass<list<Instruction> opcodes, MCInstPredicate pred, 291 list<int> BrokenDeps = []> 292 : InstructionEquivalenceClass<opcodes, pred, BrokenDeps>; 293 294// A function descriptor used to describe the signature of a predicate methods 295// which will be expanded by the STIPredicateExpander into a tablegen'd 296// XXXGenSubtargetInfo class member definition (here, XXX is a target name). 297// 298// It describes the signature of a TargetSubtarget hook, as well as a few extra 299// properties. Examples of extra properties are: 300// - The default return value for the auto-generate function hook. 301// - A list of subtarget hooks (Delegates) that are called from this function. 302// 303class STIPredicateDecl<string name, MCInstPredicate default = FalsePred, 304 bit overrides = 1, bit expandForMC = 1, 305 bit updatesOpcodeMask = 0, 306 list<STIPredicateDecl> delegates = []> { 307 string Name = name; 308 309 MCInstPredicate DefaultReturnValue = default; 310 311 // True if this method is declared as virtual in class TargetSubtargetInfo. 312 bit OverridesBaseClassMember = overrides; 313 314 // True if we need an equivalent predicate function in the MC layer. 315 bit ExpandForMC = expandForMC; 316 317 // True if the autogenerated method has a extra in/out APInt param used as a 318 // mask of operands. 319 bit UpdatesOpcodeMask = updatesOpcodeMask; 320 321 // A list of STIPredicates used by this definition to delegate part of the 322 // computation. For example, STIPredicateFunction `isDependencyBreaking()` 323 // delegates to `isZeroIdiom()` part of its computation. 324 list<STIPredicateDecl> Delegates = delegates; 325} 326 327// A predicate function definition member of class `XXXGenSubtargetInfo`. 328// 329// If `Declaration.ExpandForMC` is true, then SubtargetEmitter 330// will also expand another definition of this method that accepts a MCInst. 331class STIPredicate<STIPredicateDecl declaration, 332 list<InstructionEquivalenceClass> classes> { 333 STIPredicateDecl Declaration = declaration; 334 list<InstructionEquivalenceClass> Classes = classes; 335 SchedMachineModel SchedModel = ?; 336} 337 338// Convenience classes and definitions used by processor scheduling models to 339// describe dependency breaking instructions and move elimination candidates. 340let UpdatesOpcodeMask = 1 in { 341 342def IsZeroIdiomDecl : STIPredicateDecl<"isZeroIdiom">; 343 344let Delegates = [IsZeroIdiomDecl] in 345def IsDepBreakingDecl : STIPredicateDecl<"isDependencyBreaking">; 346 347} // UpdatesOpcodeMask 348 349def IsOptimizableRegisterMoveDecl 350 : STIPredicateDecl<"isOptimizableRegisterMove">; 351 352class IsZeroIdiomFunction<list<DepBreakingClass> classes> 353 : STIPredicate<IsZeroIdiomDecl, classes>; 354 355class IsDepBreakingFunction<list<DepBreakingClass> classes> 356 : STIPredicate<IsDepBreakingDecl, classes>; 357 358class IsOptimizableRegisterMove<list<InstructionEquivalenceClass> classes> 359 : STIPredicate<IsOptimizableRegisterMoveDecl, classes>; 360