ARMBuildAttributes.h revision 309124 
1//===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains enumerations and support routines for ARM build attributes
11// as defined in ARM ABI addenda document (ABI release 2.08).
12//
13// ELF for the ARM Architecture r2.09 - November 30, 2012
14//
15// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf
16//
17//===----------------------------------------------------------------------===//
18
19#ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
20#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
21
22namespace llvm {
23class StringRef;
24
25namespace ARMBuildAttrs {
26
27enum SpecialAttr {
28  // This is for the .cpu asm attr. It translates into one or more
29  // AttrType (below) entries in the .ARM.attributes section in the ELF.
30  SEL_CPU
31};
32
33enum AttrType {
34  // Rest correspond to ELF/.ARM.attributes
35  File                      = 1,
36  CPU_raw_name              = 4,
37  CPU_name                  = 5,
38  CPU_arch                  = 6,
39  CPU_arch_profile          = 7,
40  ARM_ISA_use               = 8,
41  THUMB_ISA_use             = 9,
42  FP_arch                   = 10,
43  WMMX_arch                 = 11,
44  Advanced_SIMD_arch        = 12,
45  PCS_config                = 13,
46  ABI_PCS_R9_use            = 14,
47  ABI_PCS_RW_data           = 15,
48  ABI_PCS_RO_data           = 16,
49  ABI_PCS_GOT_use           = 17,
50  ABI_PCS_wchar_t           = 18,
51  ABI_FP_rounding           = 19,
52  ABI_FP_denormal           = 20,
53  ABI_FP_exceptions         = 21,
54  ABI_FP_user_exceptions    = 22,
55  ABI_FP_number_model       = 23,
56  ABI_align_needed          = 24,
57  ABI_align_preserved       = 25,
58  ABI_enum_size             = 26,
59  ABI_HardFP_use            = 27,
60  ABI_VFP_args              = 28,
61  ABI_WMMX_args             = 29,
62  ABI_optimization_goals    = 30,
63  ABI_FP_optimization_goals = 31,
64  compatibility             = 32,
65  CPU_unaligned_access      = 34,
66  FP_HP_extension           = 36,
67  ABI_FP_16bit_format       = 38,
68  MPextension_use           = 42, // recoded from 70 (ABI r2.08)
69  DIV_use                   = 44,
70  DSP_extension             = 46,
71  also_compatible_with      = 65,
72  conformance               = 67,
73  Virtualization_use        = 68,
74
75  /// Legacy Tags
76  Section                   = 2,  // deprecated (ABI r2.09)
77  Symbol                    = 3,  // deprecated (ABI r2.09)
78  ABI_align8_needed         = 24, // renamed to ABI_align_needed (ABI r2.09)
79  ABI_align8_preserved      = 25, // renamed to ABI_align_preserved (ABI r2.09)
80  nodefaults                = 64, // deprecated (ABI r2.09)
81  T2EE_use                  = 66, // deprecated (ABI r2.09)
82  MPextension_use_old       = 70  // recoded to MPextension_use (ABI r2.08)
83};
84
85StringRef AttrTypeAsString(unsigned Attr, bool HasTagPrefix = true);
86StringRef AttrTypeAsString(AttrType Attr, bool HasTagPrefix = true);
87int AttrTypeFromString(StringRef Tag);
88
89// Magic numbers for .ARM.attributes
90enum AttrMagic {
91  Format_Version  = 0x41
92};
93
94// Legal Values for CPU_arch, (=6), uleb128
95enum CPUArch {
96  Pre_v4   = 0,
97  v4       = 1,   // e.g. SA110
98  v4T      = 2,   // e.g. ARM7TDMI
99  v5T      = 3,   // e.g. ARM9TDMI
100  v5TE     = 4,   // e.g. ARM946E_S
101  v5TEJ    = 5,   // e.g. ARM926EJ_S
102  v6       = 6,   // e.g. ARM1136J_S
103  v6KZ     = 7,   // e.g. ARM1176JZ_S
104  v6T2     = 8,   // e.g. ARM1156T2_S
105  v6K      = 9,   // e.g. ARM1176JZ_S
106  v7       = 10,  // e.g. Cortex A8, Cortex M3
107  v6_M     = 11,  // e.g. Cortex M1
108  v6S_M    = 12,  // v6_M with the System extensions
109  v7E_M    = 13,  // v7_M with DSP extensions
110  v8_A     = 14,  // v8_A AArch32
111  v8_M_Base= 16,  // v8_M_Base AArch32
112  v8_M_Main= 17,  // v8_M_Main AArch32
113};
114
115enum CPUArchProfile {               // (=7), uleb128
116  Not_Applicable          = 0,      // pre v7, or cross-profile code
117  ApplicationProfile      = (0x41), // 'A' (e.g. for Cortex A8)
118  RealTimeProfile         = (0x52), // 'R' (e.g. for Cortex R4)
119  MicroControllerProfile  = (0x4D), // 'M' (e.g. for Cortex M3)
120  SystemProfile           = (0x53)  // 'S' Application or real-time profile
121};
122
123// The following have a lot of common use cases
124enum {
125  Not_Allowed = 0,
126  Allowed = 1,
127
128  // Tag_ARM_ISA_use (=8), uleb128
129
130  // Tag_THUMB_ISA_use, (=9), uleb128
131  AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
132  AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile
133
134  // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
135  AllowFPv2  = 2,     // v2 FP ISA permitted (implies use of the v1 FP ISA)
136  AllowFPv3A = 3,     // v3 FP ISA permitted (implies use of the v2 FP ISA)
137  AllowFPv3B = 4,     // v3 FP ISA permitted, but only D0-D15, S0-S31
138  AllowFPv4A = 5,     // v4 FP ISA permitted (implies use of v3 FP ISA)
139  AllowFPv4B = 6,     // v4 FP ISA was permitted, but only D0-D15, S0-S31
140  AllowFPARMv8A = 7,  // Use of the ARM v8-A FP ISA was permitted
141  AllowFPARMv8B = 8,  // Use of the ARM v8-A FP ISA was permitted, but only
142                      // D0-D15, S0-S31
143
144  // Tag_WMMX_arch, (=11), uleb128
145  AllowWMMXv1 = 1,  // The user permitted this entity to use WMMX v1
146  AllowWMMXv2 = 2,  // The user permitted this entity to use WMMX v2
147
148  // Tag_Advanced_SIMD_arch, (=12), uleb128
149  AllowNeon = 1,      // SIMDv1 was permitted
150  AllowNeon2 = 2,     // SIMDv2 was permitted (Half-precision FP, MAC operations)
151  AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
152  AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA)
153
154  // Tag_ABI_PCS_R9_use, (=14), uleb128
155  R9IsGPR = 0,        // R9 used as v6 (just another callee-saved register)
156  R9IsSB = 1,         // R9 used as a global static base rgister
157  R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
158  R9Reserved = 3,     // R9 not used by code associated with attributed entity
159
160  // Tag_ABI_PCS_RW_data, (=15), uleb128
161  AddressRWPCRel = 1, // Address RW static data PC-relative
162  AddressRWSBRel = 2, // Address RW static data SB-relative
163  AddressRWNone = 3, // No RW static data permitted
164
165  // Tag_ABI_PCS_RO_data, (=14), uleb128
166  AddressROPCRel = 1, // Address RO static data PC-relative
167  AddressRONone = 2, // No RO static data permitted
168
169  // Tag_ABI_PCS_GOT_use, (=17), uleb128
170  AddressDirect = 1, // Address imported data directly
171  AddressGOT = 2, // Address imported data indirectly (via GOT)
172
173  // Tag_ABI_PCS_wchar_t, (=18), uleb128
174  WCharProhibited = 0,  // wchar_t is not used
175  WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2
176  WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4
177
178  // Tag_ABI_FP_denormal, (=20), uleb128
179  PositiveZero = 0,
180  IEEEDenormals = 1,
181  PreserveFPSign = 2, // sign when flushed-to-zero is preserved
182
183  // Tag_ABI_FP_number_model, (=23), uleb128
184  AllowRTABI = 2,  // numbers, infinities, and one quiet NaN (see [RTABI])
185  AllowIEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
186
187  // Tag_ABI_enum_size, (=26), uleb128
188  EnumProhibited = 0, // The user prohibited the use of enums when building
189                      // this entity.
190  EnumSmallest = 1,   // Enum is smallest container big enough to hold all
191                      // values.
192  Enum32Bit = 2,      // Enum is at least 32 bits.
193  Enum32BitABI = 3,   // Every enumeration visible across an ABI-complying
194                      // interface contains a value needing 32 bits to encode
195                      // it; other enums can be containerized.
196
197  // Tag_ABI_HardFP_use, (=27), uleb128
198  HardFPImplied = 0,          // FP use should be implied by Tag_FP_arch
199  HardFPSinglePrecision = 1,  // Single-precision only
200
201  // Tag_ABI_VFP_args, (=28), uleb128
202  BaseAAPCS = 0,
203  HardFPAAPCS = 1,
204
205  // Tag_FP_HP_extension, (=36), uleb128
206  AllowHPFP = 1, // Allow use of Half Precision FP
207
208  // Tag_FP_16bit_format, (=38), uleb128
209  FP16FormatIEEE = 1,
210
211  // Tag_MPextension_use, (=42), uleb128
212  AllowMP = 1, // Allow use of MP extensions
213
214  // Tag_DIV_use, (=44), uleb128
215  // Note: AllowDIVExt must be emitted if and only if the permission to use
216  // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV
217  AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no
218                        // info exists.
219  DisallowDIV = 1,      // Hardware divide explicitly disallowed.
220  AllowDIVExt = 2,      // Allow hardware divide as optional architecture
221                        // extension above the base arch specified by
222                        // Tag_CPU_arch and Tag_CPU_arch_profile.
223
224  // Tag_Virtualization_use, (=68), uleb128
225  AllowTZ = 1,
226  AllowVirtualization = 2,
227  AllowTZVirtualization = 3
228};
229
230} // namespace ARMBuildAttrs
231} // namespace llvm
232
233#endif
234