1//===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains enumerations and support routines for ARM build attributes
10// as defined in ARM ABI addenda document (ABI release 2.08).
11//
12// ELF for the ARM Architecture r2.09 - November 30, 2012
13//
14// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf
15//
16//===----------------------------------------------------------------------===//
17
18#ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
19#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
20
21namespace llvm {
22class StringRef;
23
24namespace ARMBuildAttrs {
25
26enum SpecialAttr {
27  // This is for the .cpu asm attr. It translates into one or more
28  // AttrType (below) entries in the .ARM.attributes section in the ELF.
29  SEL_CPU
30};
31
32enum AttrType {
33  // Rest correspond to ELF/.ARM.attributes
34  File                      = 1,
35  CPU_raw_name              = 4,
36  CPU_name                  = 5,
37  CPU_arch                  = 6,
38  CPU_arch_profile          = 7,
39  ARM_ISA_use               = 8,
40  THUMB_ISA_use             = 9,
41  FP_arch                   = 10,
42  WMMX_arch                 = 11,
43  Advanced_SIMD_arch        = 12,
44  PCS_config                = 13,
45  ABI_PCS_R9_use            = 14,
46  ABI_PCS_RW_data           = 15,
47  ABI_PCS_RO_data           = 16,
48  ABI_PCS_GOT_use           = 17,
49  ABI_PCS_wchar_t           = 18,
50  ABI_FP_rounding           = 19,
51  ABI_FP_denormal           = 20,
52  ABI_FP_exceptions         = 21,
53  ABI_FP_user_exceptions    = 22,
54  ABI_FP_number_model       = 23,
55  ABI_align_needed          = 24,
56  ABI_align_preserved       = 25,
57  ABI_enum_size             = 26,
58  ABI_HardFP_use            = 27,
59  ABI_VFP_args              = 28,
60  ABI_WMMX_args             = 29,
61  ABI_optimization_goals    = 30,
62  ABI_FP_optimization_goals = 31,
63  compatibility             = 32,
64  CPU_unaligned_access      = 34,
65  FP_HP_extension           = 36,
66  ABI_FP_16bit_format       = 38,
67  MPextension_use           = 42, // recoded from 70 (ABI r2.08)
68  DIV_use                   = 44,
69  DSP_extension             = 46,
70  MVE_arch                  = 48,
71  also_compatible_with      = 65,
72  conformance               = 67,
73  Virtualization_use        = 68,
74
75  /// Legacy Tags
76  Section                   = 2,  // deprecated (ABI r2.09)
77  Symbol                    = 3,  // deprecated (ABI r2.09)
78  ABI_align8_needed         = 24, // renamed to ABI_align_needed (ABI r2.09)
79  ABI_align8_preserved      = 25, // renamed to ABI_align_preserved (ABI r2.09)
80  nodefaults                = 64, // deprecated (ABI r2.09)
81  T2EE_use                  = 66, // deprecated (ABI r2.09)
82  MPextension_use_old       = 70  // recoded to MPextension_use (ABI r2.08)
83};
84
85StringRef AttrTypeAsString(unsigned Attr, bool HasTagPrefix = true);
86StringRef AttrTypeAsString(AttrType Attr, bool HasTagPrefix = true);
87int AttrTypeFromString(StringRef Tag);
88
89// Magic numbers for .ARM.attributes
90enum AttrMagic {
91  Format_Version  = 0x41
92};
93
94// Legal Values for CPU_arch, (=6), uleb128
95enum CPUArch {
96  Pre_v4   = 0,
97  v4       = 1,   // e.g. SA110
98  v4T      = 2,   // e.g. ARM7TDMI
99  v5T      = 3,   // e.g. ARM9TDMI
100  v5TE     = 4,   // e.g. ARM946E_S
101  v5TEJ    = 5,   // e.g. ARM926EJ_S
102  v6       = 6,   // e.g. ARM1136J_S
103  v6KZ     = 7,   // e.g. ARM1176JZ_S
104  v6T2     = 8,   // e.g. ARM1156T2_S
105  v6K      = 9,   // e.g. ARM1176JZ_S
106  v7       = 10,  // e.g. Cortex A8, Cortex M3
107  v6_M     = 11,  // e.g. Cortex M1
108  v6S_M    = 12,  // v6_M with the System extensions
109  v7E_M    = 13,  // v7_M with DSP extensions
110  v8_A     = 14,  // v8_A AArch32
111  v8_R     = 15,  // e.g. Cortex R52
112  v8_M_Base= 16,  // v8_M_Base AArch32
113  v8_M_Main= 17,  // v8_M_Main AArch32
114  v8_1_M_Main=21, // v8_1_M_Main AArch32
115};
116
117enum CPUArchProfile {               // (=7), uleb128
118  Not_Applicable          = 0,      // pre v7, or cross-profile code
119  ApplicationProfile      = (0x41), // 'A' (e.g. for Cortex A8)
120  RealTimeProfile         = (0x52), // 'R' (e.g. for Cortex R4)
121  MicroControllerProfile  = (0x4D), // 'M' (e.g. for Cortex M3)
122  SystemProfile           = (0x53)  // 'S' Application or real-time profile
123};
124
125// The following have a lot of common use cases
126enum {
127  Not_Allowed = 0,
128  Allowed = 1,
129
130  // Tag_ARM_ISA_use (=8), uleb128
131
132  // Tag_THUMB_ISA_use, (=9), uleb128
133  AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
134  AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile
135
136  // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
137  AllowFPv2  = 2,     // v2 FP ISA permitted (implies use of the v1 FP ISA)
138  AllowFPv3A = 3,     // v3 FP ISA permitted (implies use of the v2 FP ISA)
139  AllowFPv3B = 4,     // v3 FP ISA permitted, but only D0-D15, S0-S31
140  AllowFPv4A = 5,     // v4 FP ISA permitted (implies use of v3 FP ISA)
141  AllowFPv4B = 6,     // v4 FP ISA was permitted, but only D0-D15, S0-S31
142  AllowFPARMv8A = 7,  // Use of the ARM v8-A FP ISA was permitted
143  AllowFPARMv8B = 8,  // Use of the ARM v8-A FP ISA was permitted, but only
144                      // D0-D15, S0-S31
145
146  // Tag_WMMX_arch, (=11), uleb128
147  AllowWMMXv1 = 1,  // The user permitted this entity to use WMMX v1
148  AllowWMMXv2 = 2,  // The user permitted this entity to use WMMX v2
149
150  // Tag_Advanced_SIMD_arch, (=12), uleb128
151  AllowNeon = 1,      // SIMDv1 was permitted
152  AllowNeon2 = 2,     // SIMDv2 was permitted (Half-precision FP, MAC operations)
153  AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
154  AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA)
155
156  // Tag_MVE_arch, (=48), uleb128
157  AllowMVEInteger = 1, // integer-only MVE was permitted
158  AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted
159
160  // Tag_ABI_PCS_R9_use, (=14), uleb128
161  R9IsGPR = 0,        // R9 used as v6 (just another callee-saved register)
162  R9IsSB = 1,         // R9 used as a global static base rgister
163  R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
164  R9Reserved = 3,     // R9 not used by code associated with attributed entity
165
166  // Tag_ABI_PCS_RW_data, (=15), uleb128
167  AddressRWPCRel = 1, // Address RW static data PC-relative
168  AddressRWSBRel = 2, // Address RW static data SB-relative
169  AddressRWNone = 3, // No RW static data permitted
170
171  // Tag_ABI_PCS_RO_data, (=14), uleb128
172  AddressROPCRel = 1, // Address RO static data PC-relative
173  AddressRONone = 2, // No RO static data permitted
174
175  // Tag_ABI_PCS_GOT_use, (=17), uleb128
176  AddressDirect = 1, // Address imported data directly
177  AddressGOT = 2, // Address imported data indirectly (via GOT)
178
179  // Tag_ABI_PCS_wchar_t, (=18), uleb128
180  WCharProhibited = 0,  // wchar_t is not used
181  WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2
182  WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4
183
184  // Tag_ABI_align_needed, (=24), uleb128
185  Align8Byte = 1,
186  Align4Byte = 2,
187  AlignReserved = 3,
188
189  // Tag_ABI_align_needed, (=25), uleb128
190  AlignNotPreserved = 0,
191  AlignPreserve8Byte = 1,
192  AlignPreserveAll = 2,
193
194  // Tag_ABI_FP_denormal, (=20), uleb128
195  PositiveZero = 0,
196  IEEEDenormals = 1,
197  PreserveFPSign = 2, // sign when flushed-to-zero is preserved
198
199  // Tag_ABI_FP_number_model, (=23), uleb128
200  AllowIEEENormal = 1,
201  AllowRTABI = 2,  // numbers, infinities, and one quiet NaN (see [RTABI])
202  AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
203
204  // Tag_ABI_enum_size, (=26), uleb128
205  EnumProhibited = 0, // The user prohibited the use of enums when building
206                      // this entity.
207  EnumSmallest = 1,   // Enum is smallest container big enough to hold all
208                      // values.
209  Enum32Bit = 2,      // Enum is at least 32 bits.
210  Enum32BitABI = 3,   // Every enumeration visible across an ABI-complying
211                      // interface contains a value needing 32 bits to encode
212                      // it; other enums can be containerized.
213
214  // Tag_ABI_HardFP_use, (=27), uleb128
215  HardFPImplied = 0,          // FP use should be implied by Tag_FP_arch
216  HardFPSinglePrecision = 1,  // Single-precision only
217
218  // Tag_ABI_VFP_args, (=28), uleb128
219  BaseAAPCS = 0,
220  HardFPAAPCS = 1,
221  ToolChainFPPCS = 2,
222  CompatibleFPAAPCS = 3,
223
224  // Tag_FP_HP_extension, (=36), uleb128
225  AllowHPFP = 1, // Allow use of Half Precision FP
226
227  // Tag_FP_16bit_format, (=38), uleb128
228  FP16FormatIEEE = 1,
229  FP16VFP3 = 2,
230
231  // Tag_MPextension_use, (=42), uleb128
232  AllowMP = 1, // Allow use of MP extensions
233
234  // Tag_DIV_use, (=44), uleb128
235  // Note: AllowDIVExt must be emitted if and only if the permission to use
236  // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV
237  AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no
238                        // info exists.
239  DisallowDIV = 1,      // Hardware divide explicitly disallowed.
240  AllowDIVExt = 2,      // Allow hardware divide as optional architecture
241                        // extension above the base arch specified by
242                        // Tag_CPU_arch and Tag_CPU_arch_profile.
243
244  // Tag_Virtualization_use, (=68), uleb128
245  AllowTZ = 1,
246  AllowVirtualization = 2,
247  AllowTZVirtualization = 3
248};
249
250} // namespace ARMBuildAttrs
251} // namespace llvm
252
253#endif
254