AArch64TargetParser.h revision 353358 
1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H
15#define LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H
16
17#include "llvm/ADT/StringRef.h"
18#include "llvm/ADT/Triple.h"
19#include "llvm/Support/ARMTargetParser.h"
20#include <vector>
21
22// FIXME:This should be made into class design,to avoid dupplication.
23namespace llvm {
24namespace AArch64 {
25
26// Arch extension modifiers for CPUs.
27enum ArchExtKind : unsigned {
28  AEK_INVALID =     0,
29  AEK_NONE =        1,
30  AEK_CRC =         1 << 1,
31  AEK_CRYPTO =      1 << 2,
32  AEK_FP =          1 << 3,
33  AEK_SIMD =        1 << 4,
34  AEK_FP16 =        1 << 5,
35  AEK_PROFILE =     1 << 6,
36  AEK_RAS =         1 << 7,
37  AEK_LSE =         1 << 8,
38  AEK_SVE =         1 << 9,
39  AEK_DOTPROD =     1 << 10,
40  AEK_RCPC =        1 << 11,
41  AEK_RDM =         1 << 12,
42  AEK_SM4 =         1 << 13,
43  AEK_SHA3 =        1 << 14,
44  AEK_SHA2 =        1 << 15,
45  AEK_AES =         1 << 16,
46  AEK_FP16FML =     1 << 17,
47  AEK_RAND =        1 << 18,
48  AEK_MTE =         1 << 19,
49  AEK_SSBS =        1 << 20,
50  AEK_SB =          1 << 21,
51  AEK_PREDRES =     1 << 22,
52  AEK_SVE2 =        1 << 23,
53  AEK_SVE2AES =     1 << 24,
54  AEK_SVE2SM4 =     1 << 25,
55  AEK_SVE2SHA3 =    1 << 26,
56  AEK_SVE2BITPERM = 1 << 27,
57};
58
59enum class ArchKind {
60#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
61#include "AArch64TargetParser.def"
62};
63
64const ARM::ArchNames<ArchKind> AArch64ARCHNames[] = {
65#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU,        \
66                     ARCH_BASE_EXT)                                            \
67  {NAME,                                                                       \
68   sizeof(NAME) - 1,                                                           \
69   CPU_ATTR,                                                                   \
70   sizeof(CPU_ATTR) - 1,                                                       \
71   SUB_ARCH,                                                                   \
72   sizeof(SUB_ARCH) - 1,                                                       \
73   ARM::FPUKind::ARCH_FPU,                                                     \
74   ARCH_BASE_EXT,                                                              \
75   AArch64::ArchKind::ID,                                                      \
76   ARCH_ATTR},
77#include "AArch64TargetParser.def"
78};
79
80const ARM::ExtName AArch64ARCHExtNames[] = {
81#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                   \
82  {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
83#include "AArch64TargetParser.def"
84};
85
86const ARM::CpuNames<ArchKind> AArch64CPUNames[] = {
87#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
88  {NAME, sizeof(NAME) - 1, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
89#include "AArch64TargetParser.def"
90};
91
92const ArchKind ArchKinds[] = {
93#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
94    ArchKind::ID,
95#include "AArch64TargetParser.def"
96};
97
98// FIXME: These should be moved to TargetTuple once it exists
99bool getExtensionFeatures(unsigned Extensions,
100                          std::vector<StringRef> &Features);
101bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features);
102
103StringRef getArchName(ArchKind AK);
104unsigned getArchAttr(ArchKind AK);
105StringRef getCPUAttr(ArchKind AK);
106StringRef getSubArch(ArchKind AK);
107StringRef getArchExtName(unsigned ArchExtKind);
108StringRef getArchExtFeature(StringRef ArchExt);
109
110// Information by Name
111unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
112unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
113StringRef getDefaultCPU(StringRef Arch);
114ArchKind getCPUArchKind(StringRef CPU);
115
116// Parser
117ArchKind parseArch(StringRef Arch);
118ArchExtKind parseArchExt(StringRef ArchExt);
119ArchKind parseCPUArch(StringRef CPU);
120// Used by target parser tests
121void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
122
123bool isX18ReservedByDefault(const Triple &TT);
124
125} // namespace AArch64
126} // namespace llvm
127
128#endif
129