ISDOpcodes.h revision 207618
1//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares codegen opcodes and related utilities. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_CODEGEN_ISDOPCODES_H 15#define LLVM_CODEGEN_ISDOPCODES_H 16 17namespace llvm { 18 19/// ISD namespace - This namespace contains an enum which represents all of the 20/// SelectionDAG node types and value types. 21/// 22namespace ISD { 23 24 //===--------------------------------------------------------------------===// 25 /// ISD::NodeType enum - This enum defines the target-independent operators 26 /// for a SelectionDAG. 27 /// 28 /// Targets may also define target-dependent operator codes for SDNodes. For 29 /// example, on x86, these are the enum values in the X86ISD namespace. 30 /// Targets should aim to use target-independent operators to model their 31 /// instruction sets as much as possible, and only use target-dependent 32 /// operators when they have special requirements. 33 /// 34 /// Finally, during and after selection proper, SNodes may use special 35 /// operator codes that correspond directly with MachineInstr opcodes. These 36 /// are used to represent selected instructions. See the isMachineOpcode() 37 /// and getMachineOpcode() member functions of SDNode. 38 /// 39 enum NodeType { 40 // DELETED_NODE - This is an illegal value that is used to catch 41 // errors. This opcode is not a legal opcode for any node. 42 DELETED_NODE, 43 44 // EntryToken - This is the marker used to indicate the start of the region. 45 EntryToken, 46 47 // TokenFactor - This node takes multiple tokens as input and produces a 48 // single token result. This is used to represent the fact that the operand 49 // operators are independent of each other. 50 TokenFactor, 51 52 // AssertSext, AssertZext - These nodes record if a register contains a 53 // value that has already been zero or sign extended from a narrower type. 54 // These nodes take two operands. The first is the node that has already 55 // been extended, and the second is a value type node indicating the width 56 // of the extension 57 AssertSext, AssertZext, 58 59 // Various leaf nodes. 60 BasicBlock, VALUETYPE, CONDCODE, Register, 61 Constant, ConstantFP, 62 GlobalAddress, GlobalTLSAddress, FrameIndex, 63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress, 64 65 // The address of the GOT 66 GLOBAL_OFFSET_TABLE, 67 68 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and 69 // llvm.returnaddress on the DAG. These nodes take one operand, the index 70 // of the frame or return address to return. An index of zero corresponds 71 // to the current function's frame or return address, an index of one to the 72 // parent's frame or return address, and so on. 73 FRAMEADDR, RETURNADDR, 74 75 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to 76 // first (possible) on-stack argument. This is needed for correct stack 77 // adjustment during unwind. 78 FRAME_TO_ARGS_OFFSET, 79 80 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the 81 // address of the exception block on entry to an landing pad block. 82 EXCEPTIONADDR, 83 84 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the 85 // address of the Language Specific Data Area for the enclosing function. 86 LSDAADDR, 87 88 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents 89 // the selection index of the exception thrown. 90 EHSELECTION, 91 92 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 93 // 'eh_return' gcc dwarf builtin, which is used to return from 94 // exception. The general meaning is: adjust stack by OFFSET and pass 95 // execution to HANDLER. Many platform-related details also :) 96 EH_RETURN, 97 98 // TargetConstant* - Like Constant*, but the DAG does not do any folding, 99 // simplification, or lowering of the constant. They are used for constants 100 // which are known to fit in the immediate fields of their users, or for 101 // carrying magic numbers which are not values which need to be materialized 102 // in registers. 103 TargetConstant, 104 TargetConstantFP, 105 106 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or 107 // anything else with this node, and this is valid in the target-specific 108 // dag, turning into a GlobalAddress operand. 109 TargetGlobalAddress, 110 TargetGlobalTLSAddress, 111 TargetFrameIndex, 112 TargetJumpTable, 113 TargetConstantPool, 114 TargetExternalSymbol, 115 TargetBlockAddress, 116 117 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) 118 /// This node represents a target intrinsic function with no side effects. 119 /// The first operand is the ID number of the intrinsic from the 120 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The 121 /// node has returns the result of the intrinsic. 122 INTRINSIC_WO_CHAIN, 123 124 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) 125 /// This node represents a target intrinsic function with side effects that 126 /// returns a result. The first operand is a chain pointer. The second is 127 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The 128 /// operands to the intrinsic follow. The node has two results, the result 129 /// of the intrinsic and an output chain. 130 INTRINSIC_W_CHAIN, 131 132 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) 133 /// This node represents a target intrinsic function with side effects that 134 /// does not return a result. The first operand is a chain pointer. The 135 /// second is the ID number of the intrinsic from the llvm::Intrinsic 136 /// namespace. The operands to the intrinsic follow. 137 INTRINSIC_VOID, 138 139 // CopyToReg - This node has three operands: a chain, a register number to 140 // set to this value, and a value. 141 CopyToReg, 142 143 // CopyFromReg - This node indicates that the input value is a virtual or 144 // physical register that is defined outside of the scope of this 145 // SelectionDAG. The register is available from the RegisterSDNode object. 146 CopyFromReg, 147 148 // UNDEF - An undefined node 149 UNDEF, 150 151 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by 152 // a Constant, which is required to be operand #1) half of the integer or 153 // float value specified as operand #0. This is only for use before 154 // legalization, for values that will be broken into multiple registers. 155 EXTRACT_ELEMENT, 156 157 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given 158 // two values of the same integer value type, this produces a value twice as 159 // big. Like EXTRACT_ELEMENT, this can only be used before legalization. 160 BUILD_PAIR, 161 162 // MERGE_VALUES - This node takes multiple discrete operands and returns 163 // them all as its individual results. This nodes has exactly the same 164 // number of inputs and outputs. This node is useful for some pieces of the 165 // code generator that want to think about a single node with multiple 166 // results, not multiple nodes. 167 MERGE_VALUES, 168 169 // Simple integer binary arithmetic operators. 170 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, 171 172 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 173 // a signed/unsigned value of type i[2*N], and return the full value as 174 // two results, each of type iN. 175 SMUL_LOHI, UMUL_LOHI, 176 177 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 178 // remainder result. 179 SDIVREM, UDIVREM, 180 181 // CARRY_FALSE - This node is used when folding other nodes, 182 // like ADDC/SUBC, which indicate the carry result is always false. 183 CARRY_FALSE, 184 185 // Carry-setting nodes for multiple precision addition and subtraction. 186 // These nodes take two operands of the same value type, and produce two 187 // results. The first result is the normal add or sub result, the second 188 // result is the carry flag result. 189 ADDC, SUBC, 190 191 // Carry-using nodes for multiple precision addition and subtraction. These 192 // nodes take three operands: The first two are the normal lhs and rhs to 193 // the add or sub, and the third is the input carry flag. These nodes 194 // produce two results; the normal result of the add or sub, and the output 195 // carry flag. These nodes both read and write a carry flag to allow them 196 // to them to be chained together for add and sub of arbitrarily large 197 // values. 198 ADDE, SUBE, 199 200 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. 201 // These nodes take two operands: the normal LHS and RHS to the add. They 202 // produce two results: the normal result of the add, and a boolean that 203 // indicates if an overflow occured (*not* a flag, because it may be stored 204 // to memory, etc.). If the type of the boolean is not i1 then the high 205 // bits conform to getBooleanContents. 206 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics. 207 SADDO, UADDO, 208 209 // Same for subtraction 210 SSUBO, USUBO, 211 212 // Same for multiplication 213 SMULO, UMULO, 214 215 // Simple binary floating point operators. 216 FADD, FSUB, FMUL, FDIV, FREM, 217 218 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This 219 // DAG node does not require that X and Y have the same type, just that they 220 // are both floating point. X and the result must have the same type. 221 // FCOPYSIGN(f32, f64) is allowed. 222 FCOPYSIGN, 223 224 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point 225 // value as an integer 0/1 value. 226 FGETSIGN, 227 228 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the 229 /// specified, possibly variable, elements. The number of elements is 230 /// required to be a power of two. The types of the operands must all be 231 /// the same and must match the vector element type, except that integer 232 /// types are allowed to be larger than the element type, in which case 233 /// the operands are implicitly truncated. 234 BUILD_VECTOR, 235 236 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element 237 /// at IDX replaced with VAL. If the type of VAL is larger than the vector 238 /// element type then VAL is truncated before replacement. 239 INSERT_VECTOR_ELT, 240 241 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR 242 /// identified by the (potentially variable) element number IDX. If the 243 /// return type is an integer type larger than the element type of the 244 /// vector, the result is extended to the width of the return type. 245 EXTRACT_VECTOR_ELT, 246 247 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of 248 /// vector type with the same length and element type, this produces a 249 /// concatenated vector result value, with length equal to the sum of the 250 /// lengths of the input vectors. 251 CONCAT_VECTORS, 252 253 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an 254 /// vector value) starting with the (potentially variable) element number 255 /// IDX, which must be a multiple of the result vector length. 256 EXTRACT_SUBVECTOR, 257 258 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 259 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int 260 /// values that indicate which value (or undef) each result element will 261 /// get. These constant ints are accessible through the 262 /// ShuffleVectorSDNode class. This is quite similar to the Altivec 263 /// 'vperm' instruction, except that the indices must be constants and are 264 /// in terms of the element size of VEC1/VEC2, not in terms of bytes. 265 VECTOR_SHUFFLE, 266 267 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 268 /// scalar value into element 0 of the resultant vector type. The top 269 /// elements 1 to N-1 of the N-element vector are undefined. The type 270 /// of the operand must match the vector element type, except when they 271 /// are integer types. In this case the operand is allowed to be wider 272 /// than the vector element type, and is implicitly truncated to it. 273 SCALAR_TO_VECTOR, 274 275 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing 276 // an unsigned/signed value of type i[2*N], then return the top part. 277 MULHU, MULHS, 278 279 // Bitwise operators - logical and, logical or, logical xor, shift left, 280 // shift right algebraic (shift in sign bits), shift right logical (shift in 281 // zeroes), rotate left, rotate right, and byteswap. 282 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP, 283 284 // Counting operators 285 CTTZ, CTLZ, CTPOP, 286 287 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not 288 // i1 then the high bits must conform to getBooleanContents. 289 SELECT, 290 291 // Select with condition operator - This selects between a true value and 292 // a false value (ops #2 and #3) based on the boolean result of comparing 293 // the lhs and rhs (ops #0 and #1) of a conditional expression with the 294 // condition code in op #4, a CondCodeSDNode. 295 SELECT_CC, 296 297 // SetCC operator - This evaluates to a true value iff the condition is 298 // true. If the result value type is not i1 then the high bits conform 299 // to getBooleanContents. The operands to this are the left and right 300 // operands to compare (ops #0, and #1) and the condition code to compare 301 // them with (op #2) as a CondCodeSDNode. 302 SETCC, 303 304 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of 305 // integer elements with all bits of the result elements set to true if the 306 // comparison is true or all cleared if the comparison is false. The 307 // operands to this are the left and right operands to compare (LHS/RHS) and 308 // the condition code to compare them with (COND) as a CondCodeSDNode. 309 VSETCC, 310 311 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 312 // integer shift operations, just like ADD/SUB_PARTS. The operation 313 // ordering is: 314 // [Lo,Hi] = op [LoLHS,HiLHS], Amt 315 SHL_PARTS, SRA_PARTS, SRL_PARTS, 316 317 // Conversion operators. These are all single input single output 318 // operations. For all of these, the result type must be strictly 319 // wider or narrower (depending on the operation) than the source 320 // type. 321 322 // SIGN_EXTEND - Used for integer types, replicating the sign bit 323 // into new bits. 324 SIGN_EXTEND, 325 326 // ZERO_EXTEND - Used for integer types, zeroing the new bits. 327 ZERO_EXTEND, 328 329 // ANY_EXTEND - Used for integer types. The high bits are undefined. 330 ANY_EXTEND, 331 332 // TRUNCATE - Completely drop the high bits. 333 TRUNCATE, 334 335 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign 336 // depends on the first letter) to floating point. 337 SINT_TO_FP, 338 UINT_TO_FP, 339 340 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to 341 // sign extend a small value in a large integer register (e.g. sign 342 // extending the low 8 bits of a 32-bit register to fill the top 24 bits 343 // with the 7th bit). The size of the smaller type is indicated by the 1th 344 // operand, a ValueType node. 345 SIGN_EXTEND_INREG, 346 347 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned 348 /// integer. 349 FP_TO_SINT, 350 FP_TO_UINT, 351 352 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 353 /// down to the precision of the destination VT. TRUNC is a flag, which is 354 /// always an integer that is zero or one. If TRUNC is 0, this is a 355 /// normal rounding, if it is 1, this FP_ROUND is known to not change the 356 /// value of Y. 357 /// 358 /// The TRUNC = 1 case is used in cases where we know that the value will 359 /// not be modified by the node, because Y is not using any of the extra 360 /// precision of source type. This allows certain transformations like 361 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 362 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 363 FP_ROUND, 364 365 // FLT_ROUNDS_ - Returns current rounding mode: 366 // -1 Undefined 367 // 0 Round to 0 368 // 1 Round to nearest 369 // 2 Round to +inf 370 // 3 Round to -inf 371 FLT_ROUNDS_, 372 373 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and 374 /// rounds it to a floating point value. It then promotes it and returns it 375 /// in a register of the same size. This operation effectively just 376 /// discards excess precision. The type to round down to is specified by 377 /// the VT operand, a VTSDNode. 378 FP_ROUND_INREG, 379 380 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. 381 FP_EXTEND, 382 383 // BIT_CONVERT - This operator converts between integer, vector and FP 384 // values, as if the value was stored to memory with one type and loaded 385 // from the same address with the other type (or equivalently for vector 386 // format conversions, etc). The source and result are required to have 387 // the same bit size (e.g. f32 <-> i32). This can also be used for 388 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by 389 // getNode(). 390 BIT_CONVERT, 391 392 // CONVERT_RNDSAT - This operator is used to support various conversions 393 // between various types (float, signed, unsigned and vectors of those 394 // types) with rounding and saturation. NOTE: Avoid using this operator as 395 // most target don't support it and the operator might be removed in the 396 // future. It takes the following arguments: 397 // 0) value 398 // 1) dest type (type to convert to) 399 // 2) src type (type to convert from) 400 // 3) rounding imm 401 // 4) saturation imm 402 // 5) ISD::CvtCode indicating the type of conversion to do 403 CONVERT_RNDSAT, 404 405 // FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform 406 // promotions and truncation for half-precision (16 bit) floating 407 // numbers. We need special nodes since FP16 is a storage-only type with 408 // special semantics of operations. 409 FP16_TO_FP32, FP32_TO_FP16, 410 411 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 412 // FLOG, FLOG2, FLOG10, FEXP, FEXP2, 413 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating 414 // point operations. These are inspired by libm. 415 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 416 FLOG, FLOG2, FLOG10, FEXP, FEXP2, 417 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, 418 419 // LOAD and STORE have token chains as their first operand, then the same 420 // operands as an LLVM load/store instruction, then an offset node that 421 // is added / subtracted from the base pointer to form the address (for 422 // indexed memory ops). 423 LOAD, STORE, 424 425 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned 426 // to a specified boundary. This node always has two return values: a new 427 // stack pointer value and a chain. The first operand is the token chain, 428 // the second is the number of bytes to allocate, and the third is the 429 // alignment boundary. The size is guaranteed to be a multiple of the stack 430 // alignment, and the alignment is guaranteed to be bigger than the stack 431 // alignment (if required) or 0 to get standard stack alignment. 432 DYNAMIC_STACKALLOC, 433 434 // Control flow instructions. These all have token chains. 435 436 // BR - Unconditional branch. The first operand is the chain 437 // operand, the second is the MBB to branch to. 438 BR, 439 440 // BRIND - Indirect branch. The first operand is the chain, the second 441 // is the value to branch to, which must be of the same type as the target's 442 // pointer type. 443 BRIND, 444 445 // BR_JT - Jumptable branch. The first operand is the chain, the second 446 // is the jumptable index, the last one is the jumptable entry index. 447 BR_JT, 448 449 // BRCOND - Conditional branch. The first operand is the chain, the 450 // second is the condition, the third is the block to branch to if the 451 // condition is true. If the type of the condition is not i1, then the 452 // high bits must conform to getBooleanContents. 453 BRCOND, 454 455 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 456 // that the condition is represented as condition code, and two nodes to 457 // compare, rather than as a combined SetCC node. The operands in order are 458 // chain, cc, lhs, rhs, block to branch to if condition is true. 459 BR_CC, 460 461 // INLINEASM - Represents an inline asm block. This node always has two 462 // return values: a chain and a flag result. The inputs are as follows: 463 // Operand #0 : Input chain. 464 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. 465 // Operand #2 : a MDNodeSDNode with the !srcloc metadata. 466 // After this, it is followed by a list of operands with this format: 467 // ConstantSDNode: Flags that encode whether it is a mem or not, the 468 // of operands that follow, etc. See InlineAsm.h. 469 // ... however many operands ... 470 // Operand #last: Optional, an incoming flag. 471 // 472 // The variable width operands are required to represent target addressing 473 // modes as a single "operand", even though they may have multiple 474 // SDOperands. 475 INLINEASM, 476 477 // EH_LABEL - Represents a label in mid basic block used to track 478 // locations needed for debug and exception handling tables. These nodes 479 // take a chain as input and return a chain. 480 EH_LABEL, 481 482 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a 483 // value, the same type as the pointer type for the system, and an output 484 // chain. 485 STACKSAVE, 486 487 // STACKRESTORE has two operands, an input chain and a pointer to restore to 488 // it returns an output chain. 489 STACKRESTORE, 490 491 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of 492 // a call sequence, and carry arbitrary information that target might want 493 // to know. The first operand is a chain, the rest are specified by the 494 // target and not touched by the DAG optimizers. 495 // CALLSEQ_START..CALLSEQ_END pairs may not be nested. 496 CALLSEQ_START, // Beginning of a call sequence 497 CALLSEQ_END, // End of a call sequence 498 499 // VAARG - VAARG has three operands: an input chain, a pointer, and a 500 // SRCVALUE. It returns a pair of values: the vaarg value and a new chain. 501 VAARG, 502 503 // VACOPY - VACOPY has five operands: an input chain, a destination pointer, 504 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the 505 // source. 506 VACOPY, 507 508 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a 509 // pointer, and a SRCVALUE. 510 VAEND, VASTART, 511 512 // SRCVALUE - This is a node type that holds a Value* that is used to 513 // make reference to a value in the LLVM IR. 514 SRCVALUE, 515 516 // MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to 517 // reference metadata in the IR. 518 MDNODE_SDNODE, 519 520 // PCMARKER - This corresponds to the pcmarker intrinsic. 521 PCMARKER, 522 523 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. 524 // The only operand is a chain and a value and a chain are produced. The 525 // value is the contents of the architecture specific cycle counter like 526 // register (or other high accuracy low latency clock source) 527 READCYCLECOUNTER, 528 529 // HANDLENODE node - Used as a handle for various purposes. 530 HANDLENODE, 531 532 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic. 533 // It takes as input a token chain, the pointer to the trampoline, 534 // the pointer to the nested function, the pointer to pass for the 535 // 'nest' parameter, a SRCVALUE for the trampoline and another for 536 // the nested function (allowing targets to access the original 537 // Function*). It produces the result of the intrinsic and a token 538 // chain as output. 539 TRAMPOLINE, 540 541 // TRAP - Trapping instruction 542 TRAP, 543 544 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are 545 // their first operand. The other operands are the address to prefetch, 546 // read / write specifier, and locality specifier. 547 PREFETCH, 548 549 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load, 550 // store-store, device) 551 // This corresponds to the memory.barrier intrinsic. 552 // it takes an input chain, 4 operands to specify the type of barrier, an 553 // operand specifying if the barrier applies to device and uncached memory 554 // and produces an output chain. 555 MEMBARRIER, 556 557 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) 558 // this corresponds to the atomic.lcs intrinsic. 559 // cmp is compared to *ptr, and if equal, swap is stored in *ptr. 560 // the return is always the original value in *ptr 561 ATOMIC_CMP_SWAP, 562 563 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) 564 // this corresponds to the atomic.swap intrinsic. 565 // amt is stored to *ptr atomically. 566 // the return is always the original value in *ptr 567 ATOMIC_SWAP, 568 569 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) 570 // this corresponds to the atomic.load.[OpName] intrinsic. 571 // op(*ptr, amt) is stored to *ptr atomically. 572 // the return is always the original value in *ptr 573 ATOMIC_LOAD_ADD, 574 ATOMIC_LOAD_SUB, 575 ATOMIC_LOAD_AND, 576 ATOMIC_LOAD_OR, 577 ATOMIC_LOAD_XOR, 578 ATOMIC_LOAD_NAND, 579 ATOMIC_LOAD_MIN, 580 ATOMIC_LOAD_MAX, 581 ATOMIC_LOAD_UMIN, 582 ATOMIC_LOAD_UMAX, 583 584 /// BUILTIN_OP_END - This must be the last enum value in this list. 585 /// The target-specific pre-isel opcode values start here. 586 BUILTIN_OP_END 587 }; 588 589 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations 590 /// which do not reference a specific memory location should be less than 591 /// this value. Those that do must not be less than this value, and can 592 /// be used with SelectionDAG::getMemIntrinsicNode. 593 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+100; 594 595 //===--------------------------------------------------------------------===// 596 /// MemIndexedMode enum - This enum defines the load / store indexed 597 /// addressing modes. 598 /// 599 /// UNINDEXED "Normal" load / store. The effective address is already 600 /// computed and is available in the base pointer. The offset 601 /// operand is always undefined. In addition to producing a 602 /// chain, an unindexed load produces one value (result of the 603 /// load); an unindexed store does not produce a value. 604 /// 605 /// PRE_INC Similar to the unindexed mode where the effective address is 606 /// PRE_DEC the value of the base pointer add / subtract the offset. 607 /// It considers the computation as being folded into the load / 608 /// store operation (i.e. the load / store does the address 609 /// computation as well as performing the memory transaction). 610 /// The base operand is always undefined. In addition to 611 /// producing a chain, pre-indexed load produces two values 612 /// (result of the load and the result of the address 613 /// computation); a pre-indexed store produces one value (result 614 /// of the address computation). 615 /// 616 /// POST_INC The effective address is the value of the base pointer. The 617 /// POST_DEC value of the offset operand is then added to / subtracted 618 /// from the base after memory transaction. In addition to 619 /// producing a chain, post-indexed load produces two values 620 /// (the result of the load and the result of the base +/- offset 621 /// computation); a post-indexed store produces one value (the 622 /// the result of the base +/- offset computation). 623 /// 624 enum MemIndexedMode { 625 UNINDEXED = 0, 626 PRE_INC, 627 PRE_DEC, 628 POST_INC, 629 POST_DEC, 630 LAST_INDEXED_MODE 631 }; 632 633 //===--------------------------------------------------------------------===// 634 /// LoadExtType enum - This enum defines the three variants of LOADEXT 635 /// (load with extension). 636 /// 637 /// SEXTLOAD loads the integer operand and sign extends it to a larger 638 /// integer result type. 639 /// ZEXTLOAD loads the integer operand and zero extends it to a larger 640 /// integer result type. 641 /// EXTLOAD is used for three things: floating point extending loads, 642 /// integer extending loads [the top bits are undefined], and vector 643 /// extending loads [load into low elt]. 644 /// 645 enum LoadExtType { 646 NON_EXTLOAD = 0, 647 EXTLOAD, 648 SEXTLOAD, 649 ZEXTLOAD, 650 LAST_LOADEXT_TYPE 651 }; 652 653 //===--------------------------------------------------------------------===// 654 /// ISD::CondCode enum - These are ordered carefully to make the bitfields 655 /// below work out, when considering SETFALSE (something that never exists 656 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 657 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 658 /// to. If the "N" column is 1, the result of the comparison is undefined if 659 /// the input is a NAN. 660 /// 661 /// All of these (except for the 'always folded ops') should be handled for 662 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 663 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 664 /// 665 /// Note that these are laid out in a specific order to allow bit-twiddling 666 /// to transform conditions. 667 enum CondCode { 668 // Opcode N U L G E Intuitive operation 669 SETFALSE, // 0 0 0 0 Always false (always folded) 670 SETOEQ, // 0 0 0 1 True if ordered and equal 671 SETOGT, // 0 0 1 0 True if ordered and greater than 672 SETOGE, // 0 0 1 1 True if ordered and greater than or equal 673 SETOLT, // 0 1 0 0 True if ordered and less than 674 SETOLE, // 0 1 0 1 True if ordered and less than or equal 675 SETONE, // 0 1 1 0 True if ordered and operands are unequal 676 SETO, // 0 1 1 1 True if ordered (no nans) 677 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 678 SETUEQ, // 1 0 0 1 True if unordered or equal 679 SETUGT, // 1 0 1 0 True if unordered or greater than 680 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 681 SETULT, // 1 1 0 0 True if unordered or less than 682 SETULE, // 1 1 0 1 True if unordered, less than, or equal 683 SETUNE, // 1 1 1 0 True if unordered or not equal 684 SETTRUE, // 1 1 1 1 Always true (always folded) 685 // Don't care operations: undefined if the input is a nan. 686 SETFALSE2, // 1 X 0 0 0 Always false (always folded) 687 SETEQ, // 1 X 0 0 1 True if equal 688 SETGT, // 1 X 0 1 0 True if greater than 689 SETGE, // 1 X 0 1 1 True if greater than or equal 690 SETLT, // 1 X 1 0 0 True if less than 691 SETLE, // 1 X 1 0 1 True if less than or equal 692 SETNE, // 1 X 1 1 0 True if not equal 693 SETTRUE2, // 1 X 1 1 1 Always true (always folded) 694 695 SETCC_INVALID // Marker value. 696 }; 697 698 /// isSignedIntSetCC - Return true if this is a setcc instruction that 699 /// performs a signed comparison when used with integer operands. 700 inline bool isSignedIntSetCC(CondCode Code) { 701 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 702 } 703 704 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 705 /// performs an unsigned comparison when used with integer operands. 706 inline bool isUnsignedIntSetCC(CondCode Code) { 707 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 708 } 709 710 /// isTrueWhenEqual - Return true if the specified condition returns true if 711 /// the two operands to the condition are equal. Note that if one of the two 712 /// operands is a NaN, this value is meaningless. 713 inline bool isTrueWhenEqual(CondCode Cond) { 714 return ((int)Cond & 1) != 0; 715 } 716 717 /// getUnorderedFlavor - This function returns 0 if the condition is always 718 /// false if an operand is a NaN, 1 if the condition is always true if the 719 /// operand is a NaN, and 2 if the condition is undefined if the operand is a 720 /// NaN. 721 inline unsigned getUnorderedFlavor(CondCode Cond) { 722 return ((int)Cond >> 3) & 3; 723 } 724 725 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 726 /// 'op' is a valid SetCC operation. 727 CondCode getSetCCInverse(CondCode Operation, bool isInteger); 728 729 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 730 /// when given the operation for (X op Y). 731 CondCode getSetCCSwappedOperands(CondCode Operation); 732 733 /// getSetCCOrOperation - Return the result of a logical OR between different 734 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 735 /// function returns SETCC_INVALID if it is not possible to represent the 736 /// resultant comparison. 737 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 738 739 /// getSetCCAndOperation - Return the result of a logical AND between 740 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 741 /// function returns SETCC_INVALID if it is not possible to represent the 742 /// resultant comparison. 743 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 744 745 //===--------------------------------------------------------------------===// 746 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 747 /// supports. 748 enum CvtCode { 749 CVT_FF, // Float from Float 750 CVT_FS, // Float from Signed 751 CVT_FU, // Float from Unsigned 752 CVT_SF, // Signed from Float 753 CVT_UF, // Unsigned from Float 754 CVT_SS, // Signed from Signed 755 CVT_SU, // Signed from Unsigned 756 CVT_US, // Unsigned from Signed 757 CVT_UU, // Unsigned from Unsigned 758 CVT_INVALID // Marker - Invalid opcode 759 }; 760 761} // end llvm::ISD namespace 762 763} // end llvm namespace 764 765#endif 766