ISDOpcodes.h revision 288943
1//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares codegen opcodes and related utilities. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_CODEGEN_ISDOPCODES_H 15#define LLVM_CODEGEN_ISDOPCODES_H 16 17namespace llvm { 18 19/// ISD namespace - This namespace contains an enum which represents all of the 20/// SelectionDAG node types and value types. 21/// 22namespace ISD { 23 24 //===--------------------------------------------------------------------===// 25 /// ISD::NodeType enum - This enum defines the target-independent operators 26 /// for a SelectionDAG. 27 /// 28 /// Targets may also define target-dependent operator codes for SDNodes. For 29 /// example, on x86, these are the enum values in the X86ISD namespace. 30 /// Targets should aim to use target-independent operators to model their 31 /// instruction sets as much as possible, and only use target-dependent 32 /// operators when they have special requirements. 33 /// 34 /// Finally, during and after selection proper, SNodes may use special 35 /// operator codes that correspond directly with MachineInstr opcodes. These 36 /// are used to represent selected instructions. See the isMachineOpcode() 37 /// and getMachineOpcode() member functions of SDNode. 38 /// 39 enum NodeType { 40 /// DELETED_NODE - This is an illegal value that is used to catch 41 /// errors. This opcode is not a legal opcode for any node. 42 DELETED_NODE, 43 44 /// EntryToken - This is the marker used to indicate the start of a region. 45 EntryToken, 46 47 /// TokenFactor - This node takes multiple tokens as input and produces a 48 /// single token result. This is used to represent the fact that the operand 49 /// operators are independent of each other. 50 TokenFactor, 51 52 /// AssertSext, AssertZext - These nodes record if a register contains a 53 /// value that has already been zero or sign extended from a narrower type. 54 /// These nodes take two operands. The first is the node that has already 55 /// been extended, and the second is a value type node indicating the width 56 /// of the extension 57 AssertSext, AssertZext, 58 59 /// Various leaf nodes. 60 BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, 61 Constant, ConstantFP, 62 GlobalAddress, GlobalTLSAddress, FrameIndex, 63 JumpTable, ConstantPool, ExternalSymbol, BlockAddress, 64 65 /// The address of the GOT 66 GLOBAL_OFFSET_TABLE, 67 68 /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and 69 /// llvm.returnaddress on the DAG. These nodes take one operand, the index 70 /// of the frame or return address to return. An index of zero corresponds 71 /// to the current function's frame or return address, an index of one to 72 /// the parent's frame or return address, and so on. 73 FRAMEADDR, RETURNADDR, 74 75 /// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic. 76 /// Materializes the offset from the local object pointer of another 77 /// function to a particular local object passed to llvm.localescape. The 78 /// operand is the MCSymbol label used to represent this offset, since 79 /// typically the offset is not known until after code generation of the 80 /// parent. 81 LOCAL_RECOVER, 82 83 /// READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on 84 /// the DAG, which implements the named register global variables extension. 85 READ_REGISTER, 86 WRITE_REGISTER, 87 88 /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to 89 /// first (possible) on-stack argument. This is needed for correct stack 90 /// adjustment during unwind. 91 FRAME_TO_ARGS_OFFSET, 92 93 /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 94 /// 'eh_return' gcc dwarf builtin, which is used to return from 95 /// exception. The general meaning is: adjust stack by OFFSET and pass 96 /// execution to HANDLER. Many platform-related details also :) 97 EH_RETURN, 98 99 /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) 100 /// This corresponds to the eh.sjlj.setjmp intrinsic. 101 /// It takes an input chain and a pointer to the jump buffer as inputs 102 /// and returns an outchain. 103 EH_SJLJ_SETJMP, 104 105 /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) 106 /// This corresponds to the eh.sjlj.longjmp intrinsic. 107 /// It takes an input chain and a pointer to the jump buffer as inputs 108 /// and returns an outchain. 109 EH_SJLJ_LONGJMP, 110 111 /// TargetConstant* - Like Constant*, but the DAG does not do any folding, 112 /// simplification, or lowering of the constant. They are used for constants 113 /// which are known to fit in the immediate fields of their users, or for 114 /// carrying magic numbers which are not values which need to be 115 /// materialized in registers. 116 TargetConstant, 117 TargetConstantFP, 118 119 /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or 120 /// anything else with this node, and this is valid in the target-specific 121 /// dag, turning into a GlobalAddress operand. 122 TargetGlobalAddress, 123 TargetGlobalTLSAddress, 124 TargetFrameIndex, 125 TargetJumpTable, 126 TargetConstantPool, 127 TargetExternalSymbol, 128 TargetBlockAddress, 129 130 MCSymbol, 131 132 /// TargetIndex - Like a constant pool entry, but with completely 133 /// target-dependent semantics. Holds target flags, a 32-bit index, and a 134 /// 64-bit index. Targets can use this however they like. 135 TargetIndex, 136 137 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) 138 /// This node represents a target intrinsic function with no side effects. 139 /// The first operand is the ID number of the intrinsic from the 140 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The 141 /// node returns the result of the intrinsic. 142 INTRINSIC_WO_CHAIN, 143 144 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) 145 /// This node represents a target intrinsic function with side effects that 146 /// returns a result. The first operand is a chain pointer. The second is 147 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The 148 /// operands to the intrinsic follow. The node has two results, the result 149 /// of the intrinsic and an output chain. 150 INTRINSIC_W_CHAIN, 151 152 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) 153 /// This node represents a target intrinsic function with side effects that 154 /// does not return a result. The first operand is a chain pointer. The 155 /// second is the ID number of the intrinsic from the llvm::Intrinsic 156 /// namespace. The operands to the intrinsic follow. 157 INTRINSIC_VOID, 158 159 /// CopyToReg - This node has three operands: a chain, a register number to 160 /// set to this value, and a value. 161 CopyToReg, 162 163 /// CopyFromReg - This node indicates that the input value is a virtual or 164 /// physical register that is defined outside of the scope of this 165 /// SelectionDAG. The register is available from the RegisterSDNode object. 166 CopyFromReg, 167 168 /// UNDEF - An undefined node. 169 UNDEF, 170 171 /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by 172 /// a Constant, which is required to be operand #1) half of the integer or 173 /// float value specified as operand #0. This is only for use before 174 /// legalization, for values that will be broken into multiple registers. 175 EXTRACT_ELEMENT, 176 177 /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. 178 /// Given two values of the same integer value type, this produces a value 179 /// twice as big. Like EXTRACT_ELEMENT, this can only be used before 180 /// legalization. 181 BUILD_PAIR, 182 183 /// MERGE_VALUES - This node takes multiple discrete operands and returns 184 /// them all as its individual results. This nodes has exactly the same 185 /// number of inputs and outputs. This node is useful for some pieces of the 186 /// code generator that want to think about a single node with multiple 187 /// results, not multiple nodes. 188 MERGE_VALUES, 189 190 /// Simple integer binary arithmetic operators. 191 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, 192 193 /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 194 /// a signed/unsigned value of type i[2*N], and return the full value as 195 /// two results, each of type iN. 196 SMUL_LOHI, UMUL_LOHI, 197 198 /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 199 /// remainder result. 200 SDIVREM, UDIVREM, 201 202 /// CARRY_FALSE - This node is used when folding other nodes, 203 /// like ADDC/SUBC, which indicate the carry result is always false. 204 CARRY_FALSE, 205 206 /// Carry-setting nodes for multiple precision addition and subtraction. 207 /// These nodes take two operands of the same value type, and produce two 208 /// results. The first result is the normal add or sub result, the second 209 /// result is the carry flag result. 210 ADDC, SUBC, 211 212 /// Carry-using nodes for multiple precision addition and subtraction. These 213 /// nodes take three operands: The first two are the normal lhs and rhs to 214 /// the add or sub, and the third is the input carry flag. These nodes 215 /// produce two results; the normal result of the add or sub, and the output 216 /// carry flag. These nodes both read and write a carry flag to allow them 217 /// to them to be chained together for add and sub of arbitrarily large 218 /// values. 219 ADDE, SUBE, 220 221 /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. 222 /// These nodes take two operands: the normal LHS and RHS to the add. They 223 /// produce two results: the normal result of the add, and a boolean that 224 /// indicates if an overflow occurred (*not* a flag, because it may be store 225 /// to memory, etc.). If the type of the boolean is not i1 then the high 226 /// bits conform to getBooleanContents. 227 /// These nodes are generated from llvm.[su]add.with.overflow intrinsics. 228 SADDO, UADDO, 229 230 /// Same for subtraction. 231 SSUBO, USUBO, 232 233 /// Same for multiplication. 234 SMULO, UMULO, 235 236 /// Simple binary floating point operators. 237 FADD, FSUB, FMUL, FDIV, FREM, 238 239 /// FMA - Perform a * b + c with no intermediate rounding step. 240 FMA, 241 242 /// FMAD - Perform a * b + c, while getting the same result as the 243 /// separately rounded operations. 244 FMAD, 245 246 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This 247 /// DAG node does not require that X and Y have the same type, just that 248 /// they are both floating point. X and the result must have the same type. 249 /// FCOPYSIGN(f32, f64) is allowed. 250 FCOPYSIGN, 251 252 /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point 253 /// value as an integer 0/1 value. 254 FGETSIGN, 255 256 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the 257 /// specified, possibly variable, elements. The number of elements is 258 /// required to be a power of two. The types of the operands must all be 259 /// the same and must match the vector element type, except that integer 260 /// types are allowed to be larger than the element type, in which case 261 /// the operands are implicitly truncated. 262 BUILD_VECTOR, 263 264 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element 265 /// at IDX replaced with VAL. If the type of VAL is larger than the vector 266 /// element type then VAL is truncated before replacement. 267 INSERT_VECTOR_ELT, 268 269 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR 270 /// identified by the (potentially variable) element number IDX. If the 271 /// return type is an integer type larger than the element type of the 272 /// vector, the result is extended to the width of the return type. 273 EXTRACT_VECTOR_ELT, 274 275 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of 276 /// vector type with the same length and element type, this produces a 277 /// concatenated vector result value, with length equal to the sum of the 278 /// lengths of the input vectors. 279 CONCAT_VECTORS, 280 281 /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector 282 /// with VECTOR2 inserted into VECTOR1 at the (potentially 283 /// variable) element number IDX, which must be a multiple of the 284 /// VECTOR2 vector length. The elements of VECTOR1 starting at 285 /// IDX are overwritten with VECTOR2. Elements IDX through 286 /// vector_length(VECTOR2) must be valid VECTOR1 indices. 287 INSERT_SUBVECTOR, 288 289 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an 290 /// vector value) starting with the element number IDX, which must be a 291 /// constant multiple of the result vector length. 292 EXTRACT_SUBVECTOR, 293 294 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 295 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int 296 /// values that indicate which value (or undef) each result element will 297 /// get. These constant ints are accessible through the 298 /// ShuffleVectorSDNode class. This is quite similar to the Altivec 299 /// 'vperm' instruction, except that the indices must be constants and are 300 /// in terms of the element size of VEC1/VEC2, not in terms of bytes. 301 VECTOR_SHUFFLE, 302 303 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 304 /// scalar value into element 0 of the resultant vector type. The top 305 /// elements 1 to N-1 of the N-element vector are undefined. The type 306 /// of the operand must match the vector element type, except when they 307 /// are integer types. In this case the operand is allowed to be wider 308 /// than the vector element type, and is implicitly truncated to it. 309 SCALAR_TO_VECTOR, 310 311 /// MULHU/MULHS - Multiply high - Multiply two integers of type iN, 312 /// producing an unsigned/signed value of type i[2*N], then return the top 313 /// part. 314 MULHU, MULHS, 315 316 /// [US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned 317 /// integers. 318 SMIN, SMAX, UMIN, UMAX, 319 320 /// Bitwise operators - logical and, logical or, logical xor. 321 AND, OR, XOR, 322 323 /// Shift and rotation operations. After legalization, the type of the 324 /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization 325 /// the shift amount can be any type, but care must be taken to ensure it is 326 /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before 327 /// legalization, types like i1024 can occur and i8 doesn't have enough bits 328 /// to represent the shift amount. 329 /// When the 1st operand is a vector, the shift amount must be in the same 330 /// type. (TLI.getShiftAmountTy() will return the same type when the input 331 /// type is a vector.) 332 SHL, SRA, SRL, ROTL, ROTR, 333 334 /// Byte Swap and Counting operators. 335 BSWAP, CTTZ, CTLZ, CTPOP, 336 337 /// Bit counting operators with an undefined result for zero inputs. 338 CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, 339 340 /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not 341 /// i1 then the high bits must conform to getBooleanContents. 342 SELECT, 343 344 /// Select with a vector condition (op #0) and two vector operands (ops #1 345 /// and #2), returning a vector result. All vectors have the same length. 346 /// Much like the scalar select and setcc, each bit in the condition selects 347 /// whether the corresponding result element is taken from op #1 or op #2. 348 /// At first, the VSELECT condition is of vXi1 type. Later, targets may 349 /// change the condition type in order to match the VSELECT node using a 350 /// pattern. The condition follows the BooleanContent format of the target. 351 VSELECT, 352 353 /// Select with condition operator - This selects between a true value and 354 /// a false value (ops #2 and #3) based on the boolean result of comparing 355 /// the lhs and rhs (ops #0 and #1) of a conditional expression with the 356 /// condition code in op #4, a CondCodeSDNode. 357 SELECT_CC, 358 359 /// SetCC operator - This evaluates to a true value iff the condition is 360 /// true. If the result value type is not i1 then the high bits conform 361 /// to getBooleanContents. The operands to this are the left and right 362 /// operands to compare (ops #0, and #1) and the condition code to compare 363 /// them with (op #2) as a CondCodeSDNode. If the operands are vector types 364 /// then the result type must also be a vector type. 365 SETCC, 366 367 /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 368 /// integer shift operations, just like ADD/SUB_PARTS. The operation 369 /// ordering is: 370 /// [Lo,Hi] = op [LoLHS,HiLHS], Amt 371 SHL_PARTS, SRA_PARTS, SRL_PARTS, 372 373 /// Conversion operators. These are all single input single output 374 /// operations. For all of these, the result type must be strictly 375 /// wider or narrower (depending on the operation) than the source 376 /// type. 377 378 /// SIGN_EXTEND - Used for integer types, replicating the sign bit 379 /// into new bits. 380 SIGN_EXTEND, 381 382 /// ZERO_EXTEND - Used for integer types, zeroing the new bits. 383 ZERO_EXTEND, 384 385 /// ANY_EXTEND - Used for integer types. The high bits are undefined. 386 ANY_EXTEND, 387 388 /// TRUNCATE - Completely drop the high bits. 389 TRUNCATE, 390 391 /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign 392 /// depends on the first letter) to floating point. 393 SINT_TO_FP, 394 UINT_TO_FP, 395 396 /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to 397 /// sign extend a small value in a large integer register (e.g. sign 398 /// extending the low 8 bits of a 32-bit register to fill the top 24 bits 399 /// with the 7th bit). The size of the smaller type is indicated by the 1th 400 /// operand, a ValueType node. 401 SIGN_EXTEND_INREG, 402 403 /// ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an 404 /// in-register any-extension of the low lanes of an integer vector. The 405 /// result type must have fewer elements than the operand type, and those 406 /// elements must be larger integer types such that the total size of the 407 /// operand type and the result type match. Each of the low operand 408 /// elements is any-extended into the corresponding, wider result 409 /// elements with the high bits becoming undef. 410 ANY_EXTEND_VECTOR_INREG, 411 412 /// SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an 413 /// in-register sign-extension of the low lanes of an integer vector. The 414 /// result type must have fewer elements than the operand type, and those 415 /// elements must be larger integer types such that the total size of the 416 /// operand type and the result type match. Each of the low operand 417 /// elements is sign-extended into the corresponding, wider result 418 /// elements. 419 // FIXME: The SIGN_EXTEND_INREG node isn't specifically limited to 420 // scalars, but it also doesn't handle vectors well. Either it should be 421 // restricted to scalars or this node (and its handling) should be merged 422 // into it. 423 SIGN_EXTEND_VECTOR_INREG, 424 425 /// ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an 426 /// in-register zero-extension of the low lanes of an integer vector. The 427 /// result type must have fewer elements than the operand type, and those 428 /// elements must be larger integer types such that the total size of the 429 /// operand type and the result type match. Each of the low operand 430 /// elements is zero-extended into the corresponding, wider result 431 /// elements. 432 ZERO_EXTEND_VECTOR_INREG, 433 434 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned 435 /// integer. 436 FP_TO_SINT, 437 FP_TO_UINT, 438 439 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 440 /// down to the precision of the destination VT. TRUNC is a flag, which is 441 /// always an integer that is zero or one. If TRUNC is 0, this is a 442 /// normal rounding, if it is 1, this FP_ROUND is known to not change the 443 /// value of Y. 444 /// 445 /// The TRUNC = 1 case is used in cases where we know that the value will 446 /// not be modified by the node, because Y is not using any of the extra 447 /// precision of source type. This allows certain transformations like 448 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 449 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 450 FP_ROUND, 451 452 /// FLT_ROUNDS_ - Returns current rounding mode: 453 /// -1 Undefined 454 /// 0 Round to 0 455 /// 1 Round to nearest 456 /// 2 Round to +inf 457 /// 3 Round to -inf 458 FLT_ROUNDS_, 459 460 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and 461 /// rounds it to a floating point value. It then promotes it and returns it 462 /// in a register of the same size. This operation effectively just 463 /// discards excess precision. The type to round down to is specified by 464 /// the VT operand, a VTSDNode. 465 FP_ROUND_INREG, 466 467 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. 468 FP_EXTEND, 469 470 /// BITCAST - This operator converts between integer, vector and FP 471 /// values, as if the value was stored to memory with one type and loaded 472 /// from the same address with the other type (or equivalently for vector 473 /// format conversions, etc). The source and result are required to have 474 /// the same bit size (e.g. f32 <-> i32). This can also be used for 475 /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by 476 /// getNode(). 477 BITCAST, 478 479 /// ADDRSPACECAST - This operator converts between pointers of different 480 /// address spaces. 481 ADDRSPACECAST, 482 483 /// CONVERT_RNDSAT - This operator is used to support various conversions 484 /// between various types (float, signed, unsigned and vectors of those 485 /// types) with rounding and saturation. NOTE: Avoid using this operator as 486 /// most target don't support it and the operator might be removed in the 487 /// future. It takes the following arguments: 488 /// 0) value 489 /// 1) dest type (type to convert to) 490 /// 2) src type (type to convert from) 491 /// 3) rounding imm 492 /// 4) saturation imm 493 /// 5) ISD::CvtCode indicating the type of conversion to do 494 CONVERT_RNDSAT, 495 496 /// FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions 497 /// and truncation for half-precision (16 bit) floating numbers. These nodes 498 /// form a semi-softened interface for dealing with f16 (as an i16), which 499 /// is often a storage-only type but has native conversions. 500 FP16_TO_FP, FP_TO_FP16, 501 502 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 503 /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 504 /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary 505 /// floating point operations. These are inspired by libm. 506 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 507 FLOG, FLOG2, FLOG10, FEXP, FEXP2, 508 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, 509 FMINNUM, FMAXNUM, 510 511 /// FSINCOS - Compute both fsin and fcos as a single operation. 512 FSINCOS, 513 514 /// LOAD and STORE have token chains as their first operand, then the same 515 /// operands as an LLVM load/store instruction, then an offset node that 516 /// is added / subtracted from the base pointer to form the address (for 517 /// indexed memory ops). 518 LOAD, STORE, 519 520 /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned 521 /// to a specified boundary. This node always has two return values: a new 522 /// stack pointer value and a chain. The first operand is the token chain, 523 /// the second is the number of bytes to allocate, and the third is the 524 /// alignment boundary. The size is guaranteed to be a multiple of the 525 /// stack alignment, and the alignment is guaranteed to be bigger than the 526 /// stack alignment (if required) or 0 to get standard stack alignment. 527 DYNAMIC_STACKALLOC, 528 529 /// Control flow instructions. These all have token chains. 530 531 /// BR - Unconditional branch. The first operand is the chain 532 /// operand, the second is the MBB to branch to. 533 BR, 534 535 /// BRIND - Indirect branch. The first operand is the chain, the second 536 /// is the value to branch to, which must be of the same type as the 537 /// target's pointer type. 538 BRIND, 539 540 /// BR_JT - Jumptable branch. The first operand is the chain, the second 541 /// is the jumptable index, the last one is the jumptable entry index. 542 BR_JT, 543 544 /// BRCOND - Conditional branch. The first operand is the chain, the 545 /// second is the condition, the third is the block to branch to if the 546 /// condition is true. If the type of the condition is not i1, then the 547 /// high bits must conform to getBooleanContents. 548 BRCOND, 549 550 /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 551 /// that the condition is represented as condition code, and two nodes to 552 /// compare, rather than as a combined SetCC node. The operands in order 553 /// are chain, cc, lhs, rhs, block to branch to if condition is true. 554 BR_CC, 555 556 /// INLINEASM - Represents an inline asm block. This node always has two 557 /// return values: a chain and a flag result. The inputs are as follows: 558 /// Operand #0 : Input chain. 559 /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. 560 /// Operand #2 : a MDNodeSDNode with the !srcloc metadata. 561 /// Operand #3 : HasSideEffect, IsAlignStack bits. 562 /// After this, it is followed by a list of operands with this format: 563 /// ConstantSDNode: Flags that encode whether it is a mem or not, the 564 /// of operands that follow, etc. See InlineAsm.h. 565 /// ... however many operands ... 566 /// Operand #last: Optional, an incoming flag. 567 /// 568 /// The variable width operands are required to represent target addressing 569 /// modes as a single "operand", even though they may have multiple 570 /// SDOperands. 571 INLINEASM, 572 573 /// EH_LABEL - Represents a label in mid basic block used to track 574 /// locations needed for debug and exception handling tables. These nodes 575 /// take a chain as input and return a chain. 576 EH_LABEL, 577 578 /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a 579 /// value, the same type as the pointer type for the system, and an output 580 /// chain. 581 STACKSAVE, 582 583 /// STACKRESTORE has two operands, an input chain and a pointer to restore 584 /// to it returns an output chain. 585 STACKRESTORE, 586 587 /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end 588 /// of a call sequence, and carry arbitrary information that target might 589 /// want to know. The first operand is a chain, the rest are specified by 590 /// the target and not touched by the DAG optimizers. 591 /// CALLSEQ_START..CALLSEQ_END pairs may not be nested. 592 CALLSEQ_START, // Beginning of a call sequence 593 CALLSEQ_END, // End of a call sequence 594 595 /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 596 /// and the alignment. It returns a pair of values: the vaarg value and a 597 /// new chain. 598 VAARG, 599 600 /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, 601 /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the 602 /// source. 603 VACOPY, 604 605 /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain, 606 /// pointer, and a SRCVALUE. 607 VAEND, VASTART, 608 609 /// SRCVALUE - This is a node type that holds a Value* that is used to 610 /// make reference to a value in the LLVM IR. 611 SRCVALUE, 612 613 /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to 614 /// reference metadata in the IR. 615 MDNODE_SDNODE, 616 617 /// PCMARKER - This corresponds to the pcmarker intrinsic. 618 PCMARKER, 619 620 /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. 621 /// The only operand is a chain and a value and a chain are produced. The 622 /// value is the contents of the architecture specific cycle counter like 623 /// register (or other high accuracy low latency clock source) 624 READCYCLECOUNTER, 625 626 /// HANDLENODE node - Used as a handle for various purposes. 627 HANDLENODE, 628 629 /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It 630 /// takes as input a token chain, the pointer to the trampoline, the pointer 631 /// to the nested function, the pointer to pass for the 'nest' parameter, a 632 /// SRCVALUE for the trampoline and another for the nested function 633 /// (allowing targets to access the original Function*). 634 /// It produces a token chain as output. 635 INIT_TRAMPOLINE, 636 637 /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. 638 /// It takes a pointer to the trampoline and produces a (possibly) new 639 /// pointer to the same trampoline with platform-specific adjustments 640 /// applied. The pointer it returns points to an executable block of code. 641 ADJUST_TRAMPOLINE, 642 643 /// TRAP - Trapping instruction 644 TRAP, 645 646 /// DEBUGTRAP - Trap intended to get the attention of a debugger. 647 DEBUGTRAP, 648 649 /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand 650 /// is the chain. The other operands are the address to prefetch, 651 /// read / write specifier, locality specifier and instruction / data cache 652 /// specifier. 653 PREFETCH, 654 655 /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) 656 /// This corresponds to the fence instruction. It takes an input chain, and 657 /// two integer constants: an AtomicOrdering and a SynchronizationScope. 658 ATOMIC_FENCE, 659 660 /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) 661 /// This corresponds to "load atomic" instruction. 662 ATOMIC_LOAD, 663 664 /// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) 665 /// This corresponds to "store atomic" instruction. 666 ATOMIC_STORE, 667 668 /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) 669 /// For double-word atomic operations: 670 /// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi, 671 /// swapLo, swapHi) 672 /// This corresponds to the cmpxchg instruction. 673 ATOMIC_CMP_SWAP, 674 675 /// Val, Success, OUTCHAIN 676 /// = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) 677 /// N.b. this is still a strong cmpxchg operation, so 678 /// Success == "Val == cmp". 679 ATOMIC_CMP_SWAP_WITH_SUCCESS, 680 681 /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) 682 /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) 683 /// For double-word atomic operations: 684 /// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) 685 /// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) 686 /// These correspond to the atomicrmw instruction. 687 ATOMIC_SWAP, 688 ATOMIC_LOAD_ADD, 689 ATOMIC_LOAD_SUB, 690 ATOMIC_LOAD_AND, 691 ATOMIC_LOAD_OR, 692 ATOMIC_LOAD_XOR, 693 ATOMIC_LOAD_NAND, 694 ATOMIC_LOAD_MIN, 695 ATOMIC_LOAD_MAX, 696 ATOMIC_LOAD_UMIN, 697 ATOMIC_LOAD_UMAX, 698 699 // Masked load and store - consecutive vector load and store operations 700 // with additional mask operand that prevents memory accesses to the 701 // masked-off lanes. 702 MLOAD, MSTORE, 703 704 // Masked gather and scatter - load and store operations for a vector of 705 // random addresses with additional mask operand that prevents memory 706 // accesses to the masked-off lanes. 707 MGATHER, MSCATTER, 708 709 /// This corresponds to the llvm.lifetime.* intrinsics. The first operand 710 /// is the chain and the second operand is the alloca pointer. 711 LIFETIME_START, LIFETIME_END, 712 713 /// GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the 714 /// beginning and end of GC transition sequence, and carry arbitrary 715 /// information that target might need for lowering. The first operand is 716 /// a chain, the rest are specified by the target and not touched by the DAG 717 /// optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be 718 /// nested. 719 GC_TRANSITION_START, 720 GC_TRANSITION_END, 721 722 /// BUILTIN_OP_END - This must be the last enum value in this list. 723 /// The target-specific pre-isel opcode values start here. 724 BUILTIN_OP_END 725 }; 726 727 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations 728 /// which do not reference a specific memory location should be less than 729 /// this value. Those that do must not be less than this value, and can 730 /// be used with SelectionDAG::getMemIntrinsicNode. 731 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+300; 732 733 //===--------------------------------------------------------------------===// 734 /// MemIndexedMode enum - This enum defines the load / store indexed 735 /// addressing modes. 736 /// 737 /// UNINDEXED "Normal" load / store. The effective address is already 738 /// computed and is available in the base pointer. The offset 739 /// operand is always undefined. In addition to producing a 740 /// chain, an unindexed load produces one value (result of the 741 /// load); an unindexed store does not produce a value. 742 /// 743 /// PRE_INC Similar to the unindexed mode where the effective address is 744 /// PRE_DEC the value of the base pointer add / subtract the offset. 745 /// It considers the computation as being folded into the load / 746 /// store operation (i.e. the load / store does the address 747 /// computation as well as performing the memory transaction). 748 /// The base operand is always undefined. In addition to 749 /// producing a chain, pre-indexed load produces two values 750 /// (result of the load and the result of the address 751 /// computation); a pre-indexed store produces one value (result 752 /// of the address computation). 753 /// 754 /// POST_INC The effective address is the value of the base pointer. The 755 /// POST_DEC value of the offset operand is then added to / subtracted 756 /// from the base after memory transaction. In addition to 757 /// producing a chain, post-indexed load produces two values 758 /// (the result of the load and the result of the base +/- offset 759 /// computation); a post-indexed store produces one value (the 760 /// the result of the base +/- offset computation). 761 enum MemIndexedMode { 762 UNINDEXED = 0, 763 PRE_INC, 764 PRE_DEC, 765 POST_INC, 766 POST_DEC, 767 LAST_INDEXED_MODE 768 }; 769 770 //===--------------------------------------------------------------------===// 771 /// LoadExtType enum - This enum defines the three variants of LOADEXT 772 /// (load with extension). 773 /// 774 /// SEXTLOAD loads the integer operand and sign extends it to a larger 775 /// integer result type. 776 /// ZEXTLOAD loads the integer operand and zero extends it to a larger 777 /// integer result type. 778 /// EXTLOAD is used for two things: floating point extending loads and 779 /// integer extending loads [the top bits are undefined]. 780 enum LoadExtType { 781 NON_EXTLOAD = 0, 782 EXTLOAD, 783 SEXTLOAD, 784 ZEXTLOAD, 785 LAST_LOADEXT_TYPE 786 }; 787 788 NodeType getExtForLoadExtType(bool IsFP, LoadExtType); 789 790 //===--------------------------------------------------------------------===// 791 /// ISD::CondCode enum - These are ordered carefully to make the bitfields 792 /// below work out, when considering SETFALSE (something that never exists 793 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 794 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 795 /// to. If the "N" column is 1, the result of the comparison is undefined if 796 /// the input is a NAN. 797 /// 798 /// All of these (except for the 'always folded ops') should be handled for 799 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 800 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 801 /// 802 /// Note that these are laid out in a specific order to allow bit-twiddling 803 /// to transform conditions. 804 enum CondCode { 805 // Opcode N U L G E Intuitive operation 806 SETFALSE, // 0 0 0 0 Always false (always folded) 807 SETOEQ, // 0 0 0 1 True if ordered and equal 808 SETOGT, // 0 0 1 0 True if ordered and greater than 809 SETOGE, // 0 0 1 1 True if ordered and greater than or equal 810 SETOLT, // 0 1 0 0 True if ordered and less than 811 SETOLE, // 0 1 0 1 True if ordered and less than or equal 812 SETONE, // 0 1 1 0 True if ordered and operands are unequal 813 SETO, // 0 1 1 1 True if ordered (no nans) 814 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 815 SETUEQ, // 1 0 0 1 True if unordered or equal 816 SETUGT, // 1 0 1 0 True if unordered or greater than 817 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 818 SETULT, // 1 1 0 0 True if unordered or less than 819 SETULE, // 1 1 0 1 True if unordered, less than, or equal 820 SETUNE, // 1 1 1 0 True if unordered or not equal 821 SETTRUE, // 1 1 1 1 Always true (always folded) 822 // Don't care operations: undefined if the input is a nan. 823 SETFALSE2, // 1 X 0 0 0 Always false (always folded) 824 SETEQ, // 1 X 0 0 1 True if equal 825 SETGT, // 1 X 0 1 0 True if greater than 826 SETGE, // 1 X 0 1 1 True if greater than or equal 827 SETLT, // 1 X 1 0 0 True if less than 828 SETLE, // 1 X 1 0 1 True if less than or equal 829 SETNE, // 1 X 1 1 0 True if not equal 830 SETTRUE2, // 1 X 1 1 1 Always true (always folded) 831 832 SETCC_INVALID // Marker value. 833 }; 834 835 /// isSignedIntSetCC - Return true if this is a setcc instruction that 836 /// performs a signed comparison when used with integer operands. 837 inline bool isSignedIntSetCC(CondCode Code) { 838 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 839 } 840 841 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 842 /// performs an unsigned comparison when used with integer operands. 843 inline bool isUnsignedIntSetCC(CondCode Code) { 844 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 845 } 846 847 /// isTrueWhenEqual - Return true if the specified condition returns true if 848 /// the two operands to the condition are equal. Note that if one of the two 849 /// operands is a NaN, this value is meaningless. 850 inline bool isTrueWhenEqual(CondCode Cond) { 851 return ((int)Cond & 1) != 0; 852 } 853 854 /// getUnorderedFlavor - This function returns 0 if the condition is always 855 /// false if an operand is a NaN, 1 if the condition is always true if the 856 /// operand is a NaN, and 2 if the condition is undefined if the operand is a 857 /// NaN. 858 inline unsigned getUnorderedFlavor(CondCode Cond) { 859 return ((int)Cond >> 3) & 3; 860 } 861 862 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 863 /// 'op' is a valid SetCC operation. 864 CondCode getSetCCInverse(CondCode Operation, bool isInteger); 865 866 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 867 /// when given the operation for (X op Y). 868 CondCode getSetCCSwappedOperands(CondCode Operation); 869 870 /// getSetCCOrOperation - Return the result of a logical OR between different 871 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 872 /// function returns SETCC_INVALID if it is not possible to represent the 873 /// resultant comparison. 874 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 875 876 /// getSetCCAndOperation - Return the result of a logical AND between 877 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 878 /// function returns SETCC_INVALID if it is not possible to represent the 879 /// resultant comparison. 880 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 881 882 //===--------------------------------------------------------------------===// 883 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 884 /// supports. 885 enum CvtCode { 886 CVT_FF, /// Float from Float 887 CVT_FS, /// Float from Signed 888 CVT_FU, /// Float from Unsigned 889 CVT_SF, /// Signed from Float 890 CVT_UF, /// Unsigned from Float 891 CVT_SS, /// Signed from Signed 892 CVT_SU, /// Signed from Unsigned 893 CVT_US, /// Unsigned from Signed 894 CVT_UU, /// Unsigned from Unsigned 895 CVT_INVALID /// Marker - Invalid opcode 896 }; 897 898} // end llvm::ISD namespace 899 900} // end llvm namespace 901 902#endif 903