Analysis.h revision 314564
1207618Srdivacky//===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===// 2207618Srdivacky// 3207618Srdivacky// The LLVM Compiler Infrastructure 4207618Srdivacky// 5207618Srdivacky// This file is distributed under the University of Illinois Open Source 6207618Srdivacky// License. See LICENSE.TXT for details. 7207618Srdivacky// 8207618Srdivacky//===----------------------------------------------------------------------===// 9207618Srdivacky// 10276479Sdim// This file declares several CodeGen-specific LLVM IR analysis utilities. 11207618Srdivacky// 12207618Srdivacky//===----------------------------------------------------------------------===// 13207618Srdivacky 14207618Srdivacky#ifndef LLVM_CODEGEN_ANALYSIS_H 15207618Srdivacky#define LLVM_CODEGEN_ANALYSIS_H 16207618Srdivacky 17224145Sdim#include "llvm/ADT/ArrayRef.h" 18296417Sdim#include "llvm/ADT/DenseMap.h" 19207618Srdivacky#include "llvm/ADT/SmallVector.h" 20309124Sdim#include "llvm/ADT/Triple.h" 21249423Sdim#include "llvm/CodeGen/ISDOpcodes.h" 22276479Sdim#include "llvm/IR/CallSite.h" 23249423Sdim#include "llvm/IR/InlineAsm.h" 24249423Sdim#include "llvm/IR/Instructions.h" 25309124Sdim#include "llvm/Support/CodeGen.h" 26207618Srdivacky 27207618Srdivackynamespace llvm { 28280031Sdimclass GlobalValue; 29296417Sdimclass MachineBasicBlock; 30296417Sdimclass MachineFunction; 31276479Sdimclass TargetLoweringBase; 32207618Srdivackyclass TargetLowering; 33276479Sdimclass TargetMachine; 34218893Sdimclass SDNode; 35234353Sdimclass SDValue; 36218893Sdimclass SelectionDAG; 37276479Sdimstruct EVT; 38207618Srdivacky 39280031Sdim/// \brief Compute the linearized index of a member in a nested 40280031Sdim/// aggregate/struct/array. 41207618Srdivacky/// 42280031Sdim/// Given an LLVM IR aggregate type and a sequence of insertvalue or 43280031Sdim/// extractvalue indices that identify a member, return the linearized index of 44280031Sdim/// the start of the member, i.e the number of element in memory before the 45296417Sdim/// sought one. This is disconnected from the number of bytes. 46280031Sdim/// 47280031Sdim/// \param Ty is the type indexed by \p Indices. 48280031Sdim/// \param Indices is an optional pointer in the indices list to the current 49280031Sdim/// index. 50280031Sdim/// \param IndicesEnd is the end of the indices list. 51280031Sdim/// \param CurIndex is the current index in the recursion. 52280031Sdim/// 53280031Sdim/// \returns \p CurIndex plus the linear index in \p Ty the indices list. 54226633Sdimunsigned ComputeLinearIndex(Type *Ty, 55207618Srdivacky const unsigned *Indices, 56207618Srdivacky const unsigned *IndicesEnd, 57207618Srdivacky unsigned CurIndex = 0); 58207618Srdivacky 59226633Sdiminline unsigned ComputeLinearIndex(Type *Ty, 60224145Sdim ArrayRef<unsigned> Indices, 61224145Sdim unsigned CurIndex = 0) { 62224145Sdim return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex); 63224145Sdim} 64224145Sdim 65207618Srdivacky/// ComputeValueVTs - Given an LLVM IR type, compute a sequence of 66207618Srdivacky/// EVTs that represent all the individual underlying 67207618Srdivacky/// non-aggregate types that comprise it. 68207618Srdivacky/// 69207618Srdivacky/// If Offsets is non-null, it points to a vector to be filled in 70207618Srdivacky/// with the in-memory offsets of each of the individual values. 71207618Srdivacky/// 72288943Sdimvoid ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, 73207618Srdivacky SmallVectorImpl<EVT> &ValueVTs, 74276479Sdim SmallVectorImpl<uint64_t> *Offsets = nullptr, 75207618Srdivacky uint64_t StartingOffset = 0); 76207618Srdivacky 77207618Srdivacky/// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V. 78280031SdimGlobalValue *ExtractTypeInfo(Value *V); 79207618Srdivacky 80207618Srdivacky/// hasInlineAsmMemConstraint - Return true if the inline asm instruction being 81207618Srdivacky/// processed uses a memory 'm' constraint. 82218893Sdimbool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos, 83207618Srdivacky const TargetLowering &TLI); 84207618Srdivacky 85207618Srdivacky/// getFCmpCondCode - Return the ISD condition code corresponding to 86207618Srdivacky/// the given LLVM IR floating-point condition code. This includes 87207618Srdivacky/// consideration of global floating-point math flags. 88207618Srdivacky/// 89207618SrdivackyISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred); 90207618Srdivacky 91234353Sdim/// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats, 92234353Sdim/// return the equivalent code if we're allowed to assume that NaNs won't occur. 93234353SdimISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC); 94234353Sdim 95207618Srdivacky/// getICmpCondCode - Return the ISD condition code corresponding to 96207618Srdivacky/// the given LLVM IR integer condition code. 97207618Srdivacky/// 98207618SrdivackyISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred); 99207618Srdivacky 100207618Srdivacky/// Test if the given instruction is in a position to be optimized 101207618Srdivacky/// with a tail-call. This roughly means that it's in a block with 102207618Srdivacky/// a return and there's nothing that needs to be scheduled 103207618Srdivacky/// between it and the return. 104207618Srdivacky/// 105207618Srdivacky/// This function only tests target-independent requirements. 106276479Sdimbool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM); 107207618Srdivacky 108314564Sdim/// Test if given that the input instruction is in the tail call position, if 109314564Sdim/// there is an attribute mismatch between the caller and the callee that will 110314564Sdim/// inhibit tail call optimizations. 111314564Sdim/// \p AllowDifferingSizes is an output parameter which, if forming a tail call 112314564Sdim/// is permitted, determines whether it's permitted only if the size of the 113314564Sdim/// caller's and callee's return types match exactly. 114314564Sdimbool attributesPermitTailCall(const Function *F, const Instruction *I, 115314564Sdim const ReturnInst *Ret, 116314564Sdim const TargetLoweringBase &TLI, 117314564Sdim bool *AllowDifferingSizes = nullptr); 118314564Sdim 119261991Sdim/// Test if given that the input instruction is in the tail call position if the 120261991Sdim/// return type or any attributes of the function will inhibit tail call 121261991Sdim/// optimization. 122314564Sdimbool returnTypeIsEligibleForTailCall(const Function *F, const Instruction *I, 123261991Sdim const ReturnInst *Ret, 124261991Sdim const TargetLoweringBase &TLI); 125261991Sdim 126280031Sdim// True if GV can be left out of the object symbol table. This is the case 127280031Sdim// for linkonce_odr values whose address is not significant. While legal, it is 128280031Sdim// not normally profitable to omit them from the .o symbol table. Using this 129280031Sdim// analysis makes sense when the information can be passed down to the linker 130280031Sdim// or we are in LTO. 131280031Sdimbool canBeOmittedFromSymbolTable(const GlobalValue *GV); 132280031Sdim 133296417SdimDenseMap<const MachineBasicBlock *, int> 134296417SdimgetFuncletMembership(const MachineFunction &MF); 135296417Sdim 136207618Srdivacky} // End llvm namespace 137207618Srdivacky 138207618Srdivacky#endif 139