1317027Sdim//===-- RegisterInfoPOSIX_arm.cpp ------------------------------*- C++ -*-===// 2317027Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6317027Sdim// 7317027Sdim//===---------------------------------------------------------------------===// 8317027Sdim 9317027Sdim#include <cassert> 10317027Sdim#include <stddef.h> 11317027Sdim#include <vector> 12317027Sdim 13317027Sdim#include "lldb/lldb-defines.h" 14317027Sdim#include "llvm/Support/Compiler.h" 15317027Sdim 16317027Sdim#include "RegisterInfoPOSIX_arm.h" 17317027Sdim 18317027Sdimusing namespace lldb; 19317027Sdimusing namespace lldb_private; 20317027Sdim 21317027Sdim// Based on RegisterContextDarwin_arm.cpp 22317027Sdim#define GPR_OFFSET(idx) ((idx)*4) 23317027Sdim#define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR)) 24317027Sdim#define FPSCR_OFFSET \ 25317027Sdim (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \ 26317027Sdim sizeof(RegisterInfoPOSIX_arm::GPR)) 27317027Sdim#define EXC_OFFSET(idx) \ 28317027Sdim ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR) + \ 29317027Sdim sizeof(RegisterInfoPOSIX_arm::FPU)) 30317027Sdim#define DBG_OFFSET(reg) \ 31317027Sdim ((LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::DBG, reg) + \ 32317027Sdim sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 33317027Sdim sizeof(RegisterInfoPOSIX_arm::EXC))) 34317027Sdim 35317027Sdim#define DEFINE_DBG(reg, i) \ 36317027Sdim #reg, NULL, sizeof(((RegisterInfoPOSIX_arm::DBG *) NULL)->reg[i]), \ 37317027Sdim DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, \ 38317027Sdim {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 39317027Sdim LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 40317027Sdim dbg_##reg##i }, \ 41317027Sdim NULL, NULL, NULL, 0 42317027Sdim#define REG_CONTEXT_SIZE \ 43317027Sdim (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \ 44317027Sdim sizeof(RegisterInfoPOSIX_arm::EXC)) 45317027Sdim 46317027Sdim// Include RegisterInfos_arm to declare our g_register_infos_arm structure. 47317027Sdim#define DECLARE_REGISTER_INFOS_ARM_STRUCT 48317027Sdim#include "RegisterInfos_arm.h" 49317027Sdim#undef DECLARE_REGISTER_INFOS_ARM_STRUCT 50317027Sdim 51317027Sdimstatic const lldb_private::RegisterInfo * 52317027SdimGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { 53317027Sdim switch (target_arch.GetMachine()) { 54317027Sdim case llvm::Triple::arm: 55317027Sdim return g_register_infos_arm; 56317027Sdim default: 57317027Sdim assert(false && "Unhandled target architecture."); 58353358Sdim return nullptr; 59317027Sdim } 60317027Sdim} 61317027Sdim 62317027Sdimstatic uint32_t 63317027SdimGetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) { 64317027Sdim switch (target_arch.GetMachine()) { 65317027Sdim case llvm::Triple::arm: 66317027Sdim return static_cast<uint32_t>(sizeof(g_register_infos_arm) / 67317027Sdim sizeof(g_register_infos_arm[0])); 68317027Sdim default: 69317027Sdim assert(false && "Unhandled target architecture."); 70317027Sdim return 0; 71317027Sdim } 72317027Sdim} 73317027Sdim 74317027SdimRegisterInfoPOSIX_arm::RegisterInfoPOSIX_arm( 75317027Sdim const lldb_private::ArchSpec &target_arch) 76317027Sdim : lldb_private::RegisterInfoInterface(target_arch), 77317027Sdim m_register_info_p(GetRegisterInfoPtr(target_arch)), 78317027Sdim m_register_info_count(GetRegisterInfoCount(target_arch)) {} 79317027Sdim 80317027Sdimsize_t RegisterInfoPOSIX_arm::GetGPRSize() const { 81317027Sdim return sizeof(struct RegisterInfoPOSIX_arm::GPR); 82317027Sdim} 83317027Sdim 84317027Sdimconst lldb_private::RegisterInfo * 85317027SdimRegisterInfoPOSIX_arm::GetRegisterInfo() const { 86317027Sdim return m_register_info_p; 87317027Sdim} 88317027Sdim 89317027Sdimuint32_t RegisterInfoPOSIX_arm::GetRegisterCount() const { 90317027Sdim return m_register_info_count; 91317027Sdim} 92