cpuid.h revision 309124
1321936Shselasky/*===---- cpuid.h - X86 cpu model detection --------------------------------=== 2321936Shselasky * 3321936Shselasky * Permission is hereby granted, free of charge, to any person obtaining a copy 4321936Shselasky * of this software and associated documentation files (the "Software"), to deal 5321936Shselasky * in the Software without restriction, including without limitation the rights 6321936Shselasky * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7321936Shselasky * copies of the Software, and to permit persons to whom the Software is 8321936Shselasky * furnished to do so, subject to the following conditions: 9321936Shselasky * 10321936Shselasky * The above copyright notice and this permission notice shall be included in 11321936Shselasky * all copies or substantial portions of the Software. 12321936Shselasky * 13321936Shselasky * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14321936Shselasky * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15321936Shselasky * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16321936Shselasky * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17321936Shselasky * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18321936Shselasky * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 19321936Shselasky * THE SOFTWARE. 20321936Shselasky * 21321936Shselasky *===-----------------------------------------------------------------------=== 22321936Shselasky */ 23321936Shselasky 24321936Shselasky#if !(__x86_64__ || __i386__) 25321936Shselasky#error this header is for x86 only 26321936Shselasky#endif 27321936Shselasky 28321936Shselasky/* Responses identification request with %eax 0 */ 29321936Shselasky/* AMD: "AuthenticAMD" */ 30321936Shselasky#define signature_AMD_ebx 0x68747541 31321936Shselasky#define signature_AMD_edx 0x69746e65 32321936Shselasky#define signature_AMD_ecx 0x444d4163 33321936Shselasky/* CENTAUR: "CentaurHauls" */ 34321936Shselasky#define signature_CENTAUR_ebx 0x746e6543 35321936Shselasky#define signature_CENTAUR_edx 0x48727561 36321936Shselasky#define signature_CENTAUR_ecx 0x736c7561 37321936Shselasky/* CYRIX: "CyrixInstead" */ 38321936Shselasky#define signature_CYRIX_ebx 0x69727943 39321936Shselasky#define signature_CYRIX_edx 0x736e4978 40321936Shselasky#define signature_CYRIX_ecx 0x64616574 41321936Shselasky/* INTEL: "GenuineIntel" */ 42321936Shselasky#define signature_INTEL_ebx 0x756e6547 43321936Shselasky#define signature_INTEL_edx 0x49656e69 44321936Shselasky#define signature_INTEL_ecx 0x6c65746e 45321936Shselasky/* TM1: "TransmetaCPU" */ 46321936Shselasky#define signature_TM1_ebx 0x6e617254 47321936Shselasky#define signature_TM1_edx 0x74656d73 48321936Shselasky#define signature_TM1_ecx 0x55504361 49321936Shselasky/* TM2: "GenuineTMx86" */ 50321936Shselasky#define signature_TM2_ebx 0x756e6547 51321936Shselasky#define signature_TM2_edx 0x54656e69 52321936Shselasky#define signature_TM2_ecx 0x3638784d 53321936Shselasky/* NSC: "Geode by NSC" */ 54321936Shselasky#define signature_NSC_ebx 0x646f6547 55321936Shselasky#define signature_NSC_edx 0x43534e20 56321936Shselasky#define signature_NSC_ecx 0x79622065 57321936Shselasky/* NEXGEN: "NexGenDriven" */ 58321936Shselasky#define signature_NEXGEN_ebx 0x4778654e 59321936Shselasky#define signature_NEXGEN_edx 0x72446e65 60321936Shselasky#define signature_NEXGEN_ecx 0x6e657669 61321936Shselasky/* RISE: "RiseRiseRise" */ 62321936Shselasky#define signature_RISE_ebx 0x65736952 63321936Shselasky#define signature_RISE_edx 0x65736952 64321936Shselasky#define signature_RISE_ecx 0x65736952 65321936Shselasky/* SIS: "SiS SiS SiS " */ 66321936Shselasky#define signature_SIS_ebx 0x20536953 67321936Shselasky#define signature_SIS_edx 0x20536953 68321936Shselasky#define signature_SIS_ecx 0x20536953 69321936Shselasky/* UMC: "UMC UMC UMC " */ 70321936Shselasky#define signature_UMC_ebx 0x20434d55 71321936Shselasky#define signature_UMC_edx 0x20434d55 72321936Shselasky#define signature_UMC_ecx 0x20434d55 73321936Shselasky/* VIA: "VIA VIA VIA " */ 74321936Shselasky#define signature_VIA_ebx 0x20414956 75321936Shselasky#define signature_VIA_edx 0x20414956 76321936Shselasky#define signature_VIA_ecx 0x20414956 77321936Shselasky/* VORTEX: "Vortex86 SoC" */ 78321936Shselasky#define signature_VORTEX_ebx 0x74726f56 79321936Shselasky#define signature_VORTEX_edx 0x36387865 80321936Shselasky#define signature_VORTEX_ecx 0x436f5320 81321936Shselasky 82321936Shselasky/* Features in %ecx for level 1 */ 83321936Shselasky#define bit_SSE3 0x00000001 84321936Shselasky#define bit_PCLMULQDQ 0x00000002 85321936Shselasky#define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */ 86321936Shselasky#define bit_DTES64 0x00000004 87321936Shselasky#define bit_MONITOR 0x00000008 88321936Shselasky#define bit_DSCPL 0x00000010 89321936Shselasky#define bit_VMX 0x00000020 90321936Shselasky#define bit_SMX 0x00000040 91321936Shselasky#define bit_EIST 0x00000080 92321936Shselasky#define bit_TM2 0x00000100 93321936Shselasky#define bit_SSSE3 0x00000200 94321936Shselasky#define bit_CNXTID 0x00000400 95321936Shselasky#define bit_FMA 0x00001000 96321936Shselasky#define bit_CMPXCHG16B 0x00002000 97321936Shselasky#define bit_xTPR 0x00004000 98321936Shselasky#define bit_PDCM 0x00008000 99321936Shselasky#define bit_PCID 0x00020000 100321936Shselasky#define bit_DCA 0x00040000 101321936Shselasky#define bit_SSE41 0x00080000 102321936Shselasky#define bit_SSE4_1 bit_SSE41 /* for gcc compat */ 103321936Shselasky#define bit_SSE42 0x00100000 104321936Shselasky#define bit_SSE4_2 bit_SSE42 /* for gcc compat */ 105321936Shselasky#define bit_x2APIC 0x00200000 106321936Shselasky#define bit_MOVBE 0x00400000 107321936Shselasky#define bit_POPCNT 0x00800000 108321936Shselasky#define bit_TSCDeadline 0x01000000 109321936Shselasky#define bit_AESNI 0x02000000 110321936Shselasky#define bit_AES bit_AESNI /* for gcc compat */ 111321936Shselasky#define bit_XSAVE 0x04000000 112321936Shselasky#define bit_OSXSAVE 0x08000000 113321936Shselasky#define bit_AVX 0x10000000 114321936Shselasky#define bit_F16C 0x20000000 115321936Shselasky#define bit_RDRND 0x40000000 116321936Shselasky 117321936Shselasky/* Features in %edx for level 1 */ 118321936Shselasky#define bit_FPU 0x00000001 119321936Shselasky#define bit_VME 0x00000002 120321936Shselasky#define bit_DE 0x00000004 121321936Shselasky#define bit_PSE 0x00000008 122321936Shselasky#define bit_TSC 0x00000010 123321936Shselasky#define bit_MSR 0x00000020 124321936Shselasky#define bit_PAE 0x00000040 125321936Shselasky#define bit_MCE 0x00000080 126321936Shselasky#define bit_CX8 0x00000100 127321936Shselasky#define bit_CMPXCHG8B bit_CX8 /* for gcc compat */ 128321936Shselasky#define bit_APIC 0x00000200 129321936Shselasky#define bit_SEP 0x00000800 130321936Shselasky#define bit_MTRR 0x00001000 131321936Shselasky#define bit_PGE 0x00002000 132321936Shselasky#define bit_MCA 0x00004000 133321936Shselasky#define bit_CMOV 0x00008000 134321936Shselasky#define bit_PAT 0x00010000 135321936Shselasky#define bit_PSE36 0x00020000 136321936Shselasky#define bit_PSN 0x00040000 137321936Shselasky#define bit_CLFSH 0x00080000 138321936Shselasky#define bit_DS 0x00200000 139321936Shselasky#define bit_ACPI 0x00400000 140321936Shselasky#define bit_MMX 0x00800000 141321936Shselasky#define bit_FXSR 0x01000000 142321936Shselasky#define bit_FXSAVE bit_FXSR /* for gcc compat */ 143321936Shselasky#define bit_SSE 0x02000000 144321936Shselasky#define bit_SSE2 0x04000000 145321936Shselasky#define bit_SS 0x08000000 146321936Shselasky#define bit_HTT 0x10000000 147321936Shselasky#define bit_TM 0x20000000 148321936Shselasky#define bit_PBE 0x80000000 149321936Shselasky 150321936Shselasky/* Features in %ebx for level 7 sub-leaf 0 */ 151321936Shselasky#define bit_FSGSBASE 0x00000001 152321936Shselasky#define bit_SMEP 0x00000080 153321936Shselasky#define bit_ENH_MOVSB 0x00000200 154321936Shselasky 155321936Shselasky#if __i386__ 156321936Shselasky#define __cpuid(__level, __eax, __ebx, __ecx, __edx) \ 157321936Shselasky __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \ 158321936Shselasky : "0"(__level)) 159321936Shselasky 160321936Shselasky#define __cpuid_count(__level, __count, __eax, __ebx, __ecx, __edx) \ 161321936Shselasky __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \ 162321936Shselasky : "0"(__level), "2"(__count)) 163321936Shselasky#else 164321936Shselasky/* x86-64 uses %rbx as the base register, so preserve it. */ 165321936Shselasky#define __cpuid(__level, __eax, __ebx, __ecx, __edx) \ 166321936Shselasky __asm(" xchgq %%rbx,%q1\n" \ 167321936Shselasky " cpuid\n" \ 168321936Shselasky " xchgq %%rbx,%q1" \ 169321936Shselasky : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \ 170321936Shselasky : "0"(__level)) 171321936Shselasky 172321936Shselasky#define __cpuid_count(__level, __count, __eax, __ebx, __ecx, __edx) \ 173321936Shselasky __asm(" xchgq %%rbx,%q1\n" \ 174321936Shselasky " cpuid\n" \ 175321936Shselasky " xchgq %%rbx,%q1" \ 176321936Shselasky : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \ 177321936Shselasky : "0"(__level), "2"(__count)) 178321936Shselasky#endif 179321936Shselasky 180321936Shselaskystatic __inline int __get_cpuid (unsigned int __level, unsigned int *__eax, 181321936Shselasky unsigned int *__ebx, unsigned int *__ecx, 182321936Shselasky unsigned int *__edx) { 183321936Shselasky __cpuid(__level, *__eax, *__ebx, *__ecx, *__edx); 184321936Shselasky return 1; 185321936Shselasky} 186321936Shselasky 187321936Shselaskystatic __inline int __get_cpuid_max (unsigned int __level, unsigned int *__sig) 188321936Shselasky{ 189321936Shselasky unsigned int __eax, __ebx, __ecx, __edx; 190321936Shselasky#if __i386__ 191321936Shselasky int __cpuid_supported; 192321936Shselasky 193321936Shselasky __asm(" pushfl\n" 194321936Shselasky " popl %%eax\n" 195321936Shselasky " movl %%eax,%%ecx\n" 196321936Shselasky " xorl $0x00200000,%%eax\n" 197321936Shselasky " pushl %%eax\n" 198321936Shselasky " popfl\n" 199321936Shselasky " pushfl\n" 200321936Shselasky " popl %%eax\n" 201321936Shselasky " movl $0,%0\n" 202321936Shselasky " cmpl %%eax,%%ecx\n" 203321936Shselasky " je 1f\n" 204321936Shselasky " movl $1,%0\n" 205321936Shselasky "1:" 206321936Shselasky : "=r" (__cpuid_supported) : : "eax", "ecx"); 207321936Shselasky if (!__cpuid_supported) 208321936Shselasky return 0; 209321936Shselasky#endif 210321936Shselasky 211321936Shselasky __cpuid(__level, __eax, __ebx, __ecx, __edx); 212321936Shselasky if (__sig) 213321936Shselasky *__sig = __ebx; 214321936Shselasky return __eax; 215321936Shselasky} 216321936Shselasky