avx512dqintrin.h revision 285181
1/*===---- avx512dqintrin.h - AVX512DQ intrinsics ---------------------------=== 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a copy 4 * of this software and associated documentation files (the "Software"), to deal 5 * in the Software without restriction, including without limitation the rights 6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 * copies of the Software, and to permit persons to whom the Software is 8 * furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 19 * THE SOFTWARE. 20 * 21 *===-----------------------------------------------------------------------=== 22 */ 23 24#ifndef __IMMINTRIN_H 25#error "Never use <avx512dqintrin.h> directly; include <immintrin.h> instead." 26#endif 27 28#ifndef __AVX512DQINTRIN_H 29#define __AVX512DQINTRIN_H 30 31/* Define the default attributes for the functions in this file. */ 32#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"))) 33 34static __inline__ __m512i __DEFAULT_FN_ATTRS 35_mm512_mullo_epi64 (__m512i __A, __m512i __B) { 36 return (__m512i) ((__v8di) __A * (__v8di) __B); 37} 38 39static __inline__ __m512i __DEFAULT_FN_ATTRS 40_mm512_mask_mullo_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { 41 return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, 42 (__v8di) __B, 43 (__v8di) __W, 44 (__mmask8) __U); 45} 46 47static __inline__ __m512i __DEFAULT_FN_ATTRS 48_mm512_maskz_mullo_epi64 (__mmask8 __U, __m512i __A, __m512i __B) { 49 return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, 50 (__v8di) __B, 51 (__v8di) 52 _mm512_setzero_si512 (), 53 (__mmask8) __U); 54} 55 56static __inline__ __m512d __DEFAULT_FN_ATTRS 57_mm512_xor_pd (__m512d __A, __m512d __B) { 58 return (__m512d) ((__v8di) __A ^ (__v8di) __B); 59} 60 61static __inline__ __m512d __DEFAULT_FN_ATTRS 62_mm512_mask_xor_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 63 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, 64 (__v8df) __B, 65 (__v8df) __W, 66 (__mmask8) __U); 67} 68 69static __inline__ __m512d __DEFAULT_FN_ATTRS 70_mm512_maskz_xor_pd (__mmask8 __U, __m512d __A, __m512d __B) { 71 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, 72 (__v8df) __B, 73 (__v8df) 74 _mm512_setzero_pd (), 75 (__mmask8) __U); 76} 77 78static __inline__ __m512 __DEFAULT_FN_ATTRS 79_mm512_xor_ps (__m512 __A, __m512 __B) { 80 return (__m512) ((__v16si) __A ^ (__v16si) __B); 81} 82 83static __inline__ __m512 __DEFAULT_FN_ATTRS 84_mm512_mask_xor_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 85 return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A, 86 (__v16sf) __B, 87 (__v16sf) __W, 88 (__mmask16) __U); 89} 90 91static __inline__ __m512 __DEFAULT_FN_ATTRS 92_mm512_maskz_xor_ps (__mmask16 __U, __m512 __A, __m512 __B) { 93 return (__m512) __builtin_ia32_xorps512_mask ((__v16sf) __A, 94 (__v16sf) __B, 95 (__v16sf) 96 _mm512_setzero_ps (), 97 (__mmask16) __U); 98} 99 100static __inline__ __m512d __DEFAULT_FN_ATTRS 101_mm512_or_pd (__m512d __A, __m512d __B) { 102 return (__m512d) ((__v8di) __A | (__v8di) __B); 103} 104 105static __inline__ __m512d __DEFAULT_FN_ATTRS 106_mm512_mask_or_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 107 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, 108 (__v8df) __B, 109 (__v8df) __W, 110 (__mmask8) __U); 111} 112 113static __inline__ __m512d __DEFAULT_FN_ATTRS 114_mm512_maskz_or_pd (__mmask8 __U, __m512d __A, __m512d __B) { 115 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, 116 (__v8df) __B, 117 (__v8df) 118 _mm512_setzero_pd (), 119 (__mmask8) __U); 120} 121 122static __inline__ __m512 __DEFAULT_FN_ATTRS 123_mm512_or_ps (__m512 __A, __m512 __B) { 124 return (__m512) ((__v16si) __A | (__v16si) __B); 125} 126 127static __inline__ __m512 __DEFAULT_FN_ATTRS 128_mm512_mask_or_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 129 return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A, 130 (__v16sf) __B, 131 (__v16sf) __W, 132 (__mmask16) __U); 133} 134 135static __inline__ __m512 __DEFAULT_FN_ATTRS 136_mm512_maskz_or_ps (__mmask16 __U, __m512 __A, __m512 __B) { 137 return (__m512) __builtin_ia32_orps512_mask ((__v16sf) __A, 138 (__v16sf) __B, 139 (__v16sf) 140 _mm512_setzero_ps (), 141 (__mmask16) __U); 142} 143 144static __inline__ __m512d __DEFAULT_FN_ATTRS 145_mm512_and_pd (__m512d __A, __m512d __B) { 146 return (__m512d) ((__v8di) __A & (__v8di) __B); 147} 148 149static __inline__ __m512d __DEFAULT_FN_ATTRS 150_mm512_mask_and_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 151 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, 152 (__v8df) __B, 153 (__v8df) __W, 154 (__mmask8) __U); 155} 156 157static __inline__ __m512d __DEFAULT_FN_ATTRS 158_mm512_maskz_and_pd (__mmask8 __U, __m512d __A, __m512d __B) { 159 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, 160 (__v8df) __B, 161 (__v8df) 162 _mm512_setzero_pd (), 163 (__mmask8) __U); 164} 165 166static __inline__ __m512 __DEFAULT_FN_ATTRS 167_mm512_and_ps (__m512 __A, __m512 __B) { 168 return (__m512) ((__v16si) __A & (__v16si) __B); 169} 170 171static __inline__ __m512 __DEFAULT_FN_ATTRS 172_mm512_mask_and_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 173 return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A, 174 (__v16sf) __B, 175 (__v16sf) __W, 176 (__mmask16) __U); 177} 178 179static __inline__ __m512 __DEFAULT_FN_ATTRS 180_mm512_maskz_and_ps (__mmask16 __U, __m512 __A, __m512 __B) { 181 return (__m512) __builtin_ia32_andps512_mask ((__v16sf) __A, 182 (__v16sf) __B, 183 (__v16sf) 184 _mm512_setzero_ps (), 185 (__mmask16) __U); 186} 187 188static __inline__ __m512d __DEFAULT_FN_ATTRS 189_mm512_andnot_pd (__m512d __A, __m512d __B) { 190 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, 191 (__v8df) __B, 192 (__v8df) 193 _mm512_setzero_pd (), 194 (__mmask8) -1); 195} 196 197static __inline__ __m512d __DEFAULT_FN_ATTRS 198_mm512_mask_andnot_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 199 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, 200 (__v8df) __B, 201 (__v8df) __W, 202 (__mmask8) __U); 203} 204 205static __inline__ __m512d __DEFAULT_FN_ATTRS 206_mm512_maskz_andnot_pd (__mmask8 __U, __m512d __A, __m512d __B) { 207 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, 208 (__v8df) __B, 209 (__v8df) 210 _mm512_setzero_pd (), 211 (__mmask8) __U); 212} 213 214static __inline__ __m512 __DEFAULT_FN_ATTRS 215_mm512_andnot_ps (__m512 __A, __m512 __B) { 216 return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, 217 (__v16sf) __B, 218 (__v16sf) 219 _mm512_setzero_ps (), 220 (__mmask16) -1); 221} 222 223static __inline__ __m512 __DEFAULT_FN_ATTRS 224_mm512_mask_andnot_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 225 return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, 226 (__v16sf) __B, 227 (__v16sf) __W, 228 (__mmask16) __U); 229} 230 231static __inline__ __m512 __DEFAULT_FN_ATTRS 232_mm512_maskz_andnot_ps (__mmask16 __U, __m512 __A, __m512 __B) { 233 return (__m512) __builtin_ia32_andnps512_mask ((__v16sf) __A, 234 (__v16sf) __B, 235 (__v16sf) 236 _mm512_setzero_ps (), 237 (__mmask16) __U); 238} 239 240#undef __DEFAULT_FN_ATTRS 241 242#endif 243