BuiltinsX86.def revision 224145
198944Sobrien//===--- BuiltinsX86.def - X86 Builtin function database --------*- C++ -*-===// 298944Sobrien// 3130803Smarcel// The LLVM Compiler Infrastructure 4130803Smarcel// 598944Sobrien// This file is distributed under the University of Illinois Open Source 698944Sobrien// License. See LICENSE.TXT for details. 798944Sobrien// 898944Sobrien//===----------------------------------------------------------------------===// 998944Sobrien// 1098944Sobrien// This file defines the X86-specific builtin function database. Users of 1198944Sobrien// this file must define the BUILTIN macro to make use of this information. 1298944Sobrien// 1398944Sobrien//===----------------------------------------------------------------------===// 1498944Sobrien 1598944Sobrien// The format of this database matches clang/Basic/Builtins.def. 1698944Sobrien 1798944Sobrien// FIXME: In GCC, these builtins are defined depending on whether support for 1898944Sobrien// MMX/SSE/etc is turned on. We should do this too. 1998944Sobrien 2098944Sobrien// FIXME: Ideally we would be able to pull this information from what 2198944Sobrien// LLVM already knows about X86 builtins. We need to match the LLVM 2298944Sobrien// definition anyway, since code generation will lower to the 2398944Sobrien// intrinsic if one exists. 2498944Sobrien 2598944Sobrien// FIXME: Are these nothrow/const? 2698944Sobrien 2798944Sobrien// 3DNow! 2898944Sobrien// 2998944SobrienBUILTIN(__builtin_ia32_femms, "v", "") 30130803SmarcelBUILTIN(__builtin_ia32_pavgusb, "V8cV8cV8c", "nc") 31130803SmarcelBUILTIN(__builtin_ia32_pf2id, "V2iV2f", "nc") 3298944SobrienBUILTIN(__builtin_ia32_pfacc, "V2fV2fV2f", "nc") 3398944SobrienBUILTIN(__builtin_ia32_pfadd, "V2fV2fV2f", "nc") 3498944SobrienBUILTIN(__builtin_ia32_pfcmpeq, "V2iV2fV2f", "nc") 3598944SobrienBUILTIN(__builtin_ia32_pfcmpge, "V2iV2fV2f", "nc") 3698944SobrienBUILTIN(__builtin_ia32_pfcmpgt, "V2iV2fV2f", "nc") 3798944SobrienBUILTIN(__builtin_ia32_pfmax, "V2fV2fV2f", "nc") 3898944SobrienBUILTIN(__builtin_ia32_pfmin, "V2fV2fV2f", "nc") 3998944SobrienBUILTIN(__builtin_ia32_pfmul, "V2fV2fV2f", "nc") 4098944SobrienBUILTIN(__builtin_ia32_pfrcp, "V2fV2f", "nc") 4198944SobrienBUILTIN(__builtin_ia32_pfrcpit1, "V2fV2fV2f", "nc") 4298944SobrienBUILTIN(__builtin_ia32_pfrcpit2, "V2fV2fV2f", "nc") 4398944SobrienBUILTIN(__builtin_ia32_pfrsqrt, "V2fV2f", "nc") 4498944SobrienBUILTIN(__builtin_ia32_pfrsqit1, "V2fV2fV2f", "nc") 4598944Sobrien// GCC has pfrsqrtit1, even though this is not the name of the instruction. 4698944SobrienBUILTIN(__builtin_ia32_pfrsqrtit1, "V2fV2fV2f", "nc") 4798944SobrienBUILTIN(__builtin_ia32_pfsub, "V2fV2fV2f", "nc") 4898944SobrienBUILTIN(__builtin_ia32_pfsubr, "V2fV2fV2f", "nc") 4998944SobrienBUILTIN(__builtin_ia32_pi2fd, "V2fV2i", "nc") 5098944SobrienBUILTIN(__builtin_ia32_pmulhrw, "V4sV4sV4s", "nc") 5198944Sobrien// 3DNow! Extensions (3dnowa). 5298944SobrienBUILTIN(__builtin_ia32_pf2iw, "V2iV2f", "nc") 53130803SmarcelBUILTIN(__builtin_ia32_pfnacc, "V2fV2fV2f", "nc") 5498944SobrienBUILTIN(__builtin_ia32_pfpnacc, "V2fV2fV2f", "nc") 5598944SobrienBUILTIN(__builtin_ia32_pi2fw, "V2fV2i", "nc") 5698944SobrienBUILTIN(__builtin_ia32_pswapdsf, "V2fV2f", "nc") 5798944SobrienBUILTIN(__builtin_ia32_pswapdsi, "V2iV2i", "nc") 5898944Sobrien 5998944Sobrien// MMX 6098944Sobrien// 6198944Sobrien// All MMX instructions will be generated via builtins. Any MMX vector 6298944Sobrien// types (<1 x i64>, <2 x i32>, etc.) that aren't used by these builtins will be 6398944Sobrien// expanded by the back-end. 6498944SobrienBUILTIN(__builtin_ia32_emms, "v", "") 65130803SmarcelBUILTIN(__builtin_ia32_paddb, "V8cV8cV8c", "") 66130803SmarcelBUILTIN(__builtin_ia32_paddw, "V4sV4sV4s", "") 6798944SobrienBUILTIN(__builtin_ia32_paddd, "V2iV2iV2i", "") 68130803SmarcelBUILTIN(__builtin_ia32_paddsb, "V8cV8cV8c", "") 69130803SmarcelBUILTIN(__builtin_ia32_paddsw, "V4sV4sV4s", "") 7098944SobrienBUILTIN(__builtin_ia32_paddusb, "V8cV8cV8c", "") 7198944SobrienBUILTIN(__builtin_ia32_paddusw, "V4sV4sV4s", "") 7298944SobrienBUILTIN(__builtin_ia32_psubb, "V8cV8cV8c", "") 7398944SobrienBUILTIN(__builtin_ia32_psubw, "V4sV4sV4s", "") 7498944SobrienBUILTIN(__builtin_ia32_psubd, "V2iV2iV2i", "") 7598944SobrienBUILTIN(__builtin_ia32_psubsb, "V8cV8cV8c", "") 7698944SobrienBUILTIN(__builtin_ia32_psubsw, "V4sV4sV4s", "") 7798944SobrienBUILTIN(__builtin_ia32_psubusb, "V8cV8cV8c", "") 7898944SobrienBUILTIN(__builtin_ia32_psubusw, "V4sV4sV4s", "") 7998944SobrienBUILTIN(__builtin_ia32_pmulhw, "V4sV4sV4s", "") 8098944SobrienBUILTIN(__builtin_ia32_pmullw, "V4sV4sV4s", "") 8198944SobrienBUILTIN(__builtin_ia32_pmaddwd, "V2iV4sV4s", "") 8298944SobrienBUILTIN(__builtin_ia32_pand, "V1LLiV1LLiV1LLi", "") 8398944SobrienBUILTIN(__builtin_ia32_pandn, "V1LLiV1LLiV1LLi", "") 8498944SobrienBUILTIN(__builtin_ia32_por, "V1LLiV1LLiV1LLi", "") 8598944SobrienBUILTIN(__builtin_ia32_pxor, "V1LLiV1LLiV1LLi", "") 8698944SobrienBUILTIN(__builtin_ia32_psllw, "V4sV4sV1LLi", "") 87130803SmarcelBUILTIN(__builtin_ia32_pslld, "V2iV2iV1LLi", "") 8898944SobrienBUILTIN(__builtin_ia32_psllq, "V1LLiV1LLiV1LLi", "") 8998944SobrienBUILTIN(__builtin_ia32_psrlw, "V4sV4sV1LLi", "") 9098944SobrienBUILTIN(__builtin_ia32_psrld, "V2iV2iV1LLi", "") 9198944SobrienBUILTIN(__builtin_ia32_psrlq, "V1LLiV1LLiV1LLi", "") 9298944SobrienBUILTIN(__builtin_ia32_psraw, "V4sV4sV1LLi", "") 9398944SobrienBUILTIN(__builtin_ia32_psrad, "V2iV2iV1LLi", "") 94173619SobrienBUILTIN(__builtin_ia32_psllwi, "V4sV4si", "") 9598944SobrienBUILTIN(__builtin_ia32_pslldi, "V2iV2ii", "") 9698944SobrienBUILTIN(__builtin_ia32_psllqi, "V1LLiV1LLii", "") 9798944SobrienBUILTIN(__builtin_ia32_psrlwi, "V4sV4si", "") 9898944SobrienBUILTIN(__builtin_ia32_psrldi, "V2iV2ii", "") 9998944SobrienBUILTIN(__builtin_ia32_psrlqi, "V1LLiV1LLii", "") 10098944SobrienBUILTIN(__builtin_ia32_psrawi, "V4sV4si", "") 10198944SobrienBUILTIN(__builtin_ia32_psradi, "V2iV2ii", "") 102130803SmarcelBUILTIN(__builtin_ia32_packsswb, "V8cV4sV4s", "") 103130803SmarcelBUILTIN(__builtin_ia32_packssdw, "V4sV2iV2i", "") 10498944SobrienBUILTIN(__builtin_ia32_packuswb, "V8cV4sV4s", "") 10598944SobrienBUILTIN(__builtin_ia32_punpckhbw, "V8cV8cV8c", "") 10698944SobrienBUILTIN(__builtin_ia32_punpckhwd, "V4sV4sV4s", "") 10798944SobrienBUILTIN(__builtin_ia32_punpckhdq, "V2iV2iV2i", "") 108BUILTIN(__builtin_ia32_punpcklbw, "V8cV8cV8c", "") 109BUILTIN(__builtin_ia32_punpcklwd, "V4sV4sV4s", "") 110BUILTIN(__builtin_ia32_punpckldq, "V2iV2iV2i", "") 111BUILTIN(__builtin_ia32_pcmpeqb, "V8cV8cV8c", "") 112BUILTIN(__builtin_ia32_pcmpeqw, "V4sV4sV4s", "") 113BUILTIN(__builtin_ia32_pcmpeqd, "V2iV2iV2i", "") 114BUILTIN(__builtin_ia32_pcmpgtb, "V8cV8cV8c", "") 115BUILTIN(__builtin_ia32_pcmpgtw, "V4sV4sV4s", "") 116BUILTIN(__builtin_ia32_pcmpgtd, "V2iV2iV2i", "") 117BUILTIN(__builtin_ia32_maskmovq, "vV8cV8cc*", "") 118BUILTIN(__builtin_ia32_movntq, "vV1LLi*V1LLi", "") 119BUILTIN(__builtin_ia32_vec_init_v2si, "V2iii", "") 120BUILTIN(__builtin_ia32_vec_init_v4hi, "V4sssss", "") 121BUILTIN(__builtin_ia32_vec_init_v8qi, "V8ccccccccc", "") 122BUILTIN(__builtin_ia32_vec_ext_v2si, "iV2ii", "") 123 124// MMX2 (MMX+SSE) intrinsics 125BUILTIN(__builtin_ia32_cvtpi2ps, "V4fV4fV2i", "") 126BUILTIN(__builtin_ia32_cvtps2pi, "V2iV4f", "") 127BUILTIN(__builtin_ia32_cvttps2pi, "V2iV4f", "") 128BUILTIN(__builtin_ia32_pavgb, "V8cV8cV8c", "") 129BUILTIN(__builtin_ia32_pavgw, "V4sV4sV4s", "") 130BUILTIN(__builtin_ia32_pmaxsw, "V4sV4sV4s", "") 131BUILTIN(__builtin_ia32_pmaxub, "V8cV8cV8c", "") 132BUILTIN(__builtin_ia32_pminsw, "V4sV4sV4s", "") 133BUILTIN(__builtin_ia32_pminub, "V8cV8cV8c", "") 134BUILTIN(__builtin_ia32_pmovmskb, "iV8c", "") 135BUILTIN(__builtin_ia32_pmulhuw, "V4sV4sV4s", "") 136BUILTIN(__builtin_ia32_psadbw, "V4sV8cV8c", "") 137BUILTIN(__builtin_ia32_pshufw, "V4sV4sIc", "") 138 139// MMX+SSE2 140BUILTIN(__builtin_ia32_cvtpd2pi, "V2iV2d", "") 141BUILTIN(__builtin_ia32_cvtpi2pd, "V2dV2i", "") 142BUILTIN(__builtin_ia32_cvttpd2pi, "V2iV2d", "") 143BUILTIN(__builtin_ia32_paddq, "V1LLiV1LLiV1LLi", "") 144BUILTIN(__builtin_ia32_pmuludq, "V1LLiV2iV2i", "") 145BUILTIN(__builtin_ia32_psubq, "V1LLiV1LLiV1LLi", "") 146 147// MMX+SSSE3 148BUILTIN(__builtin_ia32_pabsb, "V8cV8c", "") 149BUILTIN(__builtin_ia32_pabsd, "V2iV2i", "") 150BUILTIN(__builtin_ia32_pabsw, "V4sV4s", "") 151BUILTIN(__builtin_ia32_palignr, "V8cV8cV8cIc", "") 152BUILTIN(__builtin_ia32_phaddd, "V2iV2iV2i", "") 153BUILTIN(__builtin_ia32_phaddsw, "V4sV4sV4s", "") 154BUILTIN(__builtin_ia32_phaddw, "V4sV4sV4s", "") 155BUILTIN(__builtin_ia32_phsubd, "V2iV2iV2i", "") 156BUILTIN(__builtin_ia32_phsubsw, "V4sV4sV4s", "") 157BUILTIN(__builtin_ia32_phsubw, "V4sV4sV4s", "") 158BUILTIN(__builtin_ia32_pmaddubsw, "V8cV8cV8c", "") 159BUILTIN(__builtin_ia32_pmulhrsw, "V4sV4sV4s", "") 160BUILTIN(__builtin_ia32_pshufb, "V8cV8cV8c", "") 161BUILTIN(__builtin_ia32_psignw, "V4sV4sV4s", "") 162BUILTIN(__builtin_ia32_psignb, "V8cV8cV8c", "") 163BUILTIN(__builtin_ia32_psignd, "V2iV2iV2i", "") 164 165// SSE intrinsics. 166BUILTIN(__builtin_ia32_comieq, "iV4fV4f", "") 167BUILTIN(__builtin_ia32_comilt, "iV4fV4f", "") 168BUILTIN(__builtin_ia32_comile, "iV4fV4f", "") 169BUILTIN(__builtin_ia32_comigt, "iV4fV4f", "") 170BUILTIN(__builtin_ia32_comige, "iV4fV4f", "") 171BUILTIN(__builtin_ia32_comineq, "iV4fV4f", "") 172BUILTIN(__builtin_ia32_ucomieq, "iV4fV4f", "") 173BUILTIN(__builtin_ia32_ucomilt, "iV4fV4f", "") 174BUILTIN(__builtin_ia32_ucomile, "iV4fV4f", "") 175BUILTIN(__builtin_ia32_ucomigt, "iV4fV4f", "") 176BUILTIN(__builtin_ia32_ucomige, "iV4fV4f", "") 177BUILTIN(__builtin_ia32_ucomineq, "iV4fV4f", "") 178BUILTIN(__builtin_ia32_comisdeq, "iV2dV2d", "") 179BUILTIN(__builtin_ia32_comisdlt, "iV2dV2d", "") 180BUILTIN(__builtin_ia32_comisdle, "iV2dV2d", "") 181BUILTIN(__builtin_ia32_comisdgt, "iV2dV2d", "") 182BUILTIN(__builtin_ia32_comisdge, "iV2dV2d", "") 183BUILTIN(__builtin_ia32_comisdneq, "iV2dV2d", "") 184BUILTIN(__builtin_ia32_ucomisdeq, "iV2dV2d", "") 185BUILTIN(__builtin_ia32_ucomisdlt, "iV2dV2d", "") 186BUILTIN(__builtin_ia32_ucomisdle, "iV2dV2d", "") 187BUILTIN(__builtin_ia32_ucomisdgt, "iV2dV2d", "") 188BUILTIN(__builtin_ia32_ucomisdge, "iV2dV2d", "") 189BUILTIN(__builtin_ia32_ucomisdneq, "iV2dV2d", "") 190BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fc", "") 191BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fc", "") 192BUILTIN(__builtin_ia32_minps, "V4fV4fV4f", "") 193BUILTIN(__builtin_ia32_maxps, "V4fV4fV4f", "") 194BUILTIN(__builtin_ia32_minss, "V4fV4fV4f", "") 195BUILTIN(__builtin_ia32_maxss, "V4fV4fV4f", "") 196BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dc", "") 197BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dc", "") 198BUILTIN(__builtin_ia32_minpd, "V2dV2dV2d", "") 199BUILTIN(__builtin_ia32_maxpd, "V2dV2dV2d", "") 200BUILTIN(__builtin_ia32_minsd, "V2dV2dV2d", "") 201BUILTIN(__builtin_ia32_maxsd, "V2dV2dV2d", "") 202BUILTIN(__builtin_ia32_paddsb128, "V16cV16cV16c", "") 203BUILTIN(__builtin_ia32_paddsw128, "V8sV8sV8s", "") 204BUILTIN(__builtin_ia32_psubsb128, "V16cV16cV16c", "") 205BUILTIN(__builtin_ia32_psubsw128, "V8sV8sV8s", "") 206BUILTIN(__builtin_ia32_paddusb128, "V16cV16cV16c", "") 207BUILTIN(__builtin_ia32_paddusw128, "V8sV8sV8s", "") 208BUILTIN(__builtin_ia32_psubusb128, "V16cV16cV16c", "") 209BUILTIN(__builtin_ia32_psubusw128, "V8sV8sV8s", "") 210BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s", "") 211BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c", "") 212BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s", "") 213BUILTIN(__builtin_ia32_pcmpeqb128, "V16cV16cV16c", "") 214BUILTIN(__builtin_ia32_pcmpeqw128, "V8sV8sV8s", "") 215BUILTIN(__builtin_ia32_pcmpeqd128, "V4iV4iV4i", "") 216BUILTIN(__builtin_ia32_pcmpgtb128, "V16cV16cV16c", "") 217BUILTIN(__builtin_ia32_pcmpgtw128, "V8sV8sV8s", "") 218BUILTIN(__builtin_ia32_pcmpgtd128, "V4iV4iV4i", "") 219BUILTIN(__builtin_ia32_pmaxub128, "V16cV16cV16c", "") 220BUILTIN(__builtin_ia32_pmaxsw128, "V8sV8sV8s", "") 221BUILTIN(__builtin_ia32_pminub128, "V16cV16cV16c", "") 222BUILTIN(__builtin_ia32_pminsw128, "V8sV8sV8s", "") 223BUILTIN(__builtin_ia32_packsswb128, "V8sV8sV8s", "") 224BUILTIN(__builtin_ia32_packssdw128, "V4iV4iV4i", "") 225BUILTIN(__builtin_ia32_packuswb128, "V8sV8sV8s", "") 226BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "") 227BUILTIN(__builtin_ia32_addsubps, "V4fV4fV4f", "") 228BUILTIN(__builtin_ia32_addsubpd, "V2dV2dV2d", "") 229BUILTIN(__builtin_ia32_haddps, "V4fV4fV4f", "") 230BUILTIN(__builtin_ia32_haddpd, "V2dV2dV2d", "") 231BUILTIN(__builtin_ia32_hsubps, "V4fV4fV4f", "") 232BUILTIN(__builtin_ia32_hsubpd, "V2dV2dV2d", "") 233BUILTIN(__builtin_ia32_phaddw128, "V8sV8sV8s", "") 234BUILTIN(__builtin_ia32_phaddd128, "V4iV4iV4i", "") 235BUILTIN(__builtin_ia32_phaddsw128, "V8sV8sV8s", "") 236BUILTIN(__builtin_ia32_phsubw128, "V8sV8sV8s", "") 237BUILTIN(__builtin_ia32_phsubd128, "V4iV4iV4i", "") 238BUILTIN(__builtin_ia32_phsubsw128, "V8sV8sV8s", "") 239BUILTIN(__builtin_ia32_pmaddubsw128, "V16cV16cV16c", "") 240BUILTIN(__builtin_ia32_pmulhrsw128, "V8sV8sV8s", "") 241BUILTIN(__builtin_ia32_pshufb128, "V16cV16cV16c", "") 242BUILTIN(__builtin_ia32_psignb128, "V16cV16cV16c", "") 243BUILTIN(__builtin_ia32_psignw128, "V8sV8sV8s", "") 244BUILTIN(__builtin_ia32_psignd128, "V4iV4iV4i", "") 245BUILTIN(__builtin_ia32_pabsb128, "V16cV16c", "") 246BUILTIN(__builtin_ia32_pabsw128, "V8sV8s", "") 247BUILTIN(__builtin_ia32_pabsd128, "V4iV4i", "") 248BUILTIN(__builtin_ia32_ldmxcsr, "vUi", "") 249BUILTIN(__builtin_ia32_stmxcsr, "Ui", "") 250BUILTIN(__builtin_ia32_cvtss2si, "iV4f", "") 251BUILTIN(__builtin_ia32_cvtss2si64, "LLiV4f", "") 252BUILTIN(__builtin_ia32_storeups, "vf*V4f", "") 253BUILTIN(__builtin_ia32_storehps, "vV2i*V4f", "") 254BUILTIN(__builtin_ia32_storelps, "vV2i*V4f", "") 255BUILTIN(__builtin_ia32_movmskps, "iV4f", "") 256BUILTIN(__builtin_ia32_movntps, "vf*V4f", "") 257BUILTIN(__builtin_ia32_sfence, "v", "") 258BUILTIN(__builtin_ia32_rcpps, "V4fV4f", "") 259BUILTIN(__builtin_ia32_rcpss, "V4fV4f", "") 260BUILTIN(__builtin_ia32_rsqrtps, "V4fV4f", "") 261BUILTIN(__builtin_ia32_rsqrtss, "V4fV4f", "") 262BUILTIN(__builtin_ia32_sqrtps, "V4fV4f", "") 263BUILTIN(__builtin_ia32_sqrtss, "V4fV4f", "") 264BUILTIN(__builtin_ia32_maskmovdqu, "vV16cV16cc*", "") 265BUILTIN(__builtin_ia32_storeupd, "vd*V2d", "") 266BUILTIN(__builtin_ia32_movmskpd, "iV2d", "") 267BUILTIN(__builtin_ia32_pmovmskb128, "iV16c", "") 268BUILTIN(__builtin_ia32_movnti, "vi*i", "") 269BUILTIN(__builtin_ia32_movntpd, "vd*V2d", "") 270BUILTIN(__builtin_ia32_movntdq, "vV2LLi*V2LLi", "") 271BUILTIN(__builtin_ia32_psadbw128, "V2LLiV16cV16c", "") 272BUILTIN(__builtin_ia32_sqrtpd, "V2dV2d", "") 273BUILTIN(__builtin_ia32_sqrtsd, "V2dV2d", "") 274BUILTIN(__builtin_ia32_cvtdq2pd, "V2dV4i", "") 275BUILTIN(__builtin_ia32_cvtdq2ps, "V4fV4i", "") 276BUILTIN(__builtin_ia32_cvtpd2dq, "V2LLiV2d", "") 277BUILTIN(__builtin_ia32_cvtpd2ps, "V4fV2d", "") 278BUILTIN(__builtin_ia32_cvttpd2dq, "V4iV2d", "") 279BUILTIN(__builtin_ia32_cvtsd2si, "iV2d", "") 280BUILTIN(__builtin_ia32_cvtsd2si64, "LLiV2d", "") 281BUILTIN(__builtin_ia32_cvtps2dq, "V4iV4f", "") 282BUILTIN(__builtin_ia32_cvtps2pd, "V2dV4f", "") 283BUILTIN(__builtin_ia32_cvttps2dq, "V4iV4f", "") 284BUILTIN(__builtin_ia32_clflush, "vvC*", "") 285BUILTIN(__builtin_ia32_lfence, "v", "") 286BUILTIN(__builtin_ia32_mfence, "v", "") 287BUILTIN(__builtin_ia32_storedqu, "vc*V16c", "") 288BUILTIN(__builtin_ia32_pmuludq128, "V2LLiV4iV4i", "") 289BUILTIN(__builtin_ia32_psraw128, "V8sV8sV8s", "") 290BUILTIN(__builtin_ia32_psrad128, "V4iV4iV4i", "") 291BUILTIN(__builtin_ia32_psrlw128, "V8sV8sV8s", "") 292BUILTIN(__builtin_ia32_psrld128, "V4iV4iV4i", "") 293BUILTIN(__builtin_ia32_pslldqi128, "V2LLiV2LLiIi", "") 294BUILTIN(__builtin_ia32_psrldqi128, "V2LLiV2LLiIi", "") 295BUILTIN(__builtin_ia32_psrlq128, "V2LLiV2LLiV2LLi", "") 296BUILTIN(__builtin_ia32_psllw128, "V8sV8sV8s", "") 297BUILTIN(__builtin_ia32_pslld128, "V4iV4iV4i", "") 298BUILTIN(__builtin_ia32_psllq128, "V2LLiV2LLiV2LLi", "") 299BUILTIN(__builtin_ia32_psllwi128, "V8sV8si", "") 300BUILTIN(__builtin_ia32_pslldi128, "V4iV4ii", "") 301BUILTIN(__builtin_ia32_psllqi128, "V2LLiV2LLii", "") 302BUILTIN(__builtin_ia32_psrlwi128, "V8sV8si", "") 303BUILTIN(__builtin_ia32_psrldi128, "V4iV4ii", "") 304BUILTIN(__builtin_ia32_psrlqi128, "V2LLiV2LLii", "") 305BUILTIN(__builtin_ia32_psrawi128, "V8sV8si", "") 306BUILTIN(__builtin_ia32_psradi128, "V4iV4ii", "") 307BUILTIN(__builtin_ia32_pmaddwd128, "V8sV8sV8s", "") 308BUILTIN(__builtin_ia32_monitor, "vv*UiUi", "") 309BUILTIN(__builtin_ia32_mwait, "vUiUi", "") 310BUILTIN(__builtin_ia32_lddqu, "V16ccC*", "") 311BUILTIN(__builtin_ia32_palignr128, "V16cV16cV16cIc", "") // FIXME: Correct type? 312BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fi", "") 313 314BUILTIN(__builtin_ia32_storelv4si, "vV2i*V2LLi", "") 315 316BUILTIN(__builtin_ia32_pblendvb128, "V16cV16cV16cV16c", "") 317BUILTIN(__builtin_ia32_pblendw128, "V8sV8sV8si", "") 318BUILTIN(__builtin_ia32_blendpd, "V2dV2dV2di", "") 319BUILTIN(__builtin_ia32_blendps, "V4fV4fV4fi", "") 320BUILTIN(__builtin_ia32_blendvpd, "V2dV2dV2dV2d", "") 321BUILTIN(__builtin_ia32_blendvps, "V4fV4fV4fV4f", "") 322 323BUILTIN(__builtin_ia32_packusdw128, "V8sV4iV4i", "") 324BUILTIN(__builtin_ia32_pmaxsb128, "V16cV16cV16c", "") 325BUILTIN(__builtin_ia32_pmaxsd128, "V4iV4iV4i", "") 326BUILTIN(__builtin_ia32_pmaxud128, "V4iV4iV4i", "") 327BUILTIN(__builtin_ia32_pmaxuw128, "V8sV8sV8s", "") 328BUILTIN(__builtin_ia32_pminsb128, "V16cV16cV16c", "") 329BUILTIN(__builtin_ia32_pminsd128, "V4iV4iV4i", "") 330BUILTIN(__builtin_ia32_pminud128, "V4iV4iV4i", "") 331BUILTIN(__builtin_ia32_pminuw128, "V8sV8sV8s", "") 332BUILTIN(__builtin_ia32_pmovsxbd128, "V4iV16c", "") 333BUILTIN(__builtin_ia32_pmovsxbq128, "V2LLiV16c", "") 334BUILTIN(__builtin_ia32_pmovsxbw128, "V8sV16c", "") 335BUILTIN(__builtin_ia32_pmovsxdq128, "V2LLiV4i", "") 336BUILTIN(__builtin_ia32_pmovsxwd128, "V4iV8s", "") 337BUILTIN(__builtin_ia32_pmovsxwq128, "V2LLiV8s", "") 338BUILTIN(__builtin_ia32_pmovzxbd128, "V4iV16c", "") 339BUILTIN(__builtin_ia32_pmovzxbq128, "V2LLiV16c", "") 340BUILTIN(__builtin_ia32_pmovzxbw128, "V8sV16c", "") 341BUILTIN(__builtin_ia32_pmovzxdq128, "V2LLiV4i", "") 342BUILTIN(__builtin_ia32_pmovzxwd128, "V4iV8s", "") 343BUILTIN(__builtin_ia32_pmovzxwq128, "V2LLiV8s", "") 344BUILTIN(__builtin_ia32_pmuldq128, "V2LLiV4iV4i", "") 345BUILTIN(__builtin_ia32_pmulld128, "V4iV4iV4i", "") 346BUILTIN(__builtin_ia32_roundps, "V4fV4fi", "") 347BUILTIN(__builtin_ia32_roundss, "V4fV4fV4fi", "") 348BUILTIN(__builtin_ia32_roundsd, "V2dV2dV2di", "") 349BUILTIN(__builtin_ia32_roundpd, "V2dV2di", "") 350BUILTIN(__builtin_ia32_dpps, "V4fV4fV4fi", "") 351BUILTIN(__builtin_ia32_dppd, "V2dV2dV2di", "") 352BUILTIN(__builtin_ia32_movntdqa, "V2LLiV2LLi*", "") 353BUILTIN(__builtin_ia32_ptestz128, "iV2LLiV2LLi", "") 354BUILTIN(__builtin_ia32_ptestc128, "iV2LLiV2LLi", "") 355BUILTIN(__builtin_ia32_ptestnzc128, "iV2LLiV2LLi", "") 356BUILTIN(__builtin_ia32_pcmpeqq, "V2LLiV2LLiV2LLi", "") 357BUILTIN(__builtin_ia32_mpsadbw128, "V16cV16cV16ci", "") 358 359// SSE 4.2 360BUILTIN(__builtin_ia32_pcmpistrm128, "V16cV16cV16cc", "") 361BUILTIN(__builtin_ia32_pcmpistri128, "iV16cV16cc", "") 362BUILTIN(__builtin_ia32_pcmpestrm128, "V16cV16ciV16cic", "") 363BUILTIN(__builtin_ia32_pcmpestri128, "iV16ciV16cic","") 364 365BUILTIN(__builtin_ia32_pcmpistria128, "iV16ciV16cic","") 366BUILTIN(__builtin_ia32_pcmpistric128, "iV16ciV16cic","") 367BUILTIN(__builtin_ia32_pcmpistrio128, "iV16ciV16cic","") 368BUILTIN(__builtin_ia32_pcmpistris128, "iV16ciV16cic","") 369BUILTIN(__builtin_ia32_pcmpistriz128, "iV16ciV16cic","") 370 371BUILTIN(__builtin_ia32_pcmpestria128, "iV16ciV16cic","") 372BUILTIN(__builtin_ia32_pcmpestric128, "iV16ciV16cic","") 373BUILTIN(__builtin_ia32_pcmpestrio128, "iV16ciV16cic","") 374BUILTIN(__builtin_ia32_pcmpestris128, "iV16ciV16cic","") 375BUILTIN(__builtin_ia32_pcmpestriz128, "iV16ciV16cic","") 376 377BUILTIN(__builtin_ia32_pcmpgtq, "V2LLiV2LLiV2LLi", "") 378 379BUILTIN(__builtin_ia32_crc32qi, "UiUiUc", "") 380BUILTIN(__builtin_ia32_crc32hi, "UiUiUs", "") 381BUILTIN(__builtin_ia32_crc32si, "UiUiUi", "") 382BUILTIN(__builtin_ia32_crc32di, "ULLiULLiULLi", "") 383 384// AES 385BUILTIN(__builtin_ia32_aesenc128, "V2LLiV2LLiV2LLi", "") 386BUILTIN(__builtin_ia32_aesenclast128, "V2LLiV2LLiV2LLi", "") 387BUILTIN(__builtin_ia32_aesdec128, "V2LLiV2LLiV2LLi", "") 388BUILTIN(__builtin_ia32_aesdeclast128, "V2LLiV2LLiV2LLi", "") 389BUILTIN(__builtin_ia32_aesimc128, "V2LLiV2LLi", "") 390BUILTIN(__builtin_ia32_aeskeygenassist128, "V2LLiV2LLic", "") 391 392// AVX 393BUILTIN(__builtin_ia32_addsubpd256, "V4dV4dV4d", "") 394BUILTIN(__builtin_ia32_addsubps256, "V8fV8fV8f", "") 395BUILTIN(__builtin_ia32_haddpd256, "V4dV4dV4d", "") 396BUILTIN(__builtin_ia32_hsubps256, "V8fV8fV8f", "") 397BUILTIN(__builtin_ia32_hsubpd256, "V4dV4dV4d", "") 398BUILTIN(__builtin_ia32_haddps256, "V8fV8fV8f", "") 399BUILTIN(__builtin_ia32_maxpd256, "V4dV4dV4d", "") 400BUILTIN(__builtin_ia32_maxps256, "V8fV8fV8f", "") 401BUILTIN(__builtin_ia32_minpd256, "V4dV4dV4d", "") 402BUILTIN(__builtin_ia32_minps256, "V8fV8fV8f", "") 403BUILTIN(__builtin_ia32_vpermilvarpd, "V2dV2dV2LLi", "") 404BUILTIN(__builtin_ia32_vpermilvarps, "V4fV4fV4i", "") 405BUILTIN(__builtin_ia32_vpermilvarpd256, "V4dV4dV4LLi", "") 406BUILTIN(__builtin_ia32_vpermilvarps256, "V8fV8fV8i", "") 407BUILTIN(__builtin_ia32_blendpd256, "V4dV4dV4di", "") 408BUILTIN(__builtin_ia32_blendps256, "V8fV8fV8fi", "") 409BUILTIN(__builtin_ia32_blendvpd256, "V4dV4dV4dV4d", "") 410BUILTIN(__builtin_ia32_blendvps256, "V8fV8fV8fV8f", "") 411BUILTIN(__builtin_ia32_dpps256, "V8fV8fV8fi", "") 412BUILTIN(__builtin_ia32_cmppd256, "V4dV4dV4dc", "") 413BUILTIN(__builtin_ia32_cmpps256, "V8fV8fV8fc", "") 414BUILTIN(__builtin_ia32_vextractf128_pd256, "V2dV4dc", "") 415BUILTIN(__builtin_ia32_vextractf128_ps256, "V4fV8fc", "") 416BUILTIN(__builtin_ia32_vextractf128_si256, "V4iV8ic", "") 417BUILTIN(__builtin_ia32_cvtdq2pd256, "V4dV4i", "") 418BUILTIN(__builtin_ia32_cvtdq2ps256, "V8fV8i", "") 419BUILTIN(__builtin_ia32_cvtpd2ps256, "V4fV4d", "") 420BUILTIN(__builtin_ia32_cvtps2dq256, "V8iV8f", "") 421BUILTIN(__builtin_ia32_cvtps2pd256, "V4dV4f", "") 422BUILTIN(__builtin_ia32_cvttpd2dq256, "V4iV4d", "") 423BUILTIN(__builtin_ia32_cvtpd2dq256, "V4iV4d", "") 424BUILTIN(__builtin_ia32_cvttps2dq256, "V8iV8f", "") 425BUILTIN(__builtin_ia32_vperm2f128_pd256, "V4dV4dV4dc", "") 426BUILTIN(__builtin_ia32_vperm2f128_ps256, "V8fV8fV8fc", "") 427BUILTIN(__builtin_ia32_vperm2f128_si256, "V8iV8iV8ic", "") 428BUILTIN(__builtin_ia32_vpermilpd, "V2dV2dc", "") 429BUILTIN(__builtin_ia32_vpermilps, "V4fV4fc", "") 430BUILTIN(__builtin_ia32_vpermilpd256, "V4dV4dc", "") 431BUILTIN(__builtin_ia32_vpermilps256, "V8fV8fc", "") 432BUILTIN(__builtin_ia32_vinsertf128_pd256, "V4dV4dV2dc", "") 433BUILTIN(__builtin_ia32_vinsertf128_ps256, "V8fV8fV4fc", "") 434BUILTIN(__builtin_ia32_vinsertf128_si256, "V8iV8iV4ic", "") 435BUILTIN(__builtin_ia32_sqrtpd256, "V4dV4d", "") 436BUILTIN(__builtin_ia32_sqrtps256, "V8fV8f", "") 437BUILTIN(__builtin_ia32_rsqrtps256, "V8fV8f", "") 438BUILTIN(__builtin_ia32_rcpps256, "V8fV8f", "") 439BUILTIN(__builtin_ia32_roundpd256, "V4dV4di", "") 440BUILTIN(__builtin_ia32_roundps256, "V8fV8fi", "") 441BUILTIN(__builtin_ia32_vtestzpd, "iV2dV2d", "") 442BUILTIN(__builtin_ia32_vtestcpd, "iV2dV2d", "") 443BUILTIN(__builtin_ia32_vtestnzcpd, "iV2dV2d", "") 444BUILTIN(__builtin_ia32_vtestzps, "iV4fV4f", "") 445BUILTIN(__builtin_ia32_vtestcps, "iV4fV4f", "") 446BUILTIN(__builtin_ia32_vtestnzcps, "iV4fV4f", "") 447BUILTIN(__builtin_ia32_vtestzpd256, "iV4dV4d", "") 448BUILTIN(__builtin_ia32_vtestcpd256, "iV4dV4d", "") 449BUILTIN(__builtin_ia32_vtestnzcpd256, "iV4dV4d", "") 450BUILTIN(__builtin_ia32_vtestzps256, "iV8fV8f", "") 451BUILTIN(__builtin_ia32_vtestcps256, "iV8fV8f", "") 452BUILTIN(__builtin_ia32_vtestnzcps256, "iV8fV8f", "") 453BUILTIN(__builtin_ia32_ptestz256, "iV4LLiV4LLi", "") 454BUILTIN(__builtin_ia32_ptestc256, "iV4LLiV4LLi", "") 455BUILTIN(__builtin_ia32_ptestnzc256, "iV4LLiV4LLi", "") 456BUILTIN(__builtin_ia32_movmskpd256, "iV4d", "") 457BUILTIN(__builtin_ia32_movmskps256, "iV8f", "") 458BUILTIN(__builtin_ia32_vzeroall, "v", "") 459BUILTIN(__builtin_ia32_vzeroupper, "v", "") 460BUILTIN(__builtin_ia32_vbroadcastss, "V4ffC*", "") 461BUILTIN(__builtin_ia32_vbroadcastsd256, "V4ddC*", "") 462BUILTIN(__builtin_ia32_vbroadcastss256, "V8ffC*", "") 463BUILTIN(__builtin_ia32_vbroadcastf128_pd256, "V4dV2dC*", "") 464BUILTIN(__builtin_ia32_vbroadcastf128_ps256, "V8fV4fC*", "") 465BUILTIN(__builtin_ia32_loadupd256, "V4ddC*", "") 466BUILTIN(__builtin_ia32_loadups256, "V8ffC*", "") 467BUILTIN(__builtin_ia32_storeupd256, "vd*V4d", "") 468BUILTIN(__builtin_ia32_storeups256, "vf*V8f", "") 469BUILTIN(__builtin_ia32_loaddqu256, "V32ccC*", "") 470BUILTIN(__builtin_ia32_storedqu256, "vc*V32c", "") 471BUILTIN(__builtin_ia32_lddqu256, "V32ccC*", "") 472BUILTIN(__builtin_ia32_movntdq256, "vV4LLi*V4LLi", "") 473BUILTIN(__builtin_ia32_movntpd256, "vd*V4d", "") 474BUILTIN(__builtin_ia32_movntps256, "vf*V8f", "") 475BUILTIN(__builtin_ia32_maskloadpd, "V2dV2dC*V2d", "") 476BUILTIN(__builtin_ia32_maskloadps, "V4fV4fC*V4f", "") 477BUILTIN(__builtin_ia32_maskloadpd256, "V4dV4dC*V4d", "") 478BUILTIN(__builtin_ia32_maskloadps256, "V8fV8fC*V8f", "") 479BUILTIN(__builtin_ia32_maskstorepd, "vV2d*V2dV2d", "") 480BUILTIN(__builtin_ia32_maskstoreps, "vV4f*V4fV4f", "") 481BUILTIN(__builtin_ia32_maskstorepd256, "vV4d*V4dV4d", "") 482BUILTIN(__builtin_ia32_maskstoreps256, "vV8f*V8fV8f", "") 483 484#undef BUILTIN 485