BuiltinsX86.def revision 194179
1//===--- BuiltinsX86.def - X86 Builtin function database --------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86-specific builtin function database. Users of 11// this file must define the BUILTIN macro to make use of this information. 12// 13//===----------------------------------------------------------------------===// 14 15// The format of this database matches clang/Basic/Builtins.def. 16 17// FIXME: In GCC, these builtins are defined depending on whether support for 18// MMX/SSE/etc is turned on. We should do this too. 19 20// FIXME: Ideally we would be able to pull this information from what 21// LLVM already knows about X86 builtins. We need to match the LLVM 22// definition anyway, since code generation will lower to the 23// intrinsic if one exists. 24 25BUILTIN(__builtin_ia32_emms , "v", "") 26 27// FIXME: Are these nothrow/const? 28 29// SSE intrinsics. 30BUILTIN(__builtin_ia32_comieq, "iV4fV4f", "") 31BUILTIN(__builtin_ia32_comilt, "iV4fV4f", "") 32BUILTIN(__builtin_ia32_comile, "iV4fV4f", "") 33BUILTIN(__builtin_ia32_comigt, "iV4fV4f", "") 34BUILTIN(__builtin_ia32_comige, "iV4fV4f", "") 35BUILTIN(__builtin_ia32_comineq, "iV4fV4f", "") 36BUILTIN(__builtin_ia32_ucomieq, "iV4fV4f", "") 37BUILTIN(__builtin_ia32_ucomilt, "iV4fV4f", "") 38BUILTIN(__builtin_ia32_ucomile, "iV4fV4f", "") 39BUILTIN(__builtin_ia32_ucomigt, "iV4fV4f", "") 40BUILTIN(__builtin_ia32_ucomige, "iV4fV4f", "") 41BUILTIN(__builtin_ia32_ucomineq, "iV4fV4f", "") 42BUILTIN(__builtin_ia32_comisdeq, "iV2dV2d", "") 43BUILTIN(__builtin_ia32_comisdlt, "iV2dV2d", "") 44BUILTIN(__builtin_ia32_comisdle, "iV2dV2d", "") 45BUILTIN(__builtin_ia32_comisdgt, "iV2dV2d", "") 46BUILTIN(__builtin_ia32_comisdge, "iV2dV2d", "") 47BUILTIN(__builtin_ia32_comisdneq, "iV2dV2d", "") 48BUILTIN(__builtin_ia32_ucomisdeq, "iV2dV2d", "") 49BUILTIN(__builtin_ia32_ucomisdlt, "iV2dV2d", "") 50BUILTIN(__builtin_ia32_ucomisdle, "iV2dV2d", "") 51BUILTIN(__builtin_ia32_ucomisdgt, "iV2dV2d", "") 52BUILTIN(__builtin_ia32_ucomisdge, "iV2dV2d", "") 53BUILTIN(__builtin_ia32_ucomisdneq, "iV2dV2d", "") 54BUILTIN(__builtin_ia32_cmpps, "V4fV4fV4fc", "") 55BUILTIN(__builtin_ia32_cmpss, "V4fV4fV4fc", "") 56BUILTIN(__builtin_ia32_minps, "V4fV4fV4f", "") 57BUILTIN(__builtin_ia32_maxps, "V4fV4fV4f", "") 58BUILTIN(__builtin_ia32_minss, "V4fV4fV4f", "") 59BUILTIN(__builtin_ia32_maxss, "V4fV4fV4f", "") 60BUILTIN(__builtin_ia32_paddsb, "V8cV8cV8c", "") 61BUILTIN(__builtin_ia32_paddsw, "V4sV4sV4s", "") 62BUILTIN(__builtin_ia32_psubsb, "V8cV8cV8c", "") 63BUILTIN(__builtin_ia32_psubsw, "V4sV4sV4s", "") 64BUILTIN(__builtin_ia32_paddusb, "V8cV8cV8c", "") 65BUILTIN(__builtin_ia32_paddusw, "V4sV4sV4s", "") 66BUILTIN(__builtin_ia32_psubusb, "V8cV8cV8c", "") 67BUILTIN(__builtin_ia32_psubusw, "V4sV4sV4s", "") 68BUILTIN(__builtin_ia32_pmulhw, "V4sV4sV4s", "") 69BUILTIN(__builtin_ia32_pmulhuw, "V4sV4sV4s", "") 70BUILTIN(__builtin_ia32_pavgb, "V8cV8cV8c", "") 71BUILTIN(__builtin_ia32_pavgw, "V4sV4sV4s", "") 72BUILTIN(__builtin_ia32_pcmpeqb, "V8cV8cV8c", "") 73BUILTIN(__builtin_ia32_pcmpeqw, "V4sV4sV4s", "") 74BUILTIN(__builtin_ia32_pcmpeqd, "V2iV2iV2i", "") 75BUILTIN(__builtin_ia32_pcmpgtb, "V8cV8cV8c", "") 76BUILTIN(__builtin_ia32_pcmpgtw, "V4sV4sV4s", "") 77BUILTIN(__builtin_ia32_pcmpgtd, "V2iV2iV2i", "") 78BUILTIN(__builtin_ia32_pmaxub, "V8cV8cV8c", "") 79BUILTIN(__builtin_ia32_pmaxsw, "V4sV4sV4s", "") 80BUILTIN(__builtin_ia32_pminub, "V8cV8cV8c", "") 81BUILTIN(__builtin_ia32_pminsw, "V4sV4sV4s", "") 82BUILTIN(__builtin_ia32_punpckhbw, "V8cV8cV8c", "") 83BUILTIN(__builtin_ia32_punpckhwd, "V4sV4sV4s", "") 84BUILTIN(__builtin_ia32_punpckhdq, "V2iV2iV2i", "") 85BUILTIN(__builtin_ia32_punpcklbw, "V8cV8cV8c", "") 86BUILTIN(__builtin_ia32_punpcklwd, "V4sV4sV4s", "") 87BUILTIN(__builtin_ia32_punpckldq, "V2iV2iV2i", "") 88BUILTIN(__builtin_ia32_cmppd, "V2dV2dV2dc", "") 89BUILTIN(__builtin_ia32_cmpsd, "V2dV2dV2dc", "") 90BUILTIN(__builtin_ia32_minpd, "V2dV2dV2d", "") 91BUILTIN(__builtin_ia32_maxpd, "V2dV2dV2d", "") 92BUILTIN(__builtin_ia32_minsd, "V2dV2dV2d", "") 93BUILTIN(__builtin_ia32_maxsd, "V2dV2dV2d", "") 94BUILTIN(__builtin_ia32_paddsb128, "V16cV16cV16c", "") 95BUILTIN(__builtin_ia32_paddsw128, "V8sV8sV8s", "") 96BUILTIN(__builtin_ia32_psubsb128, "V16cV16cV16c", "") 97BUILTIN(__builtin_ia32_psubsw128, "V8sV8sV8s", "") 98BUILTIN(__builtin_ia32_paddusb128, "V16cV16cV16c", "") 99BUILTIN(__builtin_ia32_paddusw128, "V8sV8sV8s", "") 100BUILTIN(__builtin_ia32_psubusb128, "V16cV16cV16c", "") 101BUILTIN(__builtin_ia32_psubusw128, "V8sV8sV8s", "") 102BUILTIN(__builtin_ia32_pmullw128, "V8sV8sV8s", "") 103BUILTIN(__builtin_ia32_pmulhw128, "V8sV8sV8s", "") 104BUILTIN(__builtin_ia32_pavgb128, "V16cV16cV16c", "") 105BUILTIN(__builtin_ia32_pavgw128, "V8sV8sV8s", "") 106BUILTIN(__builtin_ia32_pcmpeqb128, "V16cV16cV16c", "") 107BUILTIN(__builtin_ia32_pcmpeqw128, "V8sV8sV8s", "") 108BUILTIN(__builtin_ia32_pcmpeqd128, "V4iV4iV4i", "") 109BUILTIN(__builtin_ia32_pcmpgtb128, "V16cV16cV16c", "") 110BUILTIN(__builtin_ia32_pcmpgtw128, "V8sV8sV8s", "") 111BUILTIN(__builtin_ia32_pcmpgtd128, "V4iV4iV4i", "") 112BUILTIN(__builtin_ia32_pmaxub128, "V16cV16cV16c", "") 113BUILTIN(__builtin_ia32_pmaxsw128, "V8sV8sV8s", "") 114BUILTIN(__builtin_ia32_pminub128, "V16cV16cV16c", "") 115BUILTIN(__builtin_ia32_pminsw128, "V8sV8sV8s", "") 116BUILTIN(__builtin_ia32_packsswb128, "V8sV8sV8s", "") 117BUILTIN(__builtin_ia32_packssdw128, "V4iV4iV4i", "") 118BUILTIN(__builtin_ia32_packuswb128, "V8sV8sV8s", "") 119BUILTIN(__builtin_ia32_pmulhuw128, "V8sV8sV8s", "") 120BUILTIN(__builtin_ia32_addsubps, "V4fV4fV4f", "") 121BUILTIN(__builtin_ia32_addsubpd, "V2dV2dV2d", "") 122BUILTIN(__builtin_ia32_haddps, "V4fV4fV4f", "") 123BUILTIN(__builtin_ia32_haddpd, "V2dV2dV2d", "") 124BUILTIN(__builtin_ia32_hsubps, "V4fV4fV4f", "") 125BUILTIN(__builtin_ia32_hsubpd, "V2dV2dV2d", "") 126BUILTIN(__builtin_ia32_phaddw128, "V8sV8sV8s", "") 127BUILTIN(__builtin_ia32_phaddw, "V4sV4sV4s", "") 128BUILTIN(__builtin_ia32_phaddd128, "V4iV4iV4i", "") 129BUILTIN(__builtin_ia32_phaddd, "V2iV2iV2i", "") 130BUILTIN(__builtin_ia32_phaddsw128, "V8sV8sV8s", "") 131BUILTIN(__builtin_ia32_phaddsw, "V4sV4sV4s", "") 132BUILTIN(__builtin_ia32_phsubw128, "V8sV8sV8s", "") 133BUILTIN(__builtin_ia32_phsubw, "V4sV4sV4s", "") 134BUILTIN(__builtin_ia32_phsubd128, "V4iV4iV4i", "") 135BUILTIN(__builtin_ia32_phsubd, "V2iV2iV2i", "") 136BUILTIN(__builtin_ia32_phsubsw128, "V8sV8sV8s", "") 137BUILTIN(__builtin_ia32_phsubsw, "V4sV4sV4s", "") 138BUILTIN(__builtin_ia32_pmaddubsw128, "V16cV16cV16c", "") 139BUILTIN(__builtin_ia32_pmaddubsw, "V8cV8cV8c", "") 140BUILTIN(__builtin_ia32_pmulhrsw128, "V8sV8sV8s", "") 141BUILTIN(__builtin_ia32_pmulhrsw, "V4sV4sV4s", "") 142BUILTIN(__builtin_ia32_pshufb128, "V16cV16cV16c", "") 143BUILTIN(__builtin_ia32_pshufb, "V8cV8cV8c", "") 144BUILTIN(__builtin_ia32_psignb128, "V16cV16cV16c", "") 145BUILTIN(__builtin_ia32_psignb, "V8cV8cV8c", "") 146BUILTIN(__builtin_ia32_psignw128, "V8sV8sV8s", "") 147BUILTIN(__builtin_ia32_psignw, "V4sV4sV4s", "") 148BUILTIN(__builtin_ia32_psignd128, "V4iV4iV4i", "") 149BUILTIN(__builtin_ia32_psignd, "V2iV2iV2i", "") 150BUILTIN(__builtin_ia32_pabsb128, "V16cV16c", "") 151BUILTIN(__builtin_ia32_pabsb, "V8cV8c", "") 152BUILTIN(__builtin_ia32_pabsw128, "V8sV8s", "") 153BUILTIN(__builtin_ia32_pabsw, "V4sV4s", "") 154BUILTIN(__builtin_ia32_pabsd128, "V4iV4i", "") 155BUILTIN(__builtin_ia32_pabsd, "V2iV2i", "") 156BUILTIN(__builtin_ia32_psllw, "V4sV4sV1LLi", "") 157BUILTIN(__builtin_ia32_pslld, "V2iV2iV1LLi", "") 158BUILTIN(__builtin_ia32_psllq, "V1LLiV1LLiV1LLi", "") 159BUILTIN(__builtin_ia32_psrlw, "V4sV4sV1LLi", "") 160BUILTIN(__builtin_ia32_psrld, "V2iV2iV1LLi", "") 161BUILTIN(__builtin_ia32_psrlq, "V1LLiV1LLiV1LLi", "") 162BUILTIN(__builtin_ia32_psraw, "V4sV4sV1LLi", "") 163BUILTIN(__builtin_ia32_psrad, "V2iV2iV1LLi", "") 164BUILTIN(__builtin_ia32_pmaddwd, "V2iV4sV4s", "") 165BUILTIN(__builtin_ia32_packsswb, "V8cV4sV4s", "") 166BUILTIN(__builtin_ia32_packssdw, "V4sV2iV2i", "") 167BUILTIN(__builtin_ia32_packuswb, "V8cV4sV4s", "") 168BUILTIN(__builtin_ia32_ldmxcsr, "vUi", "") 169BUILTIN(__builtin_ia32_stmxcsr, "Ui", "") 170BUILTIN(__builtin_ia32_cvtpi2ps, "V4fV4fV2i", "") 171BUILTIN(__builtin_ia32_cvtps2pi, "V2iV4f", "") 172BUILTIN(__builtin_ia32_cvtss2si, "iV4f", "") 173BUILTIN(__builtin_ia32_cvtss2si64, "LLiV4f", "") 174BUILTIN(__builtin_ia32_cvttps2pi, "V2iV4f", "") 175BUILTIN(__builtin_ia32_maskmovq, "vV8cV8cc*", "") 176BUILTIN(__builtin_ia32_loadups, "V4ffC*", "") 177BUILTIN(__builtin_ia32_storeups, "vf*V4f", "") 178BUILTIN(__builtin_ia32_storehps, "vV2i*V4f", "") 179BUILTIN(__builtin_ia32_storelps, "vV2i*V4f", "") 180BUILTIN(__builtin_ia32_movmskps, "iV4f", "") 181BUILTIN(__builtin_ia32_pmovmskb, "iV8c", "") 182BUILTIN(__builtin_ia32_movntps, "vf*V4f", "") 183BUILTIN(__builtin_ia32_movntq, "vV1LLi*V1LLi", "") 184BUILTIN(__builtin_ia32_sfence, "v", "") 185BUILTIN(__builtin_ia32_psadbw, "V4sV8cV8c", "") 186BUILTIN(__builtin_ia32_rcpps, "V4fV4f", "") 187BUILTIN(__builtin_ia32_rcpss, "V4fV4f", "") 188BUILTIN(__builtin_ia32_rsqrtps, "V4fV4f", "") 189BUILTIN(__builtin_ia32_rsqrtss, "V4fV4f", "") 190BUILTIN(__builtin_ia32_sqrtps, "V4fV4f", "") 191BUILTIN(__builtin_ia32_sqrtss, "V4fV4f", "") 192BUILTIN(__builtin_ia32_maskmovdqu, "vV16cV16cc*", "") 193BUILTIN(__builtin_ia32_loadupd, "V2ddC*", "") 194BUILTIN(__builtin_ia32_storeupd, "vd*V2d", "") 195BUILTIN(__builtin_ia32_movmskpd, "iV2d", "") 196BUILTIN(__builtin_ia32_pmovmskb128, "iV16c", "") 197BUILTIN(__builtin_ia32_movnti, "vi*i", "") 198BUILTIN(__builtin_ia32_movntpd, "vd*V2d", "") 199BUILTIN(__builtin_ia32_movntdq, "vV2LLi*V2LLi", "") 200BUILTIN(__builtin_ia32_psadbw128, "V2LLiV16cV16c", "") 201BUILTIN(__builtin_ia32_sqrtpd, "V2dV2d", "") 202BUILTIN(__builtin_ia32_sqrtsd, "V2dV2d", "") 203BUILTIN(__builtin_ia32_cvtdq2pd, "V2dV4i", "") 204BUILTIN(__builtin_ia32_cvtdq2ps, "V4fV4i", "") 205BUILTIN(__builtin_ia32_cvtpd2dq, "V2LLiV2d", "") 206BUILTIN(__builtin_ia32_cvtpd2pi, "V2iV2d", "") 207BUILTIN(__builtin_ia32_cvtpd2ps, "V4fV2d", "") 208BUILTIN(__builtin_ia32_cvttpd2dq, "V4iV2d", "") 209BUILTIN(__builtin_ia32_cvttpd2pi, "V2iV2d", "") 210BUILTIN(__builtin_ia32_cvtpi2pd, "V2dV2i", "") 211BUILTIN(__builtin_ia32_cvtsd2si, "iV2d", "") 212BUILTIN(__builtin_ia32_cvtsd2si64, "LLiV2d", "") 213BUILTIN(__builtin_ia32_cvtps2dq, "V4iV4f", "") 214BUILTIN(__builtin_ia32_cvtps2pd, "V2dV4f", "") 215BUILTIN(__builtin_ia32_cvttps2dq, "V4iV4f", "") 216BUILTIN(__builtin_ia32_clflush, "vvC*", "") 217BUILTIN(__builtin_ia32_lfence, "v", "") 218BUILTIN(__builtin_ia32_mfence, "v", "") 219BUILTIN(__builtin_ia32_loaddqu, "V16ccC*", "") 220BUILTIN(__builtin_ia32_storedqu, "vc*V16c", "") 221BUILTIN(__builtin_ia32_psllwi, "V4sV4si", "") 222BUILTIN(__builtin_ia32_pslldi, "V2iV2ii", "") 223BUILTIN(__builtin_ia32_psllqi, "V1LLiV1LLii", "") 224BUILTIN(__builtin_ia32_psrawi, "V4sV4si", "") 225BUILTIN(__builtin_ia32_psradi, "V2iV2ii", "") 226BUILTIN(__builtin_ia32_psrlwi, "V4sV4si", "") 227BUILTIN(__builtin_ia32_psrldi, "V2iV2ii", "") 228BUILTIN(__builtin_ia32_psrlqi, "V1LLiV1LLii", "") 229BUILTIN(__builtin_ia32_pmuludq, "V1LLiV2iV2i", "") 230BUILTIN(__builtin_ia32_pmuludq128, "V2LLiV4iV4i", "") 231BUILTIN(__builtin_ia32_psraw128, "V8sV8sV8s", "") 232BUILTIN(__builtin_ia32_psrad128, "V4iV4iV4i", "") 233BUILTIN(__builtin_ia32_psrlw128, "V8sV8sV8s", "") 234BUILTIN(__builtin_ia32_psrld128, "V4iV4iV4i", "") 235BUILTIN(__builtin_ia32_pslldqi128, "V2LLiV2LLii", "") 236BUILTIN(__builtin_ia32_psrldqi128, "V2LLiV2LLii", "") 237BUILTIN(__builtin_ia32_psrlq128, "V2LLiV2LLiV2LLi", "") 238BUILTIN(__builtin_ia32_psllw128, "V8sV8sV8s", "") 239BUILTIN(__builtin_ia32_pslld128, "V4iV4iV4i", "") 240BUILTIN(__builtin_ia32_psllq128, "V2LLiV2LLiV2LLi", "") 241BUILTIN(__builtin_ia32_psllwi128, "V8sV8si", "") 242BUILTIN(__builtin_ia32_pslldi128, "V4iV4ii", "") 243BUILTIN(__builtin_ia32_psllqi128, "V2LLiV2LLii", "") 244BUILTIN(__builtin_ia32_psrlwi128, "V8sV8si", "") 245BUILTIN(__builtin_ia32_psrldi128, "V4iV4ii", "") 246BUILTIN(__builtin_ia32_psrlqi128, "V2LLiV2LLii", "") 247BUILTIN(__builtin_ia32_psrawi128, "V8sV8si", "") 248BUILTIN(__builtin_ia32_psradi128, "V4iV4ii", "") 249BUILTIN(__builtin_ia32_pmaddwd128, "V8sV8sV8s", "") 250BUILTIN(__builtin_ia32_monitor, "vv*UiUi", "") 251BUILTIN(__builtin_ia32_mwait, "vUiUi", "") 252BUILTIN(__builtin_ia32_lddqu, "V16ccC*", "") 253BUILTIN(__builtin_ia32_palignr128, "V2LLiV2LLiV2LLii", "") 254BUILTIN(__builtin_ia32_palignr, "V1LLiV1LLiV1LLis", "") 255BUILTIN(__builtin_ia32_insertps128, "V4fV4fV4fi", "") 256 257BUILTIN(__builtin_ia32_storelv4si, "vV2i*V2LLi", "") 258 259BUILTIN(__builtin_ia32_pblendvb128, "V16cV16cV16cV16c", "") 260BUILTIN(__builtin_ia32_pblendw128, "V8sV8sV8si", "") 261BUILTIN(__builtin_ia32_blendpd, "V2dV2dV2di", "") 262BUILTIN(__builtin_ia32_blendps, "V4fV4fV4fi", "") 263BUILTIN(__builtin_ia32_blendvpd, "V2dV2dV2dV2d", "") 264BUILTIN(__builtin_ia32_blendvps, "V4fV4fV4fV4f", "") 265 266BUILTIN(__builtin_ia32_packusdw128, "V8sV4iV4i", "") 267BUILTIN(__builtin_ia32_pmaxsb128, "V16cV16cV16c", "") 268BUILTIN(__builtin_ia32_pmaxsd128, "V4iV4iV4i", "") 269BUILTIN(__builtin_ia32_pmaxud128, "V4iV4iV4i", "") 270BUILTIN(__builtin_ia32_pmaxuw128, "V8sV8sV8s", "") 271BUILTIN(__builtin_ia32_pminsb128, "V16cV16cV16c", "") 272BUILTIN(__builtin_ia32_pminsd128, "V4iV4iV4i", "") 273BUILTIN(__builtin_ia32_pminud128, "V4iV4iV4i", "") 274BUILTIN(__builtin_ia32_pminuw128, "V8sV8sV8s", "") 275BUILTIN(__builtin_ia32_pmovsxbd128, "V4iV16c", "") 276BUILTIN(__builtin_ia32_pmovsxbq128, "V2LLiV16c", "") 277BUILTIN(__builtin_ia32_pmovsxbw128, "V8sV16c", "") 278BUILTIN(__builtin_ia32_pmovsxdq128, "V2LLiV4i", "") 279BUILTIN(__builtin_ia32_pmovsxwd128, "V4iV8s", "") 280BUILTIN(__builtin_ia32_pmovsxwq128, "V2LLiV8s", "") 281BUILTIN(__builtin_ia32_pmovzxbd128, "V4iV16c", "") 282BUILTIN(__builtin_ia32_pmovzxbq128, "V2LLiV16c", "") 283BUILTIN(__builtin_ia32_pmovzxbw128, "V8sV16c", "") 284BUILTIN(__builtin_ia32_pmovzxdq128, "V2LLiV4i", "") 285BUILTIN(__builtin_ia32_pmovzxwd128, "V4iV8s", "") 286BUILTIN(__builtin_ia32_pmovzxwq128, "V2LLiV8s", "") 287BUILTIN(__builtin_ia32_pmuldq128, "V2LLiV4iV4i", "") 288BUILTIN(__builtin_ia32_pmulld128, "V4iV4iV4i", "") 289BUILTIN(__builtin_ia32_roundps, "V4fV4fi", "") 290BUILTIN(__builtin_ia32_roundss, "V4fV4fi", "") 291BUILTIN(__builtin_ia32_roundsd, "V2dV2di", "") 292BUILTIN(__builtin_ia32_roundpd, "V2dV2di", "") 293 294 295#undef BUILTIN 296