1130812Smarcel/* Definitions and macros for support of AMD's remote debugger, MiniMON.
2130812Smarcel   Copyright 1990, 1991 Free Software Foundation, Inc.
3130812Smarcel
4130812Smarcel   This file is part of GDB.
5130812Smarcel
6130812Smarcel   This program is free software; you can redistribute it and/or modify
7130812Smarcel   it under the terms of the GNU General Public License as published by
8130812Smarcel   the Free Software Foundation; either version 2 of the License, or
9130812Smarcel   (at your option) any later version.
10130812Smarcel
11130812Smarcel   This program is distributed in the hope that it will be useful,
12130812Smarcel   but WITHOUT ANY WARRANTY; without even the implied warranty of
13130812Smarcel   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14130812Smarcel   GNU General Public License for more details.
15130812Smarcel
16130812Smarcel   You should have received a copy of the GNU General Public License
17130812Smarcel   along with this program; if not, write to the Free Software
18130812Smarcel   Foundation, Inc., 59 Temple Place - Suite 330,
19130812Smarcel   Boston, MA 02111-1307, USA.  */
20130812Smarcel
21130812Smarcel/*
22130812Smarcel * Some basic types.  FIXME, this should be done by declaring bitfield
23130812Smarcel * sizes in the structs.  We can't portably depend on a "long int" being
24130812Smarcel * 32 bits, etc.
25130812Smarcel */
26130812Smarceltypedef long int INT32;		/* 32 bit integer */
27130812Smarceltypedef unsigned long int UINT32;	/* 32 bit integer (unsigned) */
28130812Smarceltypedef unsigned long int ADDR32;	/* 32 bit address */
29130812Smarceltypedef unsigned long int INST32;	/* 32 bit instruction */
30130812Smarceltypedef long int BOOLEAN;	/* Boolean value (32 bit) */
31130812Smarceltypedef unsigned char BYTE;	/* byte (8 bit) */
32130812Smarceltypedef short int INT16;	/* 16 bit integer */
33130812Smarceltypedef unsigned short int UINT16;	/* 16 bit integer (unsigned) */
34130812Smarcel
35130812Smarcel/****************************************************************************/
36130812Smarcel/************************* Message Information ******************************/
37130812Smarcel/****************************************************************************/
38130812Smarcel
39130812Smarcel/*
40130812Smarcel * Error codes
41130812Smarcel */
42130812Smarcel
43130812Smarcel/* General errors */
44130812Smarcel#define EMUSAGE     1		/* Bad args / flags               */
45130812Smarcel#define EMFAIL      2		/* Unrecoverable error            */
46130812Smarcel#define EMBADADDR   3		/* Illegal address                */
47130812Smarcel#define EMBADREG    4		/* Illegal register               */
48130812Smarcel#define EMSYNTAX    5		/* Illegal command syntax         */
49130812Smarcel#define EMACCESS    6		/* Could not access memory        */
50130812Smarcel#define EMALLOC     7		/* Could not allocate memory      */
51130812Smarcel#define EMTARGET    8		/* Unknown target type            */
52130812Smarcel#define EMHINIT     9		/* Could not initialize host      */
53130812Smarcel#define EMCOMM     10		/* Could not open communication channel */
54130812Smarcel
55130812Smarcel/* Message errors */
56130812Smarcel#define EMBADMSG   11		/* Unknown message type           */
57130812Smarcel#define EMMSG2BIG  12		/* Message to large for buffer    */
58130812Smarcel#define EMNOSEND   13		/* Could not send message         */
59130812Smarcel#define EMNORECV   14		/* Could not receive message      */
60130812Smarcel
61130812Smarcel#define EMRESET    15		/* Could not RESET target         */
62130812Smarcel#define EMCONFIG   16		/* Could not get target CONFIG    */
63130812Smarcel#define EMSTATUS   17		/* Could not get target STATUS    */
64130812Smarcel#define EMREAD     18		/* Could not READ target memory   */
65130812Smarcel#define EMWRITE    19		/* Could not WRITE target memory  */
66130812Smarcel#define EMBKPTSET  20		/* Could not set breakpoint       */
67130812Smarcel#define EMBKPTRM   21		/* Could not remove breakpoint    */
68130812Smarcel#define EMBKPTSTAT 22		/* Could not get breakpoint status */
69130812Smarcel#define EMBKPTNONE 23		/* All breakpoints in use         */
70130812Smarcel#define EMBKPTUSED 24		/* Breakpoints already in use     */
71130812Smarcel#define EMCOPY     25		/* Could not COPY target memory   */
72130812Smarcel#define EMFILL     26		/* Could not FILL target memory   */
73130812Smarcel#define EMINIT     27		/* Could not initialize target memory */
74130812Smarcel#define EMGO       28		/* Could not start execution      */
75130812Smarcel#define EMSTEP     29		/* Could not single step          */
76130812Smarcel#define EMBREAK    30		/* Could not BREAK                */
77130812Smarcel#define EMHIF      31		/* Could not perform HIF service  */
78130812Smarcel#define EMCHANNEL0 32		/* Could not read CHANNEL0        */
79130812Smarcel#define EMCHANNEL1 33		/* Could not write CHANNEL1       */
80130812Smarcel
81130812Smarcel/* COFF file loader errors */
82130812Smarcel#define EMOPEN     34		/* Could not open COFF file       */
83130812Smarcel#define EMHDR      35		/* Could not read COFF header     */
84130812Smarcel#define EMMAGIC    36		/* Bad magic number               */
85130812Smarcel#define EMAOUT     37		/* Could not read COFF a.out header */
86130812Smarcel#define EMSCNHDR   38		/* Could not read COFF section header */
87130812Smarcel#define EMSCN      39		/* Could not read COFF section    */
88130812Smarcel#define EMCLOSE    40		/* Could not close COFF file      */
89130812Smarcel
90130812Smarcel/* Log file errors */
91130812Smarcel#define EMLOGOPEN  41		/* Could not open log file        */
92130812Smarcel#define EMLOGREAD  42		/* Could not read log file        */
93130812Smarcel#define EMLOGWRITE 43		/* Could not write to log file    */
94130812Smarcel#define EMLOGCLOSE 44		/* Could not close log file       */
95130812Smarcel
96130812Smarcel/* Command file errors */
97130812Smarcel#define EMCMDOPEN  45		/* Could not open command file    */
98130812Smarcel#define EMCMDREAD  46		/* Could not read command file    */
99130812Smarcel#define EMCMDWRITE 47		/* Could not write to command file */
100130812Smarcel#define EMCMDCLOSE 48		/* Could not close comand file    */
101130812Smarcel
102130812Smarcel#define EMTIMEOUT  49		/* Host timed out waiting for a message */
103130812Smarcel#define EMCOMMTYPE 50		/* A '-t' flag must be specified  */
104130812Smarcel#define EMCOMMERR  51		/* Communication error            */
105130812Smarcel#define EMBAUD     52		/* Invalid baud rate specified    */
106130812Smarcel/*
107130812Smarcel * Memory Spaces
108130812Smarcel */
109130812Smarcel#define LOCAL_REG    0		/* Local processor register     */
110130812Smarcel#define GLOBAL_REG   1		/* Global processor register    */
111130812Smarcel#define SPECIAL_REG  2		/* Special processor register   */
112130812Smarcel#define TLB_REG      3		/* Translation Lookaside Buffer */
113130812Smarcel#define COPROC_REG   4		/* Coprocessor register         */
114130812Smarcel#define I_MEM        5		/* Instruction Memory           */
115130812Smarcel#define D_MEM        6		/* Data Memory                  */
116130812Smarcel#define I_ROM        7		/* Instruction ROM              */
117130812Smarcel#define D_ROM        8		/* Data ROM                     */
118130812Smarcel#define I_O          9		/* Input/Output                 */
119130812Smarcel#define I_CACHE     10		/* Instruction Cache            */
120130812Smarcel#define D_CACHE     11		/* Data Cache                   */
121130812Smarcel
122130812Smarcel/* To supress warnings for zero length array definitions */
123130812Smarcel#define DUMMY 1
124130812Smarcel
125130812Smarcel/*
126130812Smarcel   ** Host to target definitions
127130812Smarcel */
128130812Smarcel
129130812Smarcel#define RESET          0
130130812Smarcel#define CONFIG_REQ     1
131130812Smarcel#define STATUS_REQ     2
132130812Smarcel#define READ_REQ       3
133130812Smarcel#define WRITE_REQ      4
134130812Smarcel#define BKPT_SET       5
135130812Smarcel#define BKPT_RM        6
136130812Smarcel#define BKPT_STAT      7
137130812Smarcel#define COPY           8
138130812Smarcel#define FILL           9
139130812Smarcel#define INIT          10
140130812Smarcel#define GO            11
141130812Smarcel#define STEP          12
142130812Smarcel#define BREAK         13
143130812Smarcel
144130812Smarcel#define HIF_CALL_RTN  64
145130812Smarcel#define CHANNEL0      65
146130812Smarcel#define CHANNEL1_ACK  66
147130812Smarcel
148130812Smarcel
149130812Smarcel/*
150130812Smarcel   ** Target to host definitions
151130812Smarcel */
152130812Smarcel
153130812Smarcel#define RESET_ACK     32
154130812Smarcel#define CONFIG        33
155130812Smarcel#define STATUS        34
156130812Smarcel#define READ_ACK      35
157130812Smarcel#define WRITE_ACK     36
158130812Smarcel#define BKPT_SET_ACK  37
159130812Smarcel#define BKPT_RM_ACK   38
160130812Smarcel#define BKPT_STAT_ACK 39
161130812Smarcel#define COPY_ACK      40
162130812Smarcel#define FILL_ACK      41
163130812Smarcel#define INIT_ACK      42
164130812Smarcel#define HALT          43
165130812Smarcel
166130812Smarcel#define ERROR         63
167130812Smarcel
168130812Smarcel#define HIF_CALL      96
169130812Smarcel#define CHANNEL0_ACK  97
170130812Smarcel#define CHANNEL1      98
171130812Smarcel
172130812Smarcel
173130812Smarcel/* A "generic" message */
174130812Smarcelstruct generic_msg_t
175130812Smarcel  {
176130812Smarcel    INT32 code;			/* generic */
177130812Smarcel    INT32 length;
178130812Smarcel    BYTE byte[DUMMY];
179130812Smarcel  };
180130812Smarcel
181130812Smarcel
182130812Smarcel/* A "generic" message (with an INT32 array) */
183130812Smarcelstruct generic_int32_msg_t
184130812Smarcel  {
185130812Smarcel    INT32 code;			/* generic */
186130812Smarcel    INT32 length;
187130812Smarcel    INT32 int32[DUMMY];
188130812Smarcel  };
189130812Smarcel
190130812Smarcel
191130812Smarcel/*
192130812Smarcel   ** Host to target messages
193130812Smarcel */
194130812Smarcel
195130812Smarcelstruct reset_msg_t
196130812Smarcel  {
197130812Smarcel    INT32 code;			/* 0 */
198130812Smarcel    INT32 length;
199130812Smarcel  };
200130812Smarcel
201130812Smarcel
202130812Smarcelstruct config_req_msg_t
203130812Smarcel  {
204130812Smarcel    INT32 code;			/* 1 */
205130812Smarcel    INT32 length;
206130812Smarcel  };
207130812Smarcel
208130812Smarcel
209130812Smarcelstruct status_req_msg_t
210130812Smarcel  {
211130812Smarcel    INT32 code;			/* 2 */
212130812Smarcel    INT32 length;
213130812Smarcel  };
214130812Smarcel
215130812Smarcel
216130812Smarcelstruct read_req_msg_t
217130812Smarcel  {
218130812Smarcel    INT32 code;			/* 3 */
219130812Smarcel    INT32 length;
220130812Smarcel    INT32 memory_space;
221130812Smarcel    ADDR32 address;
222130812Smarcel    INT32 byte_count;
223130812Smarcel  };
224130812Smarcel
225130812Smarcel
226130812Smarcelstruct write_req_msg_t
227130812Smarcel  {
228130812Smarcel    INT32 code;			/* 4 */
229130812Smarcel    INT32 length;
230130812Smarcel    INT32 memory_space;
231130812Smarcel    ADDR32 address;
232130812Smarcel    INT32 byte_count;
233130812Smarcel    BYTE data[DUMMY];
234130812Smarcel  };
235130812Smarcel
236130812Smarcel
237130812Smarcelstruct write_r_msg_t
238130812Smarcel  {
239130812Smarcel    INT32 code;			/* 4 */
240130812Smarcel    INT32 length;
241130812Smarcel    INT32 memory_space;
242130812Smarcel    ADDR32 address;
243130812Smarcel    INT32 byte_count;
244130812Smarcel    INT32 data[DUMMY];
245130812Smarcel  };
246130812Smarcel
247130812Smarcel
248130812Smarcelstruct bkpt_set_msg_t
249130812Smarcel  {
250130812Smarcel    INT32 code;			/* 5 */
251130812Smarcel    INT32 length;
252130812Smarcel    INT32 memory_space;
253130812Smarcel    ADDR32 bkpt_addr;
254130812Smarcel    INT32 pass_count;
255130812Smarcel    INT32 bkpt_type;
256130812Smarcel  };
257130812Smarcel
258130812Smarcel
259130812Smarcelstruct bkpt_rm_msg_t
260130812Smarcel  {
261130812Smarcel    INT32 code;			/* 6 */
262130812Smarcel    INT32 length;
263130812Smarcel    INT32 memory_space;
264130812Smarcel    ADDR32 bkpt_addr;
265130812Smarcel  };
266130812Smarcel
267130812Smarcel
268130812Smarcelstruct bkpt_stat_msg_t
269130812Smarcel  {
270130812Smarcel    INT32 code;			/* 7 */
271130812Smarcel    INT32 length;
272130812Smarcel    INT32 memory_space;
273130812Smarcel    ADDR32 bkpt_addr;
274130812Smarcel  };
275130812Smarcel
276130812Smarcel
277130812Smarcelstruct copy_msg_t
278130812Smarcel  {
279130812Smarcel    INT32 code;			/* 8 */
280130812Smarcel    INT32 length;
281130812Smarcel    INT32 source_space;
282130812Smarcel    ADDR32 source_addr;
283130812Smarcel    INT32 dest_space;
284130812Smarcel    ADDR32 dest_addr;
285130812Smarcel    INT32 byte_count;
286130812Smarcel  };
287130812Smarcel
288130812Smarcel
289130812Smarcelstruct fill_msg_t
290130812Smarcel  {
291130812Smarcel    INT32 code;			/* 9 */
292130812Smarcel    INT32 length;
293130812Smarcel    INT32 memory_space;
294130812Smarcel    ADDR32 start_addr;
295130812Smarcel    INT32 fill_count;
296130812Smarcel    INT32 byte_count;
297130812Smarcel    BYTE fill_data[DUMMY];
298130812Smarcel  };
299130812Smarcel
300130812Smarcel
301130812Smarcelstruct init_msg_t
302130812Smarcel  {
303130812Smarcel    INT32 code;			/* 10 */
304130812Smarcel    INT32 length;
305130812Smarcel    ADDR32 text_start;
306130812Smarcel    ADDR32 text_end;
307130812Smarcel    ADDR32 data_start;
308130812Smarcel    ADDR32 data_end;
309130812Smarcel    ADDR32 entry_point;
310130812Smarcel    INT32 mem_stack_size;
311130812Smarcel    INT32 reg_stack_size;
312130812Smarcel    ADDR32 arg_start;
313130812Smarcel    INT32 os_control;
314130812Smarcel  };
315130812Smarcel
316130812Smarcel
317130812Smarcelstruct go_msg_t
318130812Smarcel  {
319130812Smarcel    INT32 code;			/* 11 */
320130812Smarcel    INT32 length;
321130812Smarcel  };
322130812Smarcel
323130812Smarcel
324130812Smarcelstruct step_msg_t
325130812Smarcel  {
326130812Smarcel    INT32 code;			/* 12 */
327130812Smarcel    INT32 length;
328130812Smarcel    INT32 count;
329130812Smarcel  };
330130812Smarcel
331130812Smarcel
332130812Smarcelstruct break_msg_t
333130812Smarcel  {
334130812Smarcel    INT32 code;			/* 13 */
335130812Smarcel    INT32 length;
336130812Smarcel  };
337130812Smarcel
338130812Smarcel
339130812Smarcelstruct hif_call_rtn_msg_t
340130812Smarcel  {
341130812Smarcel    INT32 code;			/* 64 */
342130812Smarcel    INT32 length;
343130812Smarcel    INT32 service_number;
344130812Smarcel    INT32 gr121;
345130812Smarcel    INT32 gr96;
346130812Smarcel    INT32 gr97;
347130812Smarcel  };
348130812Smarcel
349130812Smarcel
350130812Smarcelstruct channel0_msg_t
351130812Smarcel  {
352130812Smarcel    INT32 code;			/* 65 */
353130812Smarcel    INT32 length;
354130812Smarcel    BYTE data;
355130812Smarcel  };
356130812Smarcel
357130812Smarcel
358130812Smarcelstruct channel1_ack_msg_t
359130812Smarcel  {
360130812Smarcel    INT32 code;			/* 66 */
361130812Smarcel    INT32 length;
362130812Smarcel  };
363130812Smarcel
364130812Smarcel
365130812Smarcel/*
366130812Smarcel   ** Target to host messages
367130812Smarcel */
368130812Smarcel
369130812Smarcel
370130812Smarcelstruct reset_ack_msg_t
371130812Smarcel  {
372130812Smarcel    INT32 code;			/* 32 */
373130812Smarcel    INT32 length;
374130812Smarcel  };
375130812Smarcel
376130812Smarcel
377130812Smarcelstruct config_msg_t
378130812Smarcel  {
379130812Smarcel    INT32 code;			/* 33 */
380130812Smarcel    INT32 length;
381130812Smarcel    INT32 processor_id;
382130812Smarcel    INT32 version;
383130812Smarcel    ADDR32 I_mem_start;
384130812Smarcel    INT32 I_mem_size;
385130812Smarcel    ADDR32 D_mem_start;
386130812Smarcel    INT32 D_mem_size;
387130812Smarcel    ADDR32 ROM_start;
388130812Smarcel    INT32 ROM_size;
389130812Smarcel    INT32 max_msg_size;
390130812Smarcel    INT32 max_bkpts;
391130812Smarcel    INT32 coprocessor;
392130812Smarcel    INT32 reserved;
393130812Smarcel  };
394130812Smarcel
395130812Smarcel
396130812Smarcelstruct status_msg_t
397130812Smarcel  {
398130812Smarcel    INT32 code;			/* 34 */
399130812Smarcel    INT32 length;
400130812Smarcel    INT32 msgs_sent;
401130812Smarcel    INT32 msgs_received;
402130812Smarcel    INT32 errors;
403130812Smarcel    INT32 bkpts_hit;
404130812Smarcel    INT32 bkpts_free;
405130812Smarcel    INT32 traps;
406130812Smarcel    INT32 fills;
407130812Smarcel    INT32 spills;
408130812Smarcel    INT32 cycles;
409130812Smarcel    INT32 reserved;
410130812Smarcel  };
411130812Smarcel
412130812Smarcel
413130812Smarcelstruct read_ack_msg_t
414130812Smarcel  {
415130812Smarcel    INT32 code;			/* 35 */
416130812Smarcel    INT32 length;
417130812Smarcel    INT32 memory_space;
418130812Smarcel    ADDR32 address;
419130812Smarcel    INT32 byte_count;
420130812Smarcel    BYTE data[DUMMY];
421130812Smarcel  };
422130812Smarcel
423130812Smarcelstruct read_r_ack_msg_t
424130812Smarcel  {
425130812Smarcel    INT32 code;			/* 35 */
426130812Smarcel    INT32 length;
427130812Smarcel    INT32 memory_space;
428130812Smarcel    ADDR32 address;
429130812Smarcel    INT32 byte_count;
430130812Smarcel    INT32 data[DUMMY];
431130812Smarcel  };
432130812Smarcel
433130812Smarcel
434130812Smarcelstruct write_ack_msg_t
435130812Smarcel  {
436130812Smarcel    INT32 code;			/* 36 */
437130812Smarcel    INT32 length;
438130812Smarcel    INT32 memory_space;
439130812Smarcel    ADDR32 address;
440130812Smarcel    INT32 byte_count;
441130812Smarcel  };
442130812Smarcel
443130812Smarcel
444130812Smarcelstruct bkpt_set_ack_msg_t
445130812Smarcel  {
446130812Smarcel    INT32 code;			/* 37 */
447130812Smarcel    INT32 length;
448130812Smarcel    INT32 memory_space;
449130812Smarcel    ADDR32 address;
450130812Smarcel    INT32 pass_count;
451130812Smarcel    INT32 bkpt_type;
452130812Smarcel  };
453130812Smarcel
454130812Smarcel
455130812Smarcelstruct bkpt_rm_ack_msg_t
456130812Smarcel  {
457130812Smarcel    INT32 code;			/* 38 */
458130812Smarcel    INT32 length;
459130812Smarcel    INT32 memory_space;
460130812Smarcel    ADDR32 address;
461130812Smarcel  };
462130812Smarcel
463130812Smarcel
464130812Smarcelstruct bkpt_stat_ack_msg_t
465130812Smarcel  {
466130812Smarcel    INT32 code;			/* 39 */
467130812Smarcel    INT32 length;
468130812Smarcel    INT32 memory_space;
469130812Smarcel    ADDR32 address;
470130812Smarcel    INT32 pass_count;
471130812Smarcel    INT32 bkpt_type;
472130812Smarcel  };
473130812Smarcel
474130812Smarcel
475130812Smarcelstruct copy_ack_msg_t
476130812Smarcel  {
477130812Smarcel    INT32 code;			/* 40 */
478130812Smarcel    INT32 length;
479130812Smarcel    INT32 source_space;
480130812Smarcel    ADDR32 source_addr;
481130812Smarcel    INT32 dest_space;
482130812Smarcel    ADDR32 dest_addr;
483130812Smarcel    INT32 byte_count;
484130812Smarcel  };
485130812Smarcel
486130812Smarcel
487130812Smarcelstruct fill_ack_msg_t
488130812Smarcel  {
489130812Smarcel    INT32 code;			/* 41 */
490130812Smarcel    INT32 length;
491130812Smarcel    INT32 memory_space;
492130812Smarcel    ADDR32 start_addr;
493130812Smarcel    INT32 fill_count;
494130812Smarcel    INT32 byte_count;
495130812Smarcel  };
496130812Smarcel
497130812Smarcel
498130812Smarcelstruct init_ack_msg_t
499130812Smarcel  {
500130812Smarcel    INT32 code;			/* 42 */
501130812Smarcel    INT32 length;
502130812Smarcel  };
503130812Smarcel
504130812Smarcel
505130812Smarcelstruct halt_msg_t
506130812Smarcel  {
507130812Smarcel    INT32 code;			/* 43 */
508130812Smarcel    INT32 length;
509130812Smarcel    INT32 memory_space;
510130812Smarcel    ADDR32 pc0;
511130812Smarcel    ADDR32 pc1;
512130812Smarcel    INT32 trap_number;
513130812Smarcel  };
514130812Smarcel
515130812Smarcel
516130812Smarcelstruct error_msg_t
517130812Smarcel  {
518130812Smarcel    INT32 code;			/* 63 */
519130812Smarcel    INT32 length;
520130812Smarcel    INT32 error_code;
521130812Smarcel    INT32 memory_space;
522130812Smarcel    ADDR32 address;
523130812Smarcel  };
524130812Smarcel
525130812Smarcel
526130812Smarcelstruct hif_call_msg_t
527130812Smarcel  {
528130812Smarcel    INT32 code;			/* 96 */
529130812Smarcel    INT32 length;
530130812Smarcel    INT32 service_number;
531130812Smarcel    INT32 lr2;
532130812Smarcel    INT32 lr3;
533130812Smarcel    INT32 lr4;
534130812Smarcel  };
535130812Smarcel
536130812Smarcel
537130812Smarcelstruct channel0_ack_msg_t
538130812Smarcel  {
539130812Smarcel    INT32 code;			/* 97 */
540130812Smarcel    INT32 length;
541130812Smarcel  };
542130812Smarcel
543130812Smarcel
544130812Smarcelstruct channel1_msg_t
545130812Smarcel  {
546130812Smarcel    INT32 code;			/* 98 */
547130812Smarcel    INT32 length;
548130812Smarcel    BYTE data[DUMMY];
549130812Smarcel  };
550130812Smarcel
551130812Smarcel
552130812Smarcel
553130812Smarcel/*
554130812Smarcel   ** Union all of the message types together
555130812Smarcel */
556130812Smarcel
557130812Smarcelunion msg_t
558130812Smarcel  {
559130812Smarcel    struct generic_msg_t generic_msg;
560130812Smarcel    struct generic_int32_msg_t generic_int32_msg;
561130812Smarcel
562130812Smarcel    struct reset_msg_t reset_msg;
563130812Smarcel    struct config_req_msg_t config_req_msg;
564130812Smarcel    struct status_req_msg_t status_req_msg;
565130812Smarcel    struct read_req_msg_t read_req_msg;
566130812Smarcel    struct write_req_msg_t write_req_msg;
567130812Smarcel    struct write_r_msg_t write_r_msg;
568130812Smarcel    struct bkpt_set_msg_t bkpt_set_msg;
569130812Smarcel    struct bkpt_rm_msg_t bkpt_rm_msg;
570130812Smarcel    struct bkpt_stat_msg_t bkpt_stat_msg;
571130812Smarcel    struct copy_msg_t copy_msg;
572130812Smarcel    struct fill_msg_t fill_msg;
573130812Smarcel    struct init_msg_t init_msg;
574130812Smarcel    struct go_msg_t go_msg;
575130812Smarcel    struct step_msg_t step_msg;
576130812Smarcel    struct break_msg_t break_msg;
577130812Smarcel
578130812Smarcel    struct hif_call_rtn_msg_t hif_call_rtn_msg;
579130812Smarcel    struct channel0_msg_t channel0_msg;
580130812Smarcel    struct channel1_ack_msg_t channel1_ack_msg;
581130812Smarcel
582130812Smarcel    struct reset_ack_msg_t reset_ack_msg;
583130812Smarcel    struct config_msg_t config_msg;
584130812Smarcel    struct status_msg_t status_msg;
585130812Smarcel    struct read_ack_msg_t read_ack_msg;
586130812Smarcel    struct read_r_ack_msg_t read_r_ack_msg;
587130812Smarcel    struct write_ack_msg_t write_ack_msg;
588130812Smarcel    struct bkpt_set_ack_msg_t bkpt_set_ack_msg;
589130812Smarcel    struct bkpt_rm_ack_msg_t bkpt_rm_ack_msg;
590130812Smarcel    struct bkpt_stat_ack_msg_t bkpt_stat_ack_msg;
591130812Smarcel    struct copy_ack_msg_t copy_ack_msg;
592130812Smarcel    struct fill_ack_msg_t fill_ack_msg;
593130812Smarcel    struct init_ack_msg_t init_ack_msg;
594130812Smarcel    struct halt_msg_t halt_msg;
595130812Smarcel
596130812Smarcel    struct error_msg_t error_msg;
597130812Smarcel
598130812Smarcel    struct hif_call_msg_t hif_call_msg;
599130812Smarcel    struct channel0_ack_msg_t channel0_ack_msg;
600130812Smarcel    struct channel1_msg_t channel1_msg;
601130812Smarcel  };
602